JPS6091662A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6091662A
JPS6091662A JP20174883A JP20174883A JPS6091662A JP S6091662 A JPS6091662 A JP S6091662A JP 20174883 A JP20174883 A JP 20174883A JP 20174883 A JP20174883 A JP 20174883A JP S6091662 A JPS6091662 A JP S6091662A
Authority
JP
Japan
Prior art keywords
single crystal
elements
crystal silicon
substrate
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20174883A
Other languages
Japanese (ja)
Inventor
Hideaki Itakura
秀明 板倉
Mikio Nishihata
西畑 幹夫
Kuniaki Miyake
邦明 三宅
Kyusaku Nishioka
西岡 久作
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP20174883A priority Critical patent/JPS6091662A/en
Publication of JPS6091662A publication Critical patent/JPS6091662A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688Integrated circuits having a three-dimensional layout
    • H01L27/0694Integrated circuits having a three-dimensional layout comprising components formed on opposite sides of a semiconductor substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a semiconductor device having large capacitance or polyfunctions by one chip by each forming single crystal semiconductor layers on both the surface and the back of a substrate and forming semiconductor elements having the same function or mutually different functions to several single crystal semiconductor layer. CONSTITUTION:Single crystal silicon layers 2 and 3 are each grown on both the surface and the back of an insulating substrate 1, such as a single crystal silicon board, a sapphire or the like in an epitaxial manner. MOS type or bipolar type elements are formed on the surface sections of these layers 2 and 3 through the same process, and these elements are connected. When one layer is used for a sensor element and the other layer for a memory elements, etc., the elements having mutually different functions can be formed to one chip.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は1つのチップで大容量または多機能を持たせ
得る半導体装置の構造に関するものである0 〔従来技術〕 第1図は従来の半導体装置の構造を示す断面図で、(1
)は基板、(2)はその上に形成された単結晶シリコン
層である0 従来の半導体装置では、第1図に示すように基板(1)
の一方の主面上にのみ単結晶シリコン層(2)を形成し
、この単結晶シリコン層(2)に半導体素子を形成して
いた0例えば、MO8形半導体装置の場合には基板(1
)として単結晶シリコン板を用い、その一方の主表面層
に不純物を拡散させ、また、その主表面に薄膜を形成し
その薄膜に加工を施してMO8半導体素子を形成してい
た。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to the structure of a semiconductor device that can have a large capacity or multiple functions in one chip.[Prior Art] Fig. 1 shows a conventional semiconductor device. A cross-sectional view showing the structure of (1
) is the substrate, and (2) is the single crystal silicon layer formed thereon.0 In a conventional semiconductor device, as shown in FIG.
For example, in the case of an MO8 type semiconductor device, a single crystal silicon layer (2) is formed only on one main surface of the substrate (1), and a semiconductor element is formed on this single crystal silicon layer (2).
), impurities were diffused into one main surface layer of the single crystal silicon plate, a thin film was formed on the main surface, and the thin film was processed to form an MO8 semiconductor element.

また、高性能な素子を得るには、基板(1)としてサフ
ァイヤなどの絶縁物からなる板を用い、その上に例えば
エピタキシャル成長法で単結晶シリコン層(2)を形成
した後、その単結晶シリコン層(2)の表面部に不純物
を拡散させ、また表面に薄膜を形成し、その薄膜に加工
を施して素子を形成していた。
In addition, in order to obtain a high-performance device, a plate made of an insulating material such as sapphire is used as the substrate (1), a single crystal silicon layer (2) is formed on it by, for example, an epitaxial growth method, and then the single crystal silicon Impurities are diffused into the surface of layer (2), a thin film is formed on the surface, and the thin film is processed to form an element.

更にまた、バイポーラ形半導体装置の場合には、基板(
1)として単結晶シリコン板を用い、さらにその上に例
えばエピタキシャル成長法で基板(1)とは異なる不純
物濃度を有する単結晶シリコン層(2)を形成した後に
、この単結晶シリコン層(2)にさらに種々の不純物を
拡散させて素子を形成していた。
Furthermore, in the case of bipolar semiconductor devices, the substrate (
A single crystal silicon plate is used as 1), and a single crystal silicon layer (2) having an impurity concentration different from that of the substrate (1) is formed thereon by, for example, an epitaxial growth method. Furthermore, various impurities were diffused to form elements.

しかし、このような従来の構成では基板の一方の面のみ
を利用しているので、素子の大容量化に限界があり、ま
た単機能の装置しか得られなかった0 〔発明の概要〕 この発明tよ以上のような点に鑑みてなされたもので、
基板の両面に単結晶半導体層を形成して、それぞれに同
一または互いに異なる機能を有する半導体素子を形成す
ることによって大容量または多機能な半導体装置を提供
するものである。
However, since such a conventional configuration utilizes only one side of the substrate, there is a limit to increasing the capacity of the element, and only a single-function device can be obtained.0 [Summary of the Invention] This invention This was done in view of the above points,
A large-capacity or multifunctional semiconductor device is provided by forming single crystal semiconductor layers on both sides of a substrate and forming semiconductor elements having the same or different functions on each side.

〔発明の実施例〕[Embodiments of the invention]

第2図はこの発明の一実施例の構造を示す断面図で、(
1)は基板、(2)および(3)は基板(1)の両生表
面上にそれぞれ形成された単結晶シリコン層である。
FIG. 2 is a sectional view showing the structure of an embodiment of the present invention.
1) is a substrate, and (2) and (3) are single-crystal silicon layers formed on the amphibatic surfaces of the substrate (1), respectively.

すなわち、単結晶シリコン板またはサファイヤなどの絶
縁物からなる基板(1)の両生表面上にエピタキシャル
成長法を用いて単結晶シリコン層(2)および(3)を
それぞれ形成する。その後にこれら単結晶シリコン層(
2)および(3)のそれぞれの表面部に同じ工程でMO
S形まだはバイポーラ形素子を形成した後、両表面部の
素子を接続すれば大容量の半導体装置が得られる。
That is, single-crystal silicon layers (2) and (3) are formed using an epitaxial growth method on the amphibatic surface of a substrate (1) made of a single-crystal silicon plate or an insulator such as sapphire. These single crystal silicon layers (
MO was applied to the surface of each of 2) and (3) in the same process.
After forming an S type or bipolar type element, a large capacity semiconductor device can be obtained by connecting the elements on both surfaces.

また、両年結晶シリコン層(2)および(3)の各表面
部に例えば一方にセンサー素子、他方にメモリ素子など
、互いに異なる機能を有する素子を形成すれば、1つの
チップで多機能な装置とすることができる。
Furthermore, if elements with different functions are formed on each surface of the crystalline silicon layers (2) and (3), such as a sensor element on one side and a memory element on the other side, it is possible to create a multifunctional device with one chip. It can be done.

〔発明の効果〕〔Effect of the invention〕

半導体素子を形成するようにしたので、lチップで大容
量または多機能な半導体装置が実現できる。
Since a semiconductor element is formed, a large capacity or multifunctional semiconductor device can be realized with one chip.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の半導体装置の構造を示す断面図、第2図
はこの発明の一実施例の構造を示す断面図である。 図において、(11は基板、(21、(31は単結晶半
導体(シリコン)層である。 なお、図中同一符号は同一または相当部分を示す。 代理人 大岩増雄
FIG. 1 is a sectional view showing the structure of a conventional semiconductor device, and FIG. 2 is a sectional view showing the structure of an embodiment of the present invention. In the figure, (11 is the substrate, (21, (31) are single crystal semiconductor (silicon) layers. In addition, the same reference numerals in the figure indicate the same or corresponding parts. Agent: Masuo Oiwa

Claims (1)

【特許請求の範囲】[Claims] (11基板の両生面上に形成された単結晶半導体層にそ
れぞれ同一または互いに異なる機能を有する半導体素子
を形成したことを特徴とする半導体装置。
(11) A semiconductor device characterized in that semiconductor elements each having the same or different functions are formed in a single crystal semiconductor layer formed on an amphibatic surface of a substrate.
JP20174883A 1983-10-25 1983-10-25 Semiconductor device Pending JPS6091662A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20174883A JPS6091662A (en) 1983-10-25 1983-10-25 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20174883A JPS6091662A (en) 1983-10-25 1983-10-25 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6091662A true JPS6091662A (en) 1985-05-23

Family

ID=16446283

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20174883A Pending JPS6091662A (en) 1983-10-25 1983-10-25 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6091662A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6452556A (en) * 1987-08-24 1989-02-28 Toyota Motor Corp Driving device for side window wiper

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6452556A (en) * 1987-08-24 1989-02-28 Toyota Motor Corp Driving device for side window wiper

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