JPS6084837A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To prevent re conduction of a fuse by forming proper level differences in advance on an insulating film under cutting part of the fuse arranged on a main surface of a semiconductor substrate on which a semiconductor IC is formed so as to cut the fuse in the part of this difference. CONSTITUTION:On one semiconductor substrate 1, a relatively thick field oxide film 2 is formed and an insulating film is formed in the part where a fuse is formed. This insulating film is subjected to photo-etching to form a projection 3 consisting of an insulator. After that, a fuse 4 having a relatively narrow cutting part 4 in the center is formed with being so orientated that the central cutting part 4a rides on the projection 3. Next, after an interlayer insulating film 5 is formed and Al wiring and etc. are formed, a final passivation film 6 such as an SiO2 film is formed. Further, apertures 6a and 5a are formed by etching and the cutting part 4a of the fuse 4 is exposed so as to disperse the components of the fuse fused at cutting from the apertures 5a and 6a.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to a semiconductor integrated technology and a technology that is effective when applied to a semiconductor integrated circuit device having a fuse. related to technology.

[Background Art] For example, in a semiconductor storage device such as a 256-bit dynamic RAM (random access memory), a memory column containing defective pins 1 to 1 of a memory array is
Redundant circuitry may be provided to improve chip yield by switching with spare memory columns. In order to switch to this redundant circuit, a fuse made of polysilicon or the like is formed on the main surface of the semiconductor substrate via an insulating film such as a silicon oxide film, and settings are made depending on whether or not this fuse is blown. is proposed. In this case, the fuse can be blown by applying a voltage of about 20 V to both ends and causing an overcurrent to flow, or by irradiating it with a laser.

However, if an overcurrent flows and the fuse blows,
The fuse may not be cut uniformly, and the width of the cut may be very narrow, or the fuse may be cut intermittently. Therefore, for example, when a semiconductor chip equipped with a fuse is enclosed in a package, the stress generated within the package may cause the chip to bend, and there is a risk that a lateral force will be applied to the cut section of the fuse, causing the cut point to become conductive again. be.

[Object of the Invention] An object of the present invention is to provide a semiconductor integration technology that provides novel effects not seen before.

Another object of the present invention is to, for example, when applied to the formation of fuses in semiconductor integrated circuits, eliminate the fear of re-conduction of a blown fuse and ensure that the blown state is maintained. .

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the Invention] A brief overview of typical inventions disclosed in this application is as follows.

That is, in the present invention, for example, an appropriate step is formed in advance in an insulating film below a cut portion of a fuse provided on the main surface of a semiconductor substrate on which a semiconductor integrated circuit is formed, and the fuse is cut at the step portion. The fuse is cut so that even if a lateral force is applied to the cut section of the fuse, the cut surfaces are shifted from each other so that contact does not occur, and the fuse is prevented from re-conducting after the cutting process. This aims to achieve the above objectives.

The present invention will be specifically explained below using the drawings.

[Embodiment 1] FIGS. 1 and 2 do not show an embodiment in which the present invention is applied to a state setting fuse in a semiconductor integrated circuit.

In this embodiment, a relatively thick field oxide film 2 called LOGO 5 is formed on a single semiconductor substrate 1 such as a silicon chip by thermal oxidation. and,
The part of the field oxide film 2 where the fuse is formed is not particularly limited, but for example, the part of the field oxide film 2 where the fuse is formed is
After removing the silicon nitride film used to form the
PS by chemical vapor deposition method
An anti-B film such as Gll5-t (phosphorus silicon glass film) or a silicon oxide film or a silicon nitride film is formed by a plasma deposition method.

Then, this insulating film is subjected to bore etching to form protrusions 3 made of an insulating material on the field oxide film 2'.

After that, the polycrystalline silicon layer constituting the fuse is coated with CVD.
After forming by the D method, a relatively narrow IWJ section 4 is formed in the center by photoetching, as shown in FIG.
Form a fuse 4 having a.

At this time, the cut portion 4a at the center of the fuse 4 is positioned and formed so as to rest on the protrusion 3 on the field oxide film 2.

And - next, in 1- Fuse 4, PSGII! After forming the glabellar insulating film 5 as shown in FIG. 1, and forming aluminum wiring for a circuit (not shown), a final passivation film 6 such as a 5i02 film is formed on the interlayer insulating film 5. From JL, openings 6a and 5a are formed in the final passivation film 6 and interlayer insulating film 5 by etching to expose the cut portion 4a of the fuse 4, resulting in the state shown in FIG. 2. As a result, the components of the fuse melted during cutting are removed from the open portion 5a, [E
It is made possible to scatter from a.

According to the above embodiment, the protrusion 3 on the field oxide film 2
A step 4b, 4b is formed at the central cut portion 4a of the polycrystalline silicon fuse 4 formed above, and the cross-sectional area of the polycrystalline silicon fuse is smaller at the step 4b than at the other portion 6). Therefore, when an appropriate high voltage is applied to both ends of the polycrystalline silicon fuse 4 to cause an overcurrent to flow, the polycrystalline silicon is melted by Joule heat and the opening 5a is formed.

6a], and a cut state as shown in FIG. 3(a) or (b) occurs.

Therefore, even if a lateral force is applied to the cut portion 4a of the fuse 4 due to the stress generated when the semiconductor chip on which the fuse 4 is formed is packaged, the cut portion 4a of the fuse 4 will not be cut in the case shown in FIG. Since the protruding portion 3 is interposed between the locations, re-conduction is reliably prevented.

Furthermore, even if the cut portion 4a is in the cut state as shown in FIG.
Reconduction can be prevented even if a lateral force is applied.

The effect of preventing re-conduction as described above is achieved when the protruding portion 3 formed below the cut portion 4a is approximately 173 mm thick than the fuse 4.
If it is more than that, it will be destroyed to some extent. However, in order to reliably prevent reconduction, it is desirable that the height of the protrusion 3 be greater than the thickness of the fuse 4. However, if the protrusion 3 is made too high, there is a risk that the cut portion will be cut off from the beginning when polycrystalline silicon is deposited, so it should not be made more than twice the thickness of the polycrystalline silicon fuse 4. It's good to do that. On the other hand, the width of the protrusion 3 is larger than the minimum width determined by the relationship between the minimum dimension of the process and the bonding force between the protrusion 3 and the field oxide film 2 below, and the length of the cut portion 4a is You can set it so that it is smaller than that.

[Embodiment 2] Next, FIG. 4 shows a second embodiment of the present invention. In this embodiment, a part of the relatively thick field oxide film 2 of about 8000 A is etched away to form a four part 2a below the cut part 4a of the fuse 4 in advance, thereby forming a step 4b' in the cut part 4a. , 4b' is shown.

Even in this case, the polycrystalline silicon fuse 4 is cut at the step 4b' of the cut portion 4a, so even if a lateral force is applied, the cut end surface is vertically shifted, preventing reconduction. [sa] sign.

Instead of scraping the field oxide film 2 to form the recess 2a as described above, the protrusion 3 is formed by scraping the periphery of the fuse cutting part 4a, except for the lower central part, as shown in FIG. You may also do so.

Even if the field oxide film 2 is scraped to form the unevenness 2a, the area where the fuse is formed is generally relatively far away from an active element such as a memory element, so the parasitic MO8 effect can be avoided. There is almost no possibility that such adverse effects will occur.

The polycrystalline silicon fuse in the above embodiment is a MOS
When applicable to a semiconductor integrated circuit such as a dynamic RAM, the fuse 4 is
It can be formed simultaneously with the polycrystalline silicon gate 1 of the OSFET, one polycrystalline silicon electrode of the capacitor, wiring, etc.

Furthermore, if the process of such a semiconductor integrated circuit uses two-layer polysilicon technology, the fuse can be formed using the first layer of polysilicon (polycrystalline silicon) by applying the above embodiment. .

However, by adding a step of forming an insulating film that will become the protrusion 3 between the steps of forming the first and second polysilicon layers, a fuse can be formed using the second polysilicon layer. It is also possible to form 4.

[Effects] (1) The insulating film is formed planarly on the semiconductor substrate with an insulating film interposed therebetween, and the insulating film below the cutting part of the fuse is formed with unevenness, and the unevenness creates a step in the cutting part of the fuse. Since the fuse is cut at the step, there is a protrusion between the cut points, or the cut surfaces are vertically shifted from each other, which causes lateral force (shearing force) to be applied to the cut section of the fuse. Even if they work, they never come into contact with each other. As a result, there is an effect that re-conduction of the fuse after the cutting process can be reliably prevented.

(2) The insulating film (field oxide film) below the cutting part of the fuse, which is formed planarly on the semiconductor substrate with an insulating film interposed therebetween, is scraped to form unevenness, and the unevenness creates a step in the cutting part of the fuse. Since the fuse is cut at the stepped part, the step can be created without separately forming an insulating film under the fuse, and the fuse can be cut without complicating the process. This has the effect of preventing re-conduction of the .

(3) Since it is possible to prevent the fuse from re-conducting,
The effect is that the reliability of a semiconductor integrated circuit device having a fuse can be improved.

Although the invention made by the present inventor has been specifically described above based on Examples, it goes without saying that the present invention is not limited to the above-mentioned Examples, and can be modified in various ways without departing from the gist thereof. Nor.

For example, in the above embodiment, the present invention is applied to a fuse made of polycrystalline silicon, but the present invention can also be applied to a fuse made of metal such as aluminum. Further, in the above embodiments, a type in which an overcurrent is applied to the fuse to blow it out is explained, but it can also be applied to a type in which the fuse is cut by a laser.

[Field of Application] In the above description, the invention made by the present inventor has been mainly applied to a semiconductor integrated circuit, which is the field of application to which the invention is based.

The present invention is not limited thereto, but can also be used, for example, to form a fuse provided on a wiring board or the like.

[Brief explanation of the drawing]

FIG. 1 is a plan view showing an embodiment of the structure of a fuse according to the present invention. Figure 2 is a cross-sectional view along the river-■ line in Figure 1, Figure 3 (a)
, (b) are sectional views showing the state of the fuses after the cutting process, and FIG. 4 is a sectional view showing another embodiment of the structure of the fuse according to the present invention. l...Semiconductor substrate, 2...Field oxide film. 3... Projection, 4... Fuse, 4a...
- Cutting portion, 4b, 4b'...step, 5...interlayer box 1#cW4, 5a...opening, 6...passivation film, 6a...opening. Figure 1 Figure 2

Claims (1)

[Claims] 1. Unevenness is formed in the insulating film under the fuse, which is formed planarly on the −1 plane of the semiconductor substrate with an insulating film interposed therebetween, and a step is created at the cut portion of the fuse on the irregularity. A semiconductor integrated circuit device comprising: 2. The insulating film is formed on a field oxide film formed on the -1 plane of the semiconductor substrate, so that a step is created at the fuse cutting part. The semiconductor integrated circuit device according to item 1. 3. The above-mentioned insulating film is a field oxide film formed on the -1 plane of the semiconductor substrate, and the field oxide film has irregularities formed directly under the fuse cutting part. The semiconductor integrated circuit device according to item 1.