JPS6084035A - Common transmitter - Google Patents
Common transmitterInfo
- Publication number
- JPS6084035A JPS6084035A JP9725583A JP9725583A JPS6084035A JP S6084035 A JPS6084035 A JP S6084035A JP 9725583 A JP9725583 A JP 9725583A JP 9725583 A JP9725583 A JP 9725583A JP S6084035 A JPS6084035 A JP S6084035A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- controller
- multiplexer
- test
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/14—Monitoring arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は、時分割多重信号として複数の信号を伝送す
る共有伝送装置、特にその回線の故障検出に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a shared transmission device that transmits a plurality of signals as time-division multiplexed signals, and in particular to failure detection of a line thereof.
第1図は従来の共有伝送装置の一例を示すブロック結線
図であり、図において(1;は複数列の信号入力、+2
+1:tマルチプレクサ、(31はこのマルチプレクサ
出力を伝送する伝送路、(4:ハこの伝送路〃)らの信
号を分離するデマルチプレクサ、15)は複数夕1jの
信号出力である。FIG. 1 is a block wiring diagram showing an example of a conventional shared transmission device.
+1:t multiplexer, (31 is a transmission line for transmitting the output of this multiplexer, (4: this transmission line), and a demultiplexer for separating the signals; 15) is the signal output of the multiplexer 1j.
上記のように構成された共有伝送装置においては、複数
列の信号入力(11は、マルチプレクサ(21によって
時分割多重信号として伝送路(3)から送出される。伝
送路(3)から入ってくる時分割多重(K号はデマルチ
プレクサ(41により複数の信号にlI上離され複数列
の信号出力(5)として出力される。In the shared transmission device configured as described above, multiple columns of signal inputs (11) are sent out from the transmission path (3) as time-division multiplexed signals by the multiplexer (21). Time division multiplexing (K number is separated by lI into a plurality of signals by a demultiplexer (41) and output as a plurality of columns of signal outputs (5).
しかるに従来の共有伝送装置は、上記のように構成され
ているのでマルチプレクサ(2)及びデマルチプレクサ
(41の故障が検出できず、また伝送線(31が切れて
も検出できないなどの欠点があった。However, because the conventional shared transmission equipment is configured as described above, it has drawbacks such as failures in the multiplexer (2) and demultiplexer (41) cannot be detected, and failures in the transmission line (31) cannot be detected. .
この発明は上記のような従来装置の欠点を除去するため
になされたもので、回線の故障の?J aj力監容易に
でき、信頼性の高い共有伝送装置ヲ付ることを目的とす
るものである。This invention was made to eliminate the above-mentioned drawbacks of the conventional equipment. The purpose of this invention is to provide a highly reliable shared transmission device that can be easily monitored.
第2図はこの発明の一実施例ケ示す〕゛ロック結線図で
あり、(1)〜(5)は第1図の同一符号と1司−又は
相当部分を示すものである。図において(20)はマル
チプレクサ(2)とは別回線を構成するマルチプレクサ
、(2りはこのマルチプレクサ出力を伝送する伝送路、
(22)はこの伝送路からの信号を分離するデマルチプ
レクサ、(23)U回線の切換を制御するテスト制御器
、(24人(25)は各々このテスト制御器からの信号
でマルチプレクサ+z+ 、 12Iへの信号を制御す
る入力制御器、(26人(27)は各々デマルチプレク
サ(41、(22)からの出力信号を制御する出力制御
器、(28人(29)昧各々デマルチプレクサ(4)、
(22)からの故障信号を検出するための信号検出器で
ある。FIG. 2 is a lock connection diagram showing one embodiment of the present invention, and (1) to (5) indicate the same reference numerals and 1- or corresponding parts as in FIG. 1. In the figure, (20) is a multiplexer that constitutes a separate line from multiplexer (2), (2 is a transmission line that transmits the output of this multiplexer,
(22) is a demultiplexer that separates the signal from this transmission line, (23) a test controller that controls switching of the U line, (24) (25) is a multiplexer +z+, 12I with the signal from this test controller, respectively. (26 (27) are respectively output controllers that control the output signals from the demultiplexers (41, (22)); (28 (29) are each a demultiplexer (4); ,
(22) is a signal detector for detecting a fault signal from.
上記のように構成された共有伝送装置においては、テス
ト制御器(23)から入力制御器(24人(25)に信
号を送ると、例えば入力制御器(24)は入力信号tl
l ’eマルチプレクサ(2)に送り、入力制御器(2
5)は常に″H”(又は”L’)のテスト信号をマルチ
プレクサ(20)に送る。それと同時にテスト制御器(
23)は出力制御器(26人(27)にも信号を送るの
で、出力制御器(26)はデマルチプレクサ(41の出
力を出力信号(51に送出し、出力制御器(27)はデ
マルチプレクサ(22)の出力を出力信号+51に出さ
ないようにする。In the shared transmission device configured as described above, when a signal is sent from the test controller (23) to the input controller (24 (25)), for example, the input controller (24) receives the input signal tl.
l 'e multiplexer (2) and input controller (2
5) always sends a "H" (or "L") test signal to the multiplexer (20).At the same time, the test controller (
Since the output controller (23) also sends a signal to the output controller (26 (27), the output controller (26) sends the output of the demultiplexer (41) to the output signal (51), and the output controller (27) sends the output of the demultiplexer (41) to the output signal (51). The output of (22) is not output to the output signal +51.
また信号検出器(29)はデマルチブレサ(22)より
の″H”のテスト信号が検知されていること全確認し、
マルチプレクサ(20)−伝送路(2υ−デマルチプレ
クサ(22)の伝送系が正常であること全確認する。テ
スト制御器(23)は上記の動作をマルチプレクサ(2
)の系列とマルチプレクサ(201の系列を交互に切換
えることにより両方の伝送系に故障のないことを確認し
ながらデータを伝送する。Also, the signal detector (29) confirms that the "H" test signal from the demultiplexer (22) is detected,
Make sure that the transmission system from multiplexer (20) to transmission line (2υ) to demultiplexer (22) is normal.
) and the multiplexer (201), data is transmitted while confirming that there is no failure in both transmission systems.
この発明は以上説明したとおり、マルチプレクサ及びデ
マルチプレクサを2重化し、テスト制御1器及びテスト
信号検出器を設けることにより回線の正常であることを
常に検出できるので、信頼性の高い共有伝送装置が得ら
れるという効果がある。As explained above, by duplicating multiplexers and demultiplexers, and providing one test controller and a test signal detector, this invention can always detect whether the line is normal, thereby creating a highly reliable shared transmission device. There is an effect that can be obtained.
第1図は従来の共有伝送装置の一例ケ示すブロック結線
図、第2図はこの発明の一実施IyI k示すブロック
結線図である。図において(2)tユマルチブレクサ、
(41はデマルチプレクサ、(20)Uマルチプレクサ
、(22)はデマルチプレクサ(23)はテスト制御器
、(28)、(29)は信号検出器である。
なお各図中同一符号は同−又は相当部分を示すものとす
る。
代理人 大岩増雄FIG. 1 is a block diagram showing an example of a conventional shared transmission device, and FIG. 2 is a block diagram showing an embodiment of the present invention. In the figure (2) t unit multiplexer,
(41 is a demultiplexer, (20) is a U multiplexer, (22) is a demultiplexer, (23) is a test controller, and (28) and (29) are signal detectors. The same reference numerals in each figure indicate the same - or The relevant portion shall be shown. Agent Masuo Oiwa
Claims (1)
レクサと、受信した時分割多重信号を複数列の信号に複
調するデマルチプレクサを備えた共有伝送装置において
、2対のマルチプレクサ及びデマルチプレクサと、上記
2台のマルチプレクサに時分割多重信号の送信とテスト
信号の送信を交互に動作させるテスト制御器と、上記テ
スト信号を受信し上記テスト信号を伝送した回線の正常
であることを検出するテスト信号検出器を備えたことを
特徴とする共有伝送装置。A shared transmission device comprising a multiplexer that sends out multiple columns of signals as a time division multiplexed signal, and a demultiplexer that demodulates the received time division multiplexed signal into multiple columns of signals, two pairs of multiplexers and demultiplexers, and the above-mentioned A test controller that alternately transmits a time division multiplexed signal and a test signal to two multiplexers, and a test signal detector that receives the test signal and detects that the line that transmitted the test signal is normal. A shared transmission device characterized by being equipped with a device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9725583A JPS6084035A (en) | 1983-05-31 | 1983-05-31 | Common transmitter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9725583A JPS6084035A (en) | 1983-05-31 | 1983-05-31 | Common transmitter |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6084035A true JPS6084035A (en) | 1985-05-13 |
Family
ID=14187450
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9725583A Pending JPS6084035A (en) | 1983-05-31 | 1983-05-31 | Common transmitter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6084035A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0903881A2 (en) * | 1997-08-29 | 1999-03-24 | Lucent Technologies Inc. | Detecting digital multiplexer faults |
-
1983
- 1983-05-31 JP JP9725583A patent/JPS6084035A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0903881A2 (en) * | 1997-08-29 | 1999-03-24 | Lucent Technologies Inc. | Detecting digital multiplexer faults |
EP0903881A3 (en) * | 1997-08-29 | 2002-09-18 | Lucent Technologies Inc. | Detecting digital multiplexer faults |
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