JPS6082846A - Electric field effect type semiconductor sensor - Google Patents

Electric field effect type semiconductor sensor

Info

Publication number
JPS6082846A
JPS6082846A JP58190290A JP19029083A JPS6082846A JP S6082846 A JPS6082846 A JP S6082846A JP 58190290 A JP58190290 A JP 58190290A JP 19029083 A JP19029083 A JP 19029083A JP S6082846 A JPS6082846 A JP S6082846A
Authority
JP
Japan
Prior art keywords
layer
substrate
semiconductor sensor
sensor
field effect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58190290A
Other languages
Japanese (ja)
Inventor
Katsunori Nishiguchi
勝規 西口
Junichi Hiramoto
順一 平本
Toshiki Ehata
敏樹 江畑
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP58190290A priority Critical patent/JPS6082846A/en
Publication of JPS6082846A publication Critical patent/JPS6082846A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
    • G01N27/403Cells and electrode assemblies
    • G01N27/414Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS

Abstract

PURPOSE:To enable stable high accuracy measurement and mass production in good yield, by using a specific semiconductor as the substrate of an electric field effect type semiconductor sensor provided with a layer selectively responding only to the substance to be measured on a gate part. CONSTITUTION:A III-V group semiconductor, for example, InP, of which the resistance is enhanced by doping Fe, is used as a substrate 10 and the surface thereof is doped with Zn to form a P<-> type InP layer 11. S is diffused in the layer 11 to form an N<+> layer 12 for drain and an N<+> layer 13 for source. By the diffustion of Zn into the P<-> layer 11, a P<+> layer 14 for facilitating electrical connection is formed while two metal layers for a drain contact 15 and a source P<-> layer common contact 16 are formed and a channel part 19 is formed by mesa-etching. The other than the parts of the P<-> layer 11, on which the N<+> layers 12, 13, the P<+> layer 14 and the channel part 19 are formed, are removed to provide an insulating layer 17 and a chemically responding insulating layer 18. By this method, stable high accuracy measurement and mass production in good yield are enabled.

Description

【発明の詳細な説明】 (1)技術分野 本発明は化学的物質の濃度測定に用いる電界効果型半導
体センサに関する。
DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field The present invention relates to a field effect semiconductor sensor used for measuring the concentration of chemical substances.

(2〕背景技術 ケート絶縁型電界効果トランジスタ(MI 5FET 
)の構造を利用して、電解液中のイオン活量や他の化学
的物質の濃度などを測定する半導体センサは従来から知
られている。これらは、Ion 5ensitiveに
これ等に関する記載がある。しかし現在までに提案され
ているセンサは全て基体としてシリコンを用いている。
(2) Background technology Kate insulated field effect transistor (MI 5FET)
) Semiconductor sensors that measure the ion activity and the concentration of other chemical substances in an electrolytic solution have been known for a long time. There are descriptions regarding these in Ion 5 sensitive. However, all the sensors proposed to date use silicon as a base material.

にソース(2)、ドレイン(3)の各拡散領域をチャン
ネル領域(4)をはさんで離間して形成し、この基板表
面を5i02のような材料の絶縁層(5)で被覆してあ
り、ソース、ドレインのリード・コンククト用の金属層
(6)が設けである。そして、第1図では各々1000
λ程度の薄い被測定雰囲気不透過性膜(7)と、化学選
択性膜(8)が形成され、第2図では任意の厚さの導電
性物質層(9)と、薄い化学選択性膜が形成されである
The source (2) and drain (3) diffusion regions are formed spaced apart from each other with the channel region (4) in between, and the surface of this substrate is covered with an insulating layer (5) of a material such as 5i02. , a metal layer (6) for lead contact of the source and drain. In Figure 1, each number is 1000.
A thin film (7) impermeable to the atmosphere to be measured (about λ) and a chemically selective film (8) are formed, and in FIG. 2, a conductive material layer (9) of arbitrary thickness and a thin chemically selective film is formed.

このセンサは、実使用時には被測定雰囲気、例えば血液
などの溶液に直接浸漬する。このため化学選択性膜の部
分は直接溶液に接触し、リード線そのコンタクト金属な
どは絶対に溶液に接触しないように絶縁保護しなくては
ならない。従来、最も一般的な方法はエポキシ樹脂やシ
リコン樹脂により溶液不透過性を持たせる方法であった
が、これらの樹脂では長時間使用に耐えられず膨潤する
During actual use, this sensor is directly immersed in an atmosphere to be measured, for example, a solution such as blood. For this reason, the part of the chemically selective membrane comes into direct contact with the solution, and the lead wires and contact metals must be insulated and protected so that they never come into contact with the solution. Conventionally, the most common method has been to use epoxy resin or silicone resin to provide impermeability to solutions, but these resins cannot withstand long-term use and swell.

故にこの方法では充分な安定性、再現性が得られない。Therefore, this method does not provide sufficient stability and reproducibility.

る方法が提案されている。その方法は大別して次の2つ
である。
A method has been proposed. There are two main ways to do this:

(■)シリコンウェファをエツチングにより3次元的に
加工し、センサ素子の表面だけでなく、側面裏面を含め
た大部分を被測定雰囲気不透過性の絶縁膜で覆う。(例
えば特開昭55−24603)(11)基板にシリコン
を用いず絶縁性のサファイア基板を用い、その上に必要
最小限のシリコン層を形成してセンサを構成し、かつ、
その大部分を雰囲気不透過性の絶縁膜で覆う。(例えば
特開昭57−191539) これらの方法によるセンサは実用に耐え得る安定性、再
現性があるが、両方ともその製造工程に非常に高度な技
術を必要とし、かつその工程は複雑であり、一般のシリ
コンIC製造プロセスにはない技術を用いるため、歩留
よく大量生産することは現状ではほとんど不可能である
(■) A silicon wafer is processed three-dimensionally by etching, and not only the surface of the sensor element but also most of the side and back surfaces are covered with an insulating film that is impermeable to the atmosphere to be measured. (For example, JP-A-55-24603) (11) A sensor is constructed by using an insulating sapphire substrate without using silicon as the substrate, and forming a minimum necessary silicon layer thereon, and
Most of it is covered with an insulating film that is impermeable to the atmosphere. (For example, JP-A-57-191539) Sensors made by these methods have stability and reproducibility that can withstand practical use, but both require extremely advanced technology in the manufacturing process, and the process is complicated. Since it uses technology not found in general silicon IC manufacturing processes, it is currently almost impossible to mass-produce it with a high yield.

(3)発明の目的 本発明は長時間にわたり安定に精度よく測定が行なえ、
かつ、歩留よく大量に生産することができる超小形の電
界効果型半導体センサを提案することを目的とする。
(3) Purpose of the invention The present invention enables stable and accurate measurement over a long period of time.
Another purpose of the present invention is to propose an ultra-small field-effect semiconductor sensor that can be mass-produced with high yield.

(4)発明の構成 本発明はシリコン(Si )などの元素としてその性質
を示す等極結合結晶半導体では、あまり高抵抗な物質は
得ることができないが、GaAs+InPなどのa−V
族化合物半導体ではGaAsにはCr。
(4) Structure of the Invention The present invention proposes that although it is not possible to obtain a material with very high resistance in a homopolarly coupled crystal semiconductor that exhibits the properties as an element such as silicon (Si), a-V
In group compound semiconductors, GaAs contains Cr.

InPにはFe といった不純物をドープすることによ
り、107Ω・ぼ以上の高抵抗の半絶縁性物質が得られ
ることに注目したものである。
This paper focuses on the fact that by doping InP with an impurity such as Fe, a semi-insulating material with a high resistance of more than 107 Ω can be obtained.

GaAsはMIS構造では界面のフェルミ準位が禁制帯
中央付近にピンニングされ、しかも界面準位密度が10
110l3” eV−1台と太きいため絶縁膜の耐圧の
範囲内でGaAs 表面を反転させることも蓄積させる
ことも不可能である。
In GaAs, in the MIS structure, the Fermi level at the interface is pinned near the center of the forbidden band, and the interface state density is 10
Since it is large, on the order of 110 l3" eV-1, it is impossible to invert the GaAs surface or accumulate it within the withstand voltage range of the insulating film.

一方、InPはMIS構造の界面フェルミ準位のピンニ
ング位置が伝導帯に近く、界面準位密度も1012cI
n−2eV−1程度であり、n形基板に対しては蓄積層
、p形基板に対しては反転層が形成できる。
On the other hand, in InP, the pinning position of the interface Fermi level in the MIS structure is close to the conduction band, and the interface state density is 1012cI.
It is about n-2eV-1, and an accumulation layer can be formed for an n-type substrate, and an inversion layer can be formed for a p-type substrate.

InP基板によるl5FET は第3図に示すものであ
る。上面図の第3図(a)中のA−N線、B −B’線
、C−σ線に沿っての断面構造をそれぞれ第3図(b)
、第3図(c)及び第3図(d)に示す。但し、このl
5FETつて述べる。第4図、第5図、及び第6図はそ
れ(1)Fe をドープして、比抵抗が1070・儒 
以上の高抵抗となったInPの(100)面を基板00
として用いる。(第4図(a)、第6図(a)、第7図
(a))(11)半絶縁性InP基板ODの表面にZn
 をドープして、p−形のInP層0ηを形成する。(
第4図(b)、第5図(b)、第6図(b)) (iii) p一層00にドレイン用のn十層@とソー
ス用のn+N(13を不純物としてSを拡散することに
p十層(回をZn の拡散により形成する。(第6図(
d)) (v) Fレインコンタクト用(I■と、ソースル一層
共通コンタクト用0ヰの2つの金属層を形成する。
An 15FET using an InP substrate is shown in FIG. The cross-sectional structure along the A-N line, the B-B' line, and the C-σ line in the top view of FIG. 3(a) is shown in FIG. 3(b).
, shown in FIG. 3(c) and FIG. 3(d). However, this l
Let's talk about 5FET. Figures 4, 5, and 6 show (1) doping with Fe, with a specific resistance of 1070
The (100) plane of InP, which has a high resistance as described above, is
used as (Fig. 4(a), Fig. 6(a), Fig. 7(a)) (11) Zn on the surface of semi-insulating InP substrate OD
is doped to form a p-type InP layer 0η. (
(Fig. 4(b), Fig. 5(b), Fig. 6(b))) (iii) Diffusing S into the p layer 00 with the n10 layer @ for the drain and the n+N (13) as an impurity. Then, a p layer is formed by diffusion of Zn (Fig. 6 (
d)) (v) Form two metal layers: one for the F rain contact (I) and one for the source single layer common contact.

(第5図(d)、第6図(e))この形成方法としては
、AuGeN iとAuの選択蒸着を行なった後、Ar
雰囲気中で350°Cで数分間のシンターを行なう方法
が有力である。
(Fig. 5(d), Fig. 6(e)) This formation method involves performing selective vapor deposition of AuGeNi and Au, and then depositing Ar
An effective method is to perform sintering at 350° C. for several minutes in an atmosphere.

(vl)メサエッチングにより、チャンネル部0偵を形
成する(第4・図(d))用いるエツチング液としては
、HCl : H20z : H20=4 : 1 :
 6の混合液などがよい。
(vl) Forming channel portion 0 by mesa etching (Fig. 4 (d)) The etching solution used is HCl: H20z: H20=4:1:
A mixture of No. 6 and the like is good.

(viDp一層0])をその上にn十層(12,13)
p十層(縛チャンネル部叫が形成されている部分を除き
、エツチングにより除去する。(第4図(e)、程度の
絶縁膜a力を形成する。(第4図(f)、第5図(fへ
16図伝))これでこのチップはコンタクト部を除き、
下部は半絶縁性基板oQ1上部は絶縁膜α力で覆われる
ことになり、その絶縁性は充分に高いものになる。
(viDp 1 layer 0]) on top of it with n 10 layers (12, 13)
The p layer is removed by etching except for the part where the bonded channel portion is formed. (Fig. 16 Illustration to f)) Now, this chip except for the contact part,
The lower part is a semi-insulating substrate oQ1, and the upper part is covered with an insulating film α, which has sufficiently high insulation properties.

この絶縁膜の種類として考えられるものを〔〕内に示す
その形成方法と共に列挙すると、nativeoxid
e C熱酸化、プラズマ酸化、溶残中での陽極酸化) 
P3N5 (CVD )、 Sing (CVD、プラ
ズマCVD〕SigN+ (プラズマCVD :) A
l2O5(CVD 、減圧CVD 。
Possible types of this insulating film are listed together with their formation methods shown in brackets: native oxide,
e C thermal oxidation, plasma oxidation, anodic oxidation in molten residue)
P3N5 (CVD), Sing (CVD, plasma CVD) SigN+ (plasma CVD:) A
12O5 (CVD, reduced pressure CVD.

AI! のプラズマ陽極酸化、溶液中の陽極酸化、電子
ビーム蒸着〕などがある。
AI! plasma anodization, solution anodic oxidation, electron beam evaporation], etc.

(1x)化学感応用絶縁層(18)を形成する。(第4
図(g))その材料は測定対象物質により種々の拐料が
考えられる。例えば、H+イオンに対するTa205゜
Al 20 aなどの無機物や、特定のイオンに選択性
を □持つ様に組成を変化させたガラス、さらにはクラ
ウンエーテルを固定した膜などが考えられる。また、測
定対象物としてイオンだけでなく、酵素、杭体、結合た
んぼ(質などを選べば、それらに選択的に感応する生体
機能性材料(ex、グルコースニ対スるグルコースオキ
シダーゼ、尿素に対する08 などを用いる場合には絶
縁層07)にAA’20gを用いているならば、特に形
成せずに絶縁層(17)にH+イオン感応膜の役割を兼
ねさせることができる。
(1x) Form a chemically sensitive insulating layer (18). (4th
(Figure (g)) The material can be various types depending on the substance to be measured. For example, inorganic materials such as Ta205°Al20a for H+ ions, glass whose composition has been changed to have selectivity for specific ions, and even membranes with fixed crown ethers can be used. In addition, we can measure not only ions, but also enzymes, pile bodies, binding cells (if we choose the quality, etc.), we can also use biofunctional materials that selectively respond to them (e.g., glucose oxidase for glucose, 08 for urea). If AA'20g is used for the insulating layer 07), the insulating layer (17) can also serve as an H+ ion sensitive film without any special formation.

(5)発明の効果 本発明の最大の効果は従来のシリコン単結晶を基板とし
て用いている電界効果型半導体センサに比べて著しく簡
単な工程により、センサ素子自体の絶縁性が高いセンサ
を製造できることにある。
(5) Effects of the Invention The greatest effect of the present invention is that it is possible to manufacture a sensor with a highly insulating sensor element itself through a significantly simpler process compared to conventional field effect semiconductor sensors that use single crystal silicon as a substrate. It is in.

即ち、シリコンウェファをエツチングにより8次元的に
加工する必要もなければサファイア基板の」二にシリコ
ンをエピタキシャル成長させる必要モない。特にゲート
絶縁膜としてAJgO++を用いる場合には、このAl
2Os層に(1)ゲート絶縁膜、(li)H+イオン感
応膜、(lii)溶液不透過性膜という3役を兼ねさせ
ることにより、極めて簡単な構造で安定なpHセンサを
実現することができる。
That is, there is no need to process a silicon wafer eight-dimensionally by etching, and there is no need to epitaxially grow silicon on the sapphire substrate. In particular, when using AJgO++ as the gate insulating film, this Al
By making the 2Os layer serve the three roles of (1) gate insulating film, (li) H+ ion sensitive film, and (lii) solution impermeable film, a stable pH sensor can be realized with an extremely simple structure. .

実現するのに構造の簡単化、工程の簡略化が行なえるこ
とは製造時の歩留向上、ひいては低コスト化につながる
。さらにシリコンウェファをエツチングにより3次元的
に加工する方法と比較するとエツチング領域が不必要な
だけウェファの有効利用面積が大きく異なり、SiとI
nP の違いこそあれ同一面積のウェファから製造でき
るチップの個数が著しく増加する。 − また本発明の他の大きな効果としては、高い電子移動度
によりセンサの応答速度が向上することがある。これは
種々の制御、監視システムに本センサを応用する場合な
ど実時間性を要求されるときには非常に大きな利点とな
る。
Simplifying the structure and simplifying the process to achieve this will lead to improved yields during manufacturing and ultimately to lower costs. Furthermore, compared to the method of three-dimensionally processing a silicon wafer by etching, the effective usable area of the wafer is greatly different as the etching area is unnecessary.
Despite the difference in nP, the number of chips that can be manufactured from a wafer of the same area increases significantly. - Another major effect of the present invention is that the high electron mobility improves the response speed of the sensor. This is a great advantage when real-time performance is required, such as when this sensor is applied to various control and monitoring systems.

【図面の簡単な説明】[Brief explanation of the drawing]

パ、第1図、第2図は、従来のシリコンを基板として用
いた電界効果型半導体センサのゲート部分の基本構成断
面図で、第1図は薄い絶縁層のみの多層構造を示す図、
第2図は導電体層を含む多層構造の場合を示す図である
。第3図(a) 、 (b) 、 (C)及び(d)は
本発明の実施例たるInPを基板として用いた電界効果
型半導体センサの構成を示すための図である。第4図(
a) 、 (b) 、 (C) 、 (d) 、 (e
) 、 (f)及び値)、第5図(a) 、 (b) 
、 (C) 、 (d) 、 (e)及び(f)並びに
第6図(a)。 (b) 、 (C) 、 (d) 、 (e) 、 (
f)及び(g)は、それぞれ第3図(a)のA A’ 
r B B’並びにc−c’に対応する部分第3図(b
)、第3図(C)並びに第3図(d)の構造を作るため
の製造手順を示すための図である。 1 シリコン単結晶基板 2 ソース拡散領域 8 ドレイン拡散領域 4 チャンネル部 5 絶縁層(その1) 6 リードコンタクト用金属層 7 絶縁層(その2) 8 化学感応用絶縁層 9 金属等の導電性物質J・ご 10 半絶縁性InP基板 11 p−形1nP層 ]2 ドレイン用n十 層 13 ソース用n十層 14・ p一層接続用p十層 15 ドレインコンタクト用金属層 1G ソース・p一層共通コンククト用金属層17 絶
縁層 18 化学感応用絶縁層 19 チャンネル部 71関 へ 穴2関 電 方4圀 (L”I) 7 18 1iニー 、 」ニ島
Figures 1 and 2 are cross-sectional views of the basic configuration of the gate portion of a conventional field-effect semiconductor sensor using silicon as a substrate, and Figure 1 is a diagram showing a multilayer structure with only a thin insulating layer.
FIG. 2 is a diagram showing a multilayer structure including a conductor layer. FIGS. 3(a), (b), (C) and (d) are diagrams showing the structure of a field effect semiconductor sensor using InP as a substrate, which is an embodiment of the present invention. Figure 4 (
a), (b), (C), (d), (e
), (f) and value), Figure 5 (a), (b)
, (C), (d), (e) and (f), and FIG. 6(a). (b), (C), (d), (e), (
f) and (g) are A A' in FIG. 3(a), respectively.
Parts corresponding to r B B' and c-c' in Fig. 3 (b
), FIG. 3(C), and FIG. 3(d) are diagrams showing the manufacturing procedure for making the structures shown in FIG. 1 Silicon single crystal substrate 2 Source diffusion region 8 Drain diffusion region 4 Channel portion 5 Insulating layer (Part 1) 6 Metal layer for lead contact 7 Insulating layer (Part 2) 8 Insulating layer for chemical sensitization 9 Conductive material such as metal J・10 Semi-insulating InP substrate 11 P-type 1nP layer] 2 N10 layer for drain 13 N10 layer for source 14 P10 layer for p single layer connection 15 Metal layer for drain contact 1G For source/p single layer common contact Metal layer 17 Insulating layer 18 Insulating layer for chemical sensitivity 19 Channel part 71 hole to hole 2 side electric side 4 side (L”I) 7 18 1i knee, ”2 island

Claims (1)

【特許請求の範囲】 (])ゲート絶縁型電界効果トランジスタのゲート部上
に、特定の被測定物質にのみ選択的に感応する層を設け
たことを特徴とする電界効果型半導体センサにおいてセ
ンサ基体としてI−V族化合物半導体を用いたことを特
徴とする電界効果型半導体センサ。 (2)電界効果型半導体センサを構成する基板を比抵抗
が107Ω・m 以上の高抵抗の半絶縁性としたことを
特徴とする特許請求の範囲第1項記載の電界効果型半導
体センサ。 (3)センサ基体を…−V族化合物半導体のうち、In
Pとすることを特徴とする特許請求の範囲第1項、第2
項記載の電界効果型半導体センサ。
[Scope of Claims] (]) A sensor substrate in a field-effect semiconductor sensor characterized in that a layer selectively sensitive only to a specific substance to be measured is provided on the gate portion of a gate-insulated field-effect transistor. A field-effect semiconductor sensor characterized in that a group IV compound semiconductor is used as a semiconductor. (2) The field-effect semiconductor sensor according to claim 1, wherein the substrate constituting the field-effect semiconductor sensor is a high-resistance semi-insulating material with a specific resistance of 10 7 Ω·m or more. (3) Sensor base...- Among V group compound semiconductors, In
Claims 1 and 2 are characterized in that P.
The field-effect semiconductor sensor described in .
JP58190290A 1983-10-12 1983-10-12 Electric field effect type semiconductor sensor Pending JPS6082846A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58190290A JPS6082846A (en) 1983-10-12 1983-10-12 Electric field effect type semiconductor sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58190290A JPS6082846A (en) 1983-10-12 1983-10-12 Electric field effect type semiconductor sensor

Publications (1)

Publication Number Publication Date
JPS6082846A true JPS6082846A (en) 1985-05-11

Family

ID=16255705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58190290A Pending JPS6082846A (en) 1983-10-12 1983-10-12 Electric field effect type semiconductor sensor

Country Status (1)

Country Link
JP (1) JPS6082846A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63165747A (en) * 1986-12-26 1988-07-09 Kanegafuchi Chem Ind Co Ltd Amorphous semiconductor ion sensor

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56111454A (en) * 1980-02-06 1981-09-03 Kuraray Co Ltd Fet sensor
JPS5743863A (en) * 1980-08-28 1982-03-12 Tsunetoshi Kobayashi Heat insulating material
JPS57191539A (en) * 1981-05-21 1982-11-25 Nec Corp Semiconductor ion sensor
JPS59164951A (en) * 1983-03-11 1984-09-18 Hitachi Ltd Fet ion sensor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56111454A (en) * 1980-02-06 1981-09-03 Kuraray Co Ltd Fet sensor
JPS5743863A (en) * 1980-08-28 1982-03-12 Tsunetoshi Kobayashi Heat insulating material
JPS57191539A (en) * 1981-05-21 1982-11-25 Nec Corp Semiconductor ion sensor
JPS59164951A (en) * 1983-03-11 1984-09-18 Hitachi Ltd Fet ion sensor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63165747A (en) * 1986-12-26 1988-07-09 Kanegafuchi Chem Ind Co Ltd Amorphous semiconductor ion sensor
JPH0432344B2 (en) * 1986-12-26 1992-05-29

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