JPS6078157U - Electrostatic damage prevention device for semiconductor devices - Google Patents
Electrostatic damage prevention device for semiconductor devicesInfo
- Publication number
- JPS6078157U JPS6078157U JP17043383U JP17043383U JPS6078157U JP S6078157 U JPS6078157 U JP S6078157U JP 17043383 U JP17043383 U JP 17043383U JP 17043383 U JP17043383 U JP 17043383U JP S6078157 U JPS6078157 U JP S6078157U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- electrostatic damage
- semiconductor devices
- prevention device
- damage prevention
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structure Of Printed Boards (AREA)
- Elimination Of Static Electricity (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の一実施例を示す斜視図、第２図はその
要部拡大図、第３図は短絡用パターンを半田接続した状
態を示す図である。
１・・・半導体レーザ、−３・・・印刷配線基板、３ａ
。
３ｂ、３ｃ・・・印刷配線パターン、４，５・・・短絡
用パターン。FIG. 1 is a perspective view showing an embodiment of the present invention, FIG. 2 is an enlarged view of the main part thereof, and FIG. 3 is a view showing a state in which short-circuit patterns are connected by soldering. 1... Semiconductor laser, -3... Printed wiring board, 3a
. 3b, 3c...Printed wiring patterns, 4, 5...Short circuit patterns.
Claims (1)
線基板と、この印刷配線基板上に形成され且つ前記半導
体素子の端子が接続される複数の印刷配線パターンと、
この印刷配線パターンの内すくなくとも２本の印刷配線
パターンに夫々形成された短絡用パターンとよりなり、 前記半導体素子の不使用時、前記短絡用パターンを電気
的に結合することにより前記半導体素子を短絡し、以っ
て前記半導体素子の静電破壊を防止するようにしたこと
を特徴とする半導体素子の静電破壊防止装置。[Claims for Utility Model Registration] A semiconductor element, a printed wiring board to which the semiconductor element is attached, and a plurality of printed wiring patterns formed on the printed wiring board to which terminals of the semiconductor element are connected;
At least two of the printed wiring patterns are each formed with a shorting pattern, and when the semiconductor element is not in use, the shorting patterns are electrically connected to short-circuit the semiconductor element. An apparatus for preventing electrostatic damage of a semiconductor element, characterized in that the electrostatic damage of the semiconductor element is thereby prevented.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17043383U JPS6078157U (en) | 1983-11-02 | 1983-11-02 | Electrostatic damage prevention device for semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17043383U JPS6078157U (en) | 1983-11-02 | 1983-11-02 | Electrostatic damage prevention device for semiconductor devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6078157U true JPS6078157U (en) | 1985-05-31 |
Family
ID=30372070
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17043383U Pending JPS6078157U (en) | 1983-11-02 | 1983-11-02 | Electrostatic damage prevention device for semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6078157U (en) |
-
1983
- 1983-11-02 JP JP17043383U patent/JPS6078157U/en active Pending
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