JPS6074975A - Arm shortcircuit detecting circuit of inverter - Google Patents

Abstract

PURPOSE:To detect the arm shortcircuit of an inverter with a simple structure by constructing so that the arms of an inverter are connected through at least two GTOs directly with each other, and detecting the voltage therebetween. CONSTITUTION:If a gate ON signal is applied to a GTO 31 when the gate ON signal is applied to a GTO 32, the rise of a signal is not detected by a monostable multivibrator 221, and the multivibrator is not operated, but the arm shortcircuit is instantaneously detected. The multivibrator 221 forms an insensitive time zone to ignore the output of a monitor 21 for the prescribed time from when a gate ON signal is applied to any one of the GTOs of the arms, but when a gate ON signal is applied to the other GTO after the lapse of the time, the output of the monitor 21 is instantaneously set effectively, thereby detecting the arm shortcircuit.

Description

Detailed Description of the Invention [Technical Field to which the Invention Pertains] This invention relates to an inverter arm short-circuit detection circuit using a controllable valve such as a thyristor or a transistor, and particularly to a thyristor that can be turned off by a gate, such as a gate turn-off (GTO). ) An arm short circuit detection circuit suitable for use in an inverter using a thyristor.

[Prior art and its problems]

For example, if a GTO thyristor (hereinafter also simply referred to as GTO) is used, the upper and lower arms of one phase are simultaneously fired due to malfunction of the gate circuit, causing an arm short circuit. A power supply short circuit occurs due to the GTO element. In this case, even if an off-gate pulse is applied to the GTO element after detecting that an arm short circuit has occurred, the short circuit current may already exceed the maximum controllable current. , the GTO element has a characteristic that it will always be destroyed if an attempt is made to cut off a current exceeding the maximum controllable current.Therefore, if an arm short circuit occurs in an inverter using a GTO element, the GTO The device is not given an off-gate pulse, that is, the short-circuit current is not interrupted, to protect the GTO from destruction.Specifically, for example, a short-circuit thyristor connected in parallel with the GTO device is turned off. A method is adopted in which the fault current is shunted to the short-circuit thyristor by arcing, and its input side is cut off by a separately provided breaker.

For this reason, it is desirable to quickly detect arm short circuits, which has conventionally been done as follows.

Figure 1 is a circuit diagram showing a general example of a 3-phase, 6-arm GTO inverter, Figure 1A is a detailed circuit diagram showing a portion of Figure 1, and Figure 1B is for explaining its operation. This is a flowchart. In Figure 1, 1 is a DC power supply, 2
31-66 are GTO thyristors, 41-46 are feedback diodes, 51-56 are current-limiting reactors, 61-66 are free-wheeling diodes, and 71-76 are resistors. Current limiting reactors 51 to 56 are provided to suppress di/dt (rate of current increase) when feedback diodes 41 to 46 are off, to suppress di/dt when GTo and 51 to 36 are off, and to suppress short circuit current di/dt. , the energy is absorbed by the free-circulating diodes 61-66 and the resistors 71-76 when the GTO is off. Further, in FIG. 1A, 81 and 82 are snubber capacitors, 91 and 92 are snubber resistors, 101 and 102 are snubber diodes, and other symbols are the same as in FIG. 1.

That is, as the conventional arm short circuit detection method, symbols al, a2 . A DCCT (direct current transformer) is installed in the part indicated by a3 to detect the current in the arm, and when the detected value exceeds a predetermined set value, it is determined that the arm is short-circuited, and each GTO shown in Figure 1 A method is known in which the terminal voltages of the elements are detected, and when the terminal voltages of GTO elements connected to the same arm become zero at the same time, it is determined that the arm is short-circuited.

First, the former method will be explained in detail with reference to FIGS. 1A and 1B.

Now, at time t-1o, GTO31 is off,
Assuming that GTO32 is on, the load current IL
is circulating through the feedback diode 42 and the current limiting reactor 52. At this time, the waveforms of the arm current, the current flowing through the GTO 31, the terminal voltage of the GT061, the terminal voltage of the GTO 32, and the current flowing through the diode 42 are shown in Fig. 1B (a), (b), ()・), ( It is expressed as (d) and (e). Here, the GTO 32 is turned off at time t=t1 shown in FIG. 1B, and t=t
When GTO51 is turned on with 2, at this time diode 4
2 is in a conductive state, the upper and lower arms are temporarily short-circuited. The short-circuit current flowing from the power supply has a rising rate (di/d) determined by the current limiting reactor 51.
t), and the time t when this becomes equal to the load current IL
= t3, the feedback diode 42 is turned off. As a result, the snubber capacitor 82 is charged through the path of the power supply 1, the current limiting reactor 5.1, the GTO 51, the snubber capacitor 82, the snubber diode 102, and the current limiting reactor 52. Therefore, the arm current flowing through point a1 is the sum of the load current IL and the snubber charging current, as shown in Figure 1B (a), but this snubber charging current is equal to or equal to the load current. reach a larger size.

Therefore, in order to detect an arm short circuit using the current flowing through 81 points, the detection level must be set to a value higher than this, which has the disadvantage that there is a time delay in actually detecting an arm short circuit. . Furthermore, if the current limiting reactor is made larger in order to reduce the charging current, there are five drawbacks: the loss of the energy absorbing circuit increases, making it impractical. Furthermore, the above-mentioned method requires six expensive CCTs as detectors, which poses an economical problem.

Next, the latter method will be explained.

In this method, the terminal voltage of the GTO thyristor is approximately zero when it is on, and therefore, when the arm is short-circuited, it is connected to one arm.
Since the terminal voltages of both become zero at the same time, an arm short circuit is detected. Therefore, if the terminal voltages of GTO 31 and 32 are expressed as shown in Figure 1B (f) and (g), respectively, then the logical sum (OR) of these two signals
An arm short circuit can be detected by a signal such as that shown in FIG. 1B (h). However, according to this method, there is a period when the signal is zero as shown in FIG. 1B even when charging the snubber capacitor as described above, that is, from time t2 to t3' in FIG. 1B. However, it has the disadvantage that it is impossible to distinguish between such pseudo short circuits and true arm short circuits. In addition, in this method, a detection circuit must be provided for each GTO element, so
Not only is it expensive, but the circuit configuration is complicated, which poses problems in terms of reliability.

[Purpose of the invention]

The present invention has been made in view of the above, and an object of the present invention is to provide a drop detection circuit that can detect arm short circuits of an inverter easily, inexpensively, quickly, and reliably.

[Key points of the invention]

Each phase (arm) of the inverter circuit is configured by connecting a current limiting reactor, an upper arm GTO, a lower arm GTO, and a current limiting reactor in this order, that is, at least the upper GT
If O and the lower GTO are directly connected, the voltage between the anode of the upper arm GTO and the cathode of the lower arm GTO is
This is detected by focusing on the fact that when an arm is short-circuited, it becomes almost zero.
By not detecting a short circuit in the arm for a predetermined period after the ignition of the arm, that is, by providing a detection dead zone, it is possible to prevent the detection of a pseudo arm short circuit such as the one during charging of the snubber capacitor described above.

[Embodiments of the invention]

FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 2A is a waveform diagram of each part for explaining its operation. As is clear from FIG. 2, this embodiment is characterized in that a voltage monitoring circuit 21 and a logic circuit 22 are provided in the circuit shown in FIG. 1A. Note that 26 is a voltage dividing resistor. The voltage monitoring circuit 21 includes a photocoupler 211 and a shunt circuit 212.
The voltage between the anode of GTO3i and the cathode of GTO32 is divided by a voltage dividing resistor 26 and a shunt circuit 212.
Detected through. Furthermore, from the photocoupler 211,
As long as the GTOs 31 and 32 are operating normally, a low level signal is obtained, and when an arm short circuit occurs, a high level signal .[No. 8] is obtained. On the other hand, the logic circuit 22 is composed of a monostaple multivibrator (hereinafter simply referred to as monoste) 221, an or gate 222, an AND gate 223, etc. GTO is input to the input side of the OR gate 222.
Firing signals 31 and 32, ie, gate-on signals, are input. For example, the monoste 221 operates at the rising edge of its input signal and sets its output to a low level for a predetermined period of time, thereby blocking the output of the monitoring circuit 21 by using an AND gate 223.

In this configuration, the main circuit is the 1A or 1B
Assuming that the device operates in the same manner as shown in the figure, the operation waveforms of each part can be expressed in exactly the same way as shown in FIG. 2A. And in this case as well, the time (2 to 137
The monitoring circuit 21 is activated by the above-mentioned pseudo arm short circuit that occurs during this period, and the blade as shown in the figure (f) is obtained, but during this time, the blade cannot be ejected from the monoste 221 as shown in the same figure (g). Since the voltage is .., the AND gate 226 is not established, and therefore, no output is obtained from the logic circuit 22 as shown in FIG. In addition, (g) in the same figure shows the firing signal (gate-on signal) of GTO31, (h) shows the gate-on signal of GTO32,
(su) is the OR signal of these gate-on signals,
In other words, it is the output waveform of the Orgame-1-222 shown in FIG. On the other hand, in this state, as shown in Fig.
When a gate-on signal is given to O32 and a gate-on signal is given to GTO31 as shown in FIG. Figure (le)
As shown in Figure 1, arm short circuit is detected instantaneously.
evening. In other words, the monoste 221 creates a dead time period in which the output of the monitoring circuit 21 is ignored for a predetermined period of time after a gate-on signal is given to either one of the GTOs in each arm, but after that period the output from the monitoring circuit 21 is On the other hand, when a gate-on signal is applied, the output of the monitoring circuit 21 is instantly enabled to detect an arm short circuit. Note that the dead time period by the monoste 221 is determined as follows.

That is, for example, TI is the time from when the GTO 31 is turned on until when the feedback diode 42 is turned off.

If the time taken for the charging voltage of the snubber capacitor B2 to reach the detection level of the voltage monitoring circuit 21 is T2', the period T3 during which the monitoring circuit 21 detects zero voltage is expressed as T'3 = TI + T2'. (where T1 is a function of the load current,
When the load current is maximum, 'r1 (T3) is maximum, so if T3 at that time is Ta2, the above monostage 2
The dead time period TM of No. 21 is determined as follows: TM') T 3 '. Further, the above TI is expressed as follows. Note that in the above equation, L is the inductance of the light-limiting handle, IL is the load current, and Ed is the power supply voltage. Furthermore, if the capacitance of the snubber capacitor is Cs, its charging time T2 is expressed as follows.
It is a constant straightness regardless of the situation.

Although the above example uses a GTO thyristor as a controllable valve, this invention is not limited to this, and can be widely applied as an arm short circuit detection circuit of a general inverter circuit.
It is something that

〔Effect of the invention〕

According to this invention, each arm of the inverter circuit is configured such that at least two GTOs are directly connected to each other and the voltage between them is detected, so the configuration of the detection circuit is simple and inexpensive. It has advantages. In addition, since a predetermined period of time after the gate-on signal is applied to either GTO of each arm is set inactive so that false ground/short circuits are not detected, detection becomes more accurate and reliability is improved. It is something that brings.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing a general example of a 6-phase inverter main circuit using GTO Zyristors, Fig. 1A is a detailed circuit diagram showing one phase of the impark shown in Fig. 1, and Fig. 1B The figure is a waveform diagram of each part to explain the operation of FIG. 1 or 1A, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG.
The figures are waveform diagrams of various parts for explaining the operation. Code explanation 1...Power supply, 2...Motor, 21.-
...Voltage monitoring circuit, 22...Logic circuit, 2
6...Voltage dividing resistor, 31-36...GT
O thyristor, 41-46-... Feedback diode, 51-56... Current-limiting diode, 61-66
...Freewheeling diode, 71-76...
g4L 81.82... Snubber capacitor, 9
1゜92...Suba resistance, 101.102
... Curved snubber diode, 211 ... Photo coupler, 212 ... Shunt circuit, 221 ...
・Mono stable multi-by break, 222...
...Oagoo), 223...AndGate Agent Patent Attorney Akio Namiki Agent Patent Attorney Kiyota Matsuzaki 114 IB Figure 2

Claims (1)

[Claims] 1) At least a direct connection between the upper controllable valve and the lower controllable valve provided in each arm of the inverter circuit, so that the anode of the upper controllable valve and the cathode of the lower controllable valve A voltage monitoring means for monitoring the voltage between the two and a calculation means for performing a predetermined logical operation based on the monitoring voltage and the firing signal given to each controllable valve are provided for each arm, and each arm is provided with a voltage monitoring means for monitoring the voltage between An arm short-circuit detection circuit for an inverter, characterized in that it detects a short-circuit in an arm, 12. In the arm short-circuit detection circuit according to claim 1, the forward bend calculation means is connected to an upper side connected to each arm. or an inverter arm characterized in that a short circuit in the corresponding arm is not detected by blocking output from the monitoring means within a predetermined period of time after an ignition signal is given to either one of the lower controllable valves. Short circuit detection circuit. 3) In the arm short-circuit detection circuit according to claim 2, the calculation means is configured to detect that an ignition signal for one of the upper or lower controllable valves connected to each arm has already been detected. An arm short-circuit detection circuit for an inverter is characterized in that when an ignition signal is issued to the other controllable valve in a state where the controllable valve is activated, an arm short-circuit is detected at that time.