JPS6074897A - Recording and reproducing device of color video signal - Google Patents

Abstract

PURPOSE:To stabilize the reproduction of an SECAM system by stabilizing the oscillation frequency of a voltage control oscillator, which constitutes an automatic frequency control loop, at a balanced area between functions of a mislock detector and a compensating circuit, and shifting the stabilized oscillation frequency from the frequency of PAL system. CONSTITUTION:The oscillation signal of a voltage control oscillator 60 and a reproduced horizontal synchronizing signal Hp are supplied to a mislock detecting circuit 63. The frequency difference between both input signals is reduced within a fixed range, and the outputs of both signals are applied to a control terminal of the oscillator 60. The oscillation frequency and the phase of the oscillator 60 are controlled according to the voltage with which the phase detection output of a phase detecting circuit 55 is applied to the control terminal. Then a compensating circuit 70 applies the compensating voltage to the control terminal of the oscillator 60 in a signal processing mode of an SECAM system. Thus the oscillator 60 has stable oscillations with a frequency lower than the normal frequency of the oscillator 60 by an amount equivalent to a horizontal frequency fH in accordance with the function of the circuit 63.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a color video signal recording and reproducing device, and is a device capable of recording and reproducing color video signals of at least two systems, PAL and SECAM.

[Technical background of the invention and its problems]

In general, color video signal recording and reproducing apparatuses (hereinafter referred to as VTRs) capable of recording and reproducing both the PAL system and the SECAM system have different processing forms and color synchronization methods when processing signals of both systems. V that handles both types of signals
In TR, in order to realize circuits that process signals of different systems with a minimum number of circuits, circuits are shared as much as possible. For example, in the FAI system, the reference oscillator is 4.433619MHz.

In the SBCAM system, it is desirable to use 4.40625MH2, but in order to simplify one circuit and reduce the cost, it is removed and 4.433619M is used for 8BCAM signal processing.
In many cases, the Hz PAL oscillator is shared.

As mentioned above, as a reference oscillator, 4.4062M
A method using something other than Hz will be called a pseudo-SECAM method. and.

The method using 4-40625 MHz will be called the French SECAM method. Therefore, when referring to pseudo-SECAM tape, PAL/SEC
Refers to a tape recorded by V'l''H that can record and play back both AM and French SECAM systems.
-P and IUtjA refer to tapes recorded on a VTR dedicated to the SECAM system.

VTRs for recording and playback are compatible with each other. However, if an attempt is made to play back a French SFliCAM tape with a pseudo SECAM VTR, a problem will occur.

The color synchronization means during recording generally uses an automatic frequency control (AFC) loop when handling 8BCAM signals;
This is also common to the FiCAM method.

Therefore, the difference between the reference oscillation frequency of VT)'L used during recording and the reference oscillation frequency used during reproduction results in a frequency shift of the reproduced signal.

That is, if the reference oscillation frequency is abbreviated as 10sc, the frequency of the reproduced DR signal is: Frequency of reproduced signal - ((10sc on recording side) + (44±N) fH - DR
l... (1) The first term in equation (1) represents the frequency of the frequency conversion carrier during reproduction, and the second term represents the frequency of the recorded reduced conversion color signal. The same applies to DB. D.R., D.
Organizing each signal of B, D'R0 (708C on the playback side) - (/QSC on the recording side)
+DRD'3 = (10sc on the playback side) - (70sc on the recording side
8C) +DB However, DR = 4.40625KHz DB = 4, 25 MHz Therefore, if the reference oscillation frequency 10sc is the same on the playback side and the recording side, a playback signal with exactly the same frequency as the original signal can be obtained. , if they are different, the playback will be shifted by the difference.

Since the SECAM signal is FM modulated, the frequency of the signal is 4.433619MHz - 4,40625MH2 =
Even if there is a difference of about 30 KHz, the overall color may be reddish (if the difference is -30 KHz) or bluish (+
A deviation of 30 KHz) will not cause a fatal defect.

However, the television receiver is PAL/8ECA
If the device can receive both M types, French S
A tape recorded with an ECAM system VTR is
DR = 4.4 when played on a cAM system VTR
33619 MHz, which is the same frequency as the PAL signal, so the receiver misidentifies it as PAL, resulting in a defective phenomenon in which one color appears mottled.

On the other hand, in the opposite case, that is, when a French SBCAM system VTR plays back a tape recorded on a pseudo-SEC'AM system VTR, the frequency of %DR is as follows.

4.40625MH! Although it is about 30 KHz lower than
Since no misjudgment occurs on the receiver side, a slight reddish tinge in the color does not constitute a problem.

Therefore, it has been desired to solve the problems that occur when playing back a tape recorded by a French SECAM system VTR in the pseudo-SECAM system VTR.

Two improvement measures have been proposed in recent years to solve the above problems.

The first proposal is that the reference oscillator is not shared by each system within the VTR, and if
The purpose is to prepare a reference oscillator that oscillates at 4.432973MH2 with a low H value. This is French SECAM
When playing a tape based on the system, the DR is 4-43.
3619 MHz-, t fH, 4.43361
The frequency is about 4 KHz lower than 9 MHz, and the above-mentioned malfunction can be prevented.

4', 40 while preparing a reference oscillator exclusively for 8BCAM.
The reason why a 625 MHz one was not adopted was as a result of placing more importance on compatibility with the previous pseudo-SECAM system VTR.

The second proposal is that the reference oscillator is 4°433619MHz
As is, the AFC loop during recording is (44±1) fH as before, but the AFC loop is formed at (44-7) fH only when reproducing the 8ECAM signal. According to this method, when playing the catalog.

D', = (4,433619MHz + (44-7)f
H) 1, and the frequency is shifted from the original signal of 4.40625 MHz, but at a level that is completely undetectable on the screen. When playing back French SECAM tapes, which caused a problem.

D'R=(4,433619MH2+(44-,)fH
)-(4-40625MHz +(44*') f
H-DR1=4-433619 MHz -! −／
H (or once fH) 8 and is further away from 4.433619 MHz by more than kfH, so it will not cause the above-mentioned malfunction of the television receiver.

The first proposal described above requires the addition of a new reference oscillator, resulting in an increase in cost. The second proposal can be realized at low cost and is effective, but there is a problem in that it cannot be applied to a VTR having a reproduction system as shown in FIG.

The color signal processing circuit shown in FIG. 1 is NTSC.

It is designed to be able to perform signal processing in three formats: PAL and SBCAM.

FIG. 1(A) shows the recording mode, and FIG. 1(31 shows the playback mode. In FIG. The low frequency converted color signal output from the frequency converter 12 is combined with the luminance signal and supplied to the video head 13.

The frequency converter 12 requires one conversion carrier.

The burst gate circuit 14 is a circuit that extracts a burst signal from the chroma signal of the input terminal 11. The burst signal extracted by the burst gate circuit 14 is applied to one input terminal of an automatic phase control detection circuit, ie, an APC detection circuit 16, via a switch 15 during NTSC and FAI signal processing. APC beach detection circuit 16.

The output of the 4°433619 MHz voltage controlled crystal oscillator, that is, VXOzy, is compared in phase with the burst signal, and the VXOZ 7 is output according to the phase comparison result.
oscillation output. Therefore, NTSC system and PA
During L-system signal processing, the oscillation output of 17 (3) is controlled so as to follow the phase of the burst signal. On the other hand, SECA
During M method signal processing, the switch 15 is turned off,
VXO17 becomes 71J-oscillation and becomes 4.433619
Oscillates at MHz.

On the other hand, 18 is a horizontal synchronization signal input terminal, and the horizontal synchronization signal inputted here is inputted to one end of an automatic frequency control detection circuit, that is, an AFC detection circuit I9. This AFC
The detection circuit I9 receives a horizontal synchronization signal and a frequency divider 22 or 23.
The frequency and phase are compared with the output signal of , and the detected output is used as the control voltage of the voltage controlled oscillator 20 (hereinafter referred to as VCO). The output of the VCOzo is input to a frequency divider 22 or 23 via a switch 21 and to a balanced modulator 26 via a frequency divider 25. The output of the VXOry is also input to this balanced modulator 26, and the output obtained by balanced modulation of both human forces is supplied to the frequency converter I2 as a carrier. In the case of this APC loop, when processing CCIR system signals.

During signal processing using the NTSC system, the switches 21 and 24 are switched to obtain an output frequency of (44X8-2)fH. That is, C
During signal processing using the CIR method, the branching unit 22 is selected and the NT
During SC system signal processing, the frequency divider 23 is selected.

In FIG. 1 [F]), the separated low frequency converted color signal reproduced from the video head 31 is introduced into the frequency converter 32, converted to a color signal of the original frequency, and output to the output terminal 33. be done. The reproduced color signal is also supplied to the burst gate circuit 34. The burst signal derived from the burst gate circuit 34 is applied to one input terminal of the APC detection circuit 35. The other input terminal of the APC detection circuit 35 is supplied with an oscillation output from a crystal oscillator 36. The detection output of the APC detection circuit 35 is applied to the input terminal 37a of the switch 37.

The input terminal 37a is selected during signal processing of the NTSC system and the PAL system. The detection output of the APC detection circuit 35 is given to the control terminal of the C038 via the switch 37. The output of VCOzs is sent to a balanced modulator 40 via a splitter 39. The output of the crystal oscillator 36 described above is also added to the balanced modulator 40, and its balanced modulation output is inputted to the frequency converter 32 as a carrier. Therefore, when processing NTSC and PAL signals, color synchronization is performed only by the APC loop. At this time, the %APC loop occurs when the frequency of the reproduced signal deviates from the normal state by n-fH (n: natural a, /H: horizontal synchronization frequency), that is, taking PAL as an example.

4.433619 MHz: It is stable even when n ・fH, and can have f, = AF. This state is called mislock. In order to prevent this mislock state, a mislock detector 41 is provided.

The mislock detector 41 receives a horizontal synchronization signal (Hp) and V
VC038 is controlled so that the phase of the output of OCss is detected and the frequency relationship between both signals is within a certain range. It provides the ila voltage.

Next, during SECAM signal reproduction processing, the switch 37 is switched to the terminal 37b side.

In this case, AFC detection circuit 431 switch 7, VC
Ozs, a Loubuch AFC loop of the frequency divider 44 is formed. The AFC detection circuit 43 obtains the frequency and phase detection output of the output of the frequency divider 44 and the horizontal synchronizing signal of the input terminal 42, and supplies this to C038 as a control voltage. Therefore, during SECAM signal processing, color synchronization signal processing is performed only by the AFC loop.

As mentioned above, when the switch 37 is set, the %
In a color signal processing system in which the control loop is switched between PAL and SBCAM systems, the second proposal described above cannot be realized.

This is because the AFC loop of (44-L)7H cannot be constructed during playback.

[Purpose of the invention]

This invention was made in view of the above circumstances, and the NTS
Color video signal recording that allows stable playback signal output with a simple configuration even when playing back a tape recorded by the French SECAM method in a VTR that can record and play back C, PAL, and S'ECAM signals. The purpose is to provide a playback device.

[Summary of the invention]

In particular, when reproducing signals of the 8ECAM system,
What is the oscillation frequency of the VCOeo that operates the PC loop and makes up this loop?

Stabilization is achieved where the action of the mislock detector 63 and the action of the compensation voltage applied from the compensation circuit 71 are balanced, and this stabilized oscillation frequency is a frequency that is shifted from the frequency used in the PAL system. It is set so that

As a result, the vCO60 can be used for PAL playback as well as SECAM playback.
Furthermore, even if a SECAM system reproduction signal is input to a color television receiver capable of using both PAL/8BCAM systems, the receiver will not make an erroneous determination.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

The apparatus of the present invention has a recording system which is the same as that shown in FIG.

FIG. 2 shows a reproduction system, where 51 is a video head, and the low-pass converted color signal reproduced here is separated and extracted by a bandpass filter and input to a frequency converter 52.

This frequency converter 52 converts the low frequency converted color signal into a color signal of the original frequency and outputs it to an output terminal 53.

The output color signal of frequency converter 52 is also supplied to burst gate circuit 54 . The burst signal derived from the burst gate circuit 54 is applied to one input terminal of the APC detection circuit 55. The other input terminal of the APC detection circuit 55 is supplied with an oscillation output from a crystal oscillator 56 .

The output of the NPC detection circuit 55 is connected to a resistor 57. capacitor 5
8 and is applied to the control terminal of the heavy pressure control oscillator VCOt;o via the switch 59.

One end of the series circuit of resistor 57 and capacitor 58 is connected to power supply VB, and the other end is grounded.

Then, the AP is connected to the connection point between the resistor 57 and the capacitor 58.
The output terminal of the C detection circuit 55 is connected. vCO6
The output of 0 is applied to the branching unit 61 and also input to the mislock detector 63. The output of the splitter 61 is input to a balanced modulator 62. This balanced modulator 62 includes:
The output of the crystal oscillator 56 mentioned above is also added.

This balanced modulation output is input to the frequency converter 52 as a conversion carrier.

The mislock detector 63 detects the output frequency of vC060,
This circuit applies a correction voltage to the control terminal of the vCO 60 in order to maintain the frequency of the reproduced horizontal synchronizing pulse in a predetermined relationship.

The mislock detector 63 is configured as shown in FIG. 3, for example. In FIG. 3, 64 is a horizontal synchronizing pulse input terminal, and 65 is an oscillation output input terminal of vCO6o. The horizontal synchronizing pulse (Hp) is frequency-divided by a frequency divider 81 and input to a detection circuit 82 . The oscillation output (O8-i) is input to the XY counter 83. This XY counter 83 counts the oscillation output using, for example, two counters, and inverts the output level when each count value reaches a predetermined value. In its operation mode, as shown in FIG. 4, when one oscillation output (O8-1) is outputted X times, the first output XA changes from low level to high level. In addition, the second output YA is the oscillation output (
O8-1) goes from high level to low level when Y counts are counted. Counting and counting operations are performed by the reset circuit 84.
The process starts from when the reset pulse RP is applied.

The detection circuit 83 includes the first. When the second outputs XA, YA are at the low level 1 high level H, the area F7. 1st. Second output XA.

Y A Kahi level H% Toki with high level H is
Area F2, 1st. When the second outputs XA and YA are a combination of 71 high level H and low level L, it can be determined that the area is in region F3.

Here, the determination is made when the timing pulse 2 from the 5-band divider 8I is input. timing pulse Z
is the frequency information of the horizontal synchronization pulse.

Depending on the above logic determination, the detection circuit 82 can basically obtain a mislock detection voltage having the characteristics as shown in FIG. When the mislock detection voltage is higher than the reference voltage, the phase of the timing pulse Z is %1. Second output XA.

Since this is ahead of the level change phase of YA, the frequency of the oscillation output of C060 is increased, and control is performed so that the timing pulse Z falls within the range kjlF2. Conversely, the phase of the timing pulse Z is in the region F3.
When the mislock detection voltage is lower than the reference voltage, it means that the position of the timing pulse Z is delayed.

(2) The rooting output frequency of C060 is also controlled to be low, and an operation is obtained in which the timing pulse Z comes within the region F2.

The above is a basic operation explanation of the mislock detector 60, but in reality, it operates as shown in FIG.

Within the area F2, there are further areas F2a and F2b,
The output voltage of the detection circuit 82 is set to change in even smaller steps.

This means that when detecting the phase position of the timing pulse Z within the region F2, a counter using a finer clock is stopped at the timing pulse, and the output voltage value is selected according to the count value. realized by

In FIG. 6, fo is the regular oscillation frequency of the VCO 60, and during CCIR processing, that is, in PAL mode,
Aah: (44X 8-1) fH# Bch
: (44
X8-2) Let fH be the control target frequency. Here, the sixth
The relationship between frequencies f and f6 shown in the figure is as follows.

f4=fo −fH, fH=f6 ” fH−fB =
/6-i/HIfa = t o '' 2 fH.Furthermore, an offset by a switching pulse can be applied to vCO60 via switch 67 to switch between 71ch and Bch.In other words, during CCIR processing, , the switch 67 is set to the terminal 67a side, whereby %vC060 obtains switching of (44X8±i) fH by the switching pulse. Therefore, at this time, the characteristics of the mislock detector 63 are also as shown in FIG. The frequency positional relationship between fo and f1 to fIl shown in FIG. 6 is repeatedly shifted in synchronization with the switching pulse while maintaining this relationship.This can be done by changing the preset value of the counter in the mislock detector 63.

Returning to FIG. 2, the output terminal of the mislock detector 63 is grounded via a capacitor 687j and connected to the switch 59 via a resistor 69 to form a control loop. There is.

Next, in one embodiment of the present invention, a compensation circuit 71 is provided which is used during SBCAM reproduction. A high level voltage is applied to the control terminal 72 of the compensation circuit 71 during SECAM processing, and PAL.

During NTSC processing, a low level voltage is applied. The control terminal 12 is connected to the transistor 7 via a resistor 73.
Connected to the base of 4.

The emitter of transistor 74 is grounded, and the collector
Resistor 57 via a parallel circuit of resistor 75 and capacitor 76
and the connection point of the capacitor 58.

During SECAM processing, the transistor 74 is turned on, and as a result, the output voltage of the 1-phase detection circuit 55 is
．． 75, it becomes Vcc XRI/(R1+R53). However, FLl is the value of resistor 57, and R3 is the value of resistor 75.
is the value of

Here, vccXR1/(R1+R3) (7) value is V
R1 and R3 are selected so as to be sufficiently lower than the value when the control 1 voltage is not applied to the CO 60.

As a result, the output frequency of vC060 becomes lower by fD shown below.

fD=(control sensitivity of vCO60) Here, the control sensitivity of vCO is the APC detection circuit 55
Express the rate of change in 700 frequency when the control voltage, which is the output of Also, the average value voltage is vC
This is the voltage at the control terminal when no control voltage is applied to O, that is, when it oscillates freely.

Now, assuming that the free run frequency of the VCO 60 is adjusted to the regular fo, the output of the VCO tso will be once immediately after the start of SRCAM playback (at the rising edge of 1ζ').

The frequency is fo-fD. Here, fo−fD<1
The above Vc c x a x /(Ri
+ R3) 'e If the voltage is set sufficiently low, the mislock detector 63 will operate and the high voltage VH shown in Figure 6 will be activated.
is fed back, so the oscillation output frequency of VCOr0 increases from fo-fD toward fo. Due to this effect, when the oscillation output frequency becomes higher than f4, it becomes the dead band region (/, ~/, ) of the mislock detector 63, so that the condition ``■'' occurs again. c x R1/ (Rl + R3) <
The frequency decreases due to the average value. Oscillation output frequency is f4
If it falls below that, the mislock detector 63 will operate again.
It works to increase the frequency.

By repeating this process, the VCO 6o converges to the oscillation output frequency of 8. In reality, these responses quickly and instantaneously converge to f4. This convergence position is determined by the force relationship between the action of the resistor 57.75 to lower the frequency and the control of the mislock detector 63 to raise the frequency.

It is also possible to set it between f3 and f4. resistance 57
．． If the action by 75 is strengthened, the mislock detector 63
The linear operating region f3~! , that is, the point is between f and f4 or near f. Conversely, if the operation of the mislock detector is made stronger, f4 or! It converges towards 4. In either case, a stable oscillation frequency can be obtained by utilizing the linear operation (f3 to /4) characteristic of the mislock detector 63.

The following explanation will be continued assuming that the oscillation output frequency of vC060 converges to f4. As described above.

During reproduction processing using the SECAM method, the oscillation frequency of VCOr0 is stably oscillated at a low frequency f4 that is shifted from fo by fH, but this operation is possible even if the free run frequency of VCOr0 varies.

Stable operation.

That is, FIG. 7 shows the operating situation when the oscillation output frequency of VCOr;o is pulled to f4 in the APC loop. In FIG. 7, the horizontal axis is frequency and the vertical axis is time, showing how the frequency is transiently drawn to f4.

If the free run frequency of VC060 is at the normal Io (point ■ in the figure), during the SECAM method playback process, it will temporarily drop to (fo - fD) (point ■ in the figure),
Converges to f4. Also, the free run frequency of VCO6o is f. -Δf, (0 point shown) once (10
−Δf)−fD (point 0 in the figure) is detected by the output voltage of the mislock detector 63 at a frequency higher than f4 (1 point).
If it can be pulled back to 0-Δ/)-/D+/E (point ■ in the diagram).

It can converge to f4. That is, the limit of 10-Δf, that is, the lower limit of the adjustment value, is given by fE, which is the amount of change in vCO60 when the mislock detector 63 outputs the maximum DC limit pressure (VH'').

The frequency once lowered to (/, -Δf)-fD is (10
-Δf)-fD+f, (point ■ in the figure) can be returned. Therefore, if the condition C1, -Δf)-fD+fE>f4 is satisfied, it can be converged to f4.

Conversely, the free run frequency of VCOr0 is /, +Δf
(point in the diagram), this upper limit is %
(10+Δf) -fD < /4 (■ point in the figure)
If it satisfies, it can be converged to %f4.

That is,! 4. By once lowering the frequency to a lower frequency, the control operation of the mislock detector 43 is started.

To summarize the above, the lower limit is -'E-(fD-/H)>Δf, and the upper limit is Δf<fD-fH. Furthermore, if /H is omitted from both equations, fF, -fD>Δf Δf<fD. From this, if you set it to about b'Wζ2fD, the free run frequency coverage range of vC060 is
It becomes D.

Here, /E is (■C060 control sensitivity) x (V
It is determined by the potential difference between the equilibrium values of the control terminals of COr0.

(2) Since the control sensitivity of C06o is as high as 200 to 300 KH2/2, fE has a value of 200 to 200 KHz, which is at least on the order of 100 KHz. This is a natural problem due to the role of the mislock detector 63, but originally the PA
Since the color synchronization effect is performed by the APC loop during signal reproduction processing of the L system and NTSC system, the control sensitivity at the control terminal of the VCOeo is high, and the mislock detector 63
The coverage range of the DC output is set to be very wide in order to pull back the large deviation of the transient CO output frequency at the start of reproduction. Therefore, the above VCOe
The free run frequency coverage range of o is ±100 K
It becomes extremely wide above Hz.

That is, to summarize the above, as shown in FIG. 8, the free run frequency of VCOeo is 5.4 in FIG.
MHz to 5.7 MHz (7) Regardless of the setting, the APC loop, mislock detector 63, and compensation circuit 71 operate to settle down to frequency 1, that is, the pull-in frequency, which is f4. , (shown by the characteristic line 8) This means that the VCOt for realizing the present invention;
The degree of freedom in adjusting and designing o is sufficiently wide, therefore, in order to realize the present invention, there is no need to particularly improve the accuracy of adjusting VCOeo, and it is sufficient to adjust VCOeo for PAL signal processing. shows.

The device of the invention operates as described above.

When reproducing signals using the SECAM method, the VCOeo
The oscillation frequency of is the normal f. It is lower by fH than that! It is controlled to oscillate by lowering it to 4.

In this case, the operating modes of the device of the present invention are as follows:
There are four operating modes: ■ and ◎.

■ The mislock detector 63 is in %PAL mode, and V
A switching pulse is applied to COeo via switch 57.

■ The mislock detector 63 is in NTSC mode,
A switching pulse is applied to VCOso via switch 67.

◎ The mislock detector 63 is in NTSC mode.
No switching pulses are given to VCOeo.

0 The mislock detector 63 is in the N'I'SC mode, and a switching pulse is applied to the VCOeo via the switch 67. Furthermore, the resistance R of the compensation circuit, 57
, R375 and power supply VB are omitted.

The operating modes of ◎ to ◎ above will be explained in order below.

■: Mislock detector 63 is in PAL mode, and VC
When a switching pulse serving as an offset is given to O6'o.

%VCOe during SECAM method signal reproduction processing.

The frequency of Ach: (44X8-1)fH-fH
.

Bah; (44X8+1) fH - fH.

Therefore, when a SECAM system signal is recorded and reproduced by the apparatus of the present invention, that is, when a pseudo SECAM system tape is reproduced, the reproduction signal frequency is as follows.

=(4,433619MHz+(44±-)fH-DR
I above, the frequency of D'R, I)'B is far from the PAL frequency of 4.433619MHz, so F A
I, /SECAM Even if a SECAM format receiver plays back the data, the receiver will not mistakenly determine that it is a PAL format.

Next, a case will be described in which a tape recorded in the French SECAM system is played back. In this case, R= (4, 433619MHz + (4488″
t)4-7゜(4,40625MHz +(44±s
) 'H-DR1=4.433619MHz--gf
H-(4,40625MHz+(44±-)/T(-DB
I=4.433619MHz-10fH--fH=4・
277369 MHz −= fH. As mentioned above, when a tape recorded in the French SECAM system is reproduced by the apparatus of the present invention, D'R becomes a frequency that is 100 fH lower than 4.433619 MHz. As a result, even if the above signal is input to a PAL/SECAM television receiver, the
Misjudgment as an AL system signal will no longer occur.

(2): The object of the present invention can be achieved even if the mislock detector 63 during reproduction is in the NTSC mode and a switching pulse is applied to the VCO 60 to give an offset.

By giving a switching pulse to VCOso, its output frequency is (44X8:1-1)fH and ±fH
There is a fluctuation. Furthermore, the mislock detector 63 is NTSC.
When set to mode, this function is yCQt;
o will converge and oscillate to (44X8±1)/H-27H. Since the mislock detector 63 is in the NTSC mode, A(h, 71 of Bch works, f, =fo-/
H=(44X8-2)/H-/H=(44X8-3)f
It operates to converge to H.

Here, the output voltage of the mislock detector 63 is VCOs
o is ACll by switching pulse.

This is because an offset corresponding to Bch can be given.

The mislock output voltage for Ach is higher than that for Bch by <7j. However, this variation is caused by resistor 69, capacitor 68, resistor 57. It is smoothed by a capacitor 58.

In other words, by averaging the feedback voltages that originally differ between Ach and Bch, the VCOeo
The output of is ACII at the convergence point due to the offset,
Realizes a shift of ±fH between Bchs. As a result of the above, the converging frequency has a difference of 2fH between Ach and Bch, but the convergence frequency is 68.5
By selecting 8, the convergence point of Ach can be set at position 14, and the convergence point of BCll can be set at position f4.

Figure 7 shows the above convergence state.

Figure 7 (In case of al, Ach is (44X8-3)/
H.

The state J where Bch converges to (44X8-1)/H Fig. 7 (
b) shows a state where Ac'b has converged to (44X8-5)/H and Bch has converged to (44X8-3)fH.

If the control of the mislock detector 71 is strengthened, FIG.
), and if the control of the resistance sr and '15@ on the correction circuit 71 side is strengthened, the convergence state shown in FIG. 7<b) will be obtained. Regardless of the convergence state, during the SECAM method playback process, the oscillation frequency of the VCOeo is set to (44x8±1) fH.
It is possible to stably oscillate at a lower frequency.

Hereinafter, the reproduction frequency will be calculated for the case of the convergence state as shown in FIG. 7(a).

When playing back a tape recorded using the pseudo SBCAM method, the following results. The frequency of D'R1D'B above is far from the PAL frequency of 4.433619MHz, so P
Even if the signal is played back on an AL/SECAM television receiver, it will not be misjudged as a PAL signal.

Next, a case will be described in which a tape recorded in the French 8ECAM system is played back. In this case, . Thus, D'R is 4.433619MH
Since the frequency is lower than 2 by −fH, pAL/SE
Even if the above signal is input manually to a CAM television receiver, it will not be misjudged as a PAL signal.

0: Mislock detector 63 is in NTSC mode, ■
When no switching pulse serving as an offset is applied to C060, that is, when switch 67 is switched to the ground side.

When set in this way, the mislock detector 63 is
VCO60(r) frequency fo fofo = (44X 8
-2) Acts to converge to fH.

Therefore, along with this, the operation of the interpolation circuit 71 results in /, =(
The frequency 44X8-2)fH-/H = (44X8-3)fH will serve as the convergence point regardless of Ach or Bch.

Here, when the reproduced signal frequency is calculated when a pseudo-SECAM tape is reproduced, it becomes as follows.

(44X8-2)/H=fH D'R= (4,433619MH2+ 81-(4,
433619MHz+(441)fH-DR)=DR-
″-/H-″-fH+! -fH488 =DR--/H(ACh) or DR-1fH(Bch
)=4.40625MHz-fH or 4-404-4O625fH D'B=4.25MHz-+fH(Ach) or 4
, 25 MHz --fH (BCh).

Next, when playing the French S E CAM tape, which is the problem, -(4,40625MHz + (44±) 7H-D
u1=4.433619--fH(Ach) or 4゜4
33619--fH(BCh)D'B=4.43361
9MHz-107H--fH (Ach) or 4.433
619MHz-10fH--fH (BCh), that is, D'B=4, 277369MHz--fH.

As mentioned above, D' is the frequency of the PAL system (4, 4
33619MHz) by more than -fH (approximately 4 KH2). For this reason, the above signals are
Even if it is input to an M format television receiver, it will not be mistakenly determined as PAL format.

0: Mislock detector 63 is in NTSC mode, V
If an offset is given to COrso by a switching pulse, resistors R, 57, R, 75,
The present invention can also be realized by omitting the power supply VB and the power supply VB. This principle will be explained using FIG. 10.

Since the mislock detector is in NTSC mode, Ach
, Bch, /4=(44X8-3)fH.

It is fixed as 7s-(44×8-1)/a. (1) in Fig. 10 shows that the vCO60 free run frequency is f,
If lower, (2) is higher than s fll, (3
) shows the movement of the frequency of vCO with respect to time when it is between b f4 and f.

At the time of (1), assuming that the ACh starts operating, the frequency of the VCO 60 is lower than 8, so the feedback voltage from the mislock detector 63 causes the point to move from point ■ to point ■. The switching pulse switches, Bch
Then, it shifts from point ■ to point 0, which is higher by the frequency 2-fH corresponding to the offset of ■C060. ■The point is b
Since the frequency is higher than f5, the mislock detector 6
The feedback voltage from 3 operates to lower the frequency, and the point (■) moves by one point. Next it becomes Ach, 2・f
Shift to 0 point, which is lower by H. Below, in the same repetition, in Ach! On to 4, on Bch! , converges to .

In the case of (2), that is, the VCO6o free run frequency is ! ,
If higher, after starting operation at Ach.

The 760 frequency that was at point (2) moves to point (2) under control from the mislock detector 63.

Here it becomes BCh and shifts to point ■ which is higher by 2-fH. ■ is higher than f, so again mislock detector 63
Under the control of f, or f, move to a lower point ■. Similarly to the case (1) below, in Ach, f, ,
In BCh, it converges to f.

In the case of (3), the @ point is b /4! , between
Since this is the dead zone of the mislock detector 63, the frequency plate does not change immediately after the start of operation, and therefore becomes the @ point. When it becomes Bc, h, it shifts to O which is higher by 2·fH. @teeth! , is a higher frequency, so it shifts to 0 under the control of the mislock detector 63.

Similarly, Ach converges to /4 and Bch converges to fII. In this way, in Ach, the error lock detector 63! The control characteristics of 3 to f4 are shown in Bch.

! , ~f6, and Ach, BC
The VCOeo offset between ACh and BCh is realized by averaging the control voltages that differ between h by the capacitor 76.

The convergence point is (44X8-3)fH for Ach, and (44X8-1)7H for Bch. Therefore, pseudo S ECA
When playing back a tape recorded in M format, 1)'a
=(4,433619MHz+"""""-"'H)(
4-433619MHz + (44:I: ) fH
-DR)1=DB--・fH=4-40625 MHz-/H
4 D'B=DB--.fH=4.25MH2--fH4. Next, calculations will be made when a tape recorded in the French 8ECAM system is played back.

1 (4-40625MHz” (44±g) fH
-DR). In this way, D'R is 4.433619
Since the frequency is 1 fH lower than MHz, PAL/8
Even if the above signal is input to a BCAM television receiver, it will not be misjudged as a PAL signal.

Since the cover range of the VCOeo free run frequency in the case of 0 depends only on the detection characteristics of the mislock detector 63,
The range is equal to or higher than the case of ■ to 0, and is extremely wide.

〔Effect of the invention〕

As described above, according to the present invention, at least PAL
, 8ECAM, which is capable of recording and reproducing two or more formats, is configured so that phase control loop operation and mislock detection control operation can be obtained no matter which format is used during the reproduction operation. and S.E.
During the CAM method regeneration process, a voltage with a certain impedance is applied to the control terminal of the voltage controlled oscillator from the compensation circuit, which has the effect of lowering the oscillation frequency of the voltage controlled oscillator, and this effect and the mislock detection control operation The configuration is such that the effect of increasing the oscillation frequency is balanced.

Alternatively, during SECAM method playback), a correction circuit is provided to average the control voltage of the voltage control terminal, and V6O13
I applied an offset voltage between A and Bch to make a mistake. It is constituted by a circuit that operates the ivy detector 63 in NT8C mode.

As a result, the voltage controlled oscillator stably oscillates at a certain frequency lower than the normal frequency by more than /H.

4. By lowering the frequency of the SRCAM reproduction signal by, for example, -fH. This is to prevent a PAL/8ECAM color television receiver from erroneously determining that the reproduced signal is of the PAL system.

Therefore, there is no need to prepare a voltage controlled oscillator dedicated to both PAL and 8ECAM types, resulting in a reduction in cost and a simplified structure. Also, the playback signal can be converted to PAL/SFi.
Even when input to a color television receiver compatible with the CAM system, stable reproduced images can be obtained.

[Brief explanation of the drawing]

Fig. 1 (Al) and Fig. 1 (B) are respectively explanatory diagrams of the configuration of the recording mode and reproduction mode of a conventional color video signal recording and reproducing device. Fig. 2 is an explanatory diagram of the configuration showing one embodiment of the present invention. Figure 3 is a basic circuit diagram of a mislock detector. Figure 4 is a signal waveform diagram of each part of the circuit in Figure 3.
FIG. 6 is also an output characteristic diagram of the detection circuit of FIG. 3. Figure 7 is an explanatory diagram showing how the output of the voltage controlled oscillator in Figure 2 changes, Figure 8 is an output characteristic diagram of the voltage controlled oscillator in Figure 2, and Figure 9 explains the operation of the circuit in Figure 2. FIG. 10 is an explanatory diagram showing the state of output change of the voltage controlled oscillator according to the present invention. 52... Frequency converter % 54... Burst gate circuit, 55... APC detection circuit, 56... Crystal oscillator, 59... Switch, 60... Voltage controlled oscillator,
61... Frequency divider, 62... Balanced modulator, 63...
Mislock detector, 71...compensation circuit. Applicant's agent Patent attorney Takehiko Suzue Figure 3 11 1 1 1 Naka 4 I F2'F3 Figure 5 Fl ;F2: F3

Claims (2)

[Claims] (1) A frequency converter for converting a low frequency converted color signal into a color signal of the original frequency; and a burst gate circuit for extracting a burst signal from the color signal derived to the output terminal of the frequency converter. , a phase detection circuit into which the burst signal output from the burst gate circuit and the oscillation signal from the crystal oscillator are input, and which outputs a phase detection output of the parsed signal and the oscillation signal to an output terminal; and the phase detection circuit. a voltage controlled oscillator to which a phase detection output of a circuit is applied to a control terminal and whose oscillation frequency and phase are controlled according to the voltage applied to the control terminal; a frequency divider which divides the output of the voltage controlled oscillator; a balanced modulator to which the output of the frequency divider and the oscillation output of the crystal oscillator are input, and for inputting the balanced modulation output of the surface input signal to the frequency converter as a conversion carrier; and an oscillation signal from the voltage controlled oscillator. and a reproduced horizontal synchronizing signal is input, and a mislock detector generates a mislock detector for suppressing the frequency difference between the plane input signals within a certain range, and applies this to a control terminal of the voltage controlled oscillator. A compensation voltage is applied to the voltage control terminal during signal processing of the SECOM method, and in combination with the operation of the mislock detector, the voltage is applied at a frequency lower than the normal frequency of the voltage controlled oscillator by more than /H (horizontal frequency). 1. A color video signal recording and reproducing device comprising a compensation circuit for setting a controlled oscillator to stably oscillate. (2) The color video signal recording and reproducing apparatus according to claim 1, wherein the free run frequency of the voltage controlled oscillator is set to the reference frequency (4,433619 MHz) of the PAL system signal.