JPH0998446A - Filter circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To satisfy characteristics even when Q is extremely high and the request of the accuracy of a characteristic frequency is high. SOLUTION: For a main BPF 11 for performing a prescribed filtering processing to input signals, an oscillator 14 is constituted by using a dummy BPF 12 provided with the same frequency characteristics as the BPF 11. The frequencies of frequency divided output obtained by frequency dividing the reference signals of high accuracy in frequency dividers 19 and 20 and the frequency divided output obtained by frequency dividing the oscillation output of the oscillator 14 in the frequency dividers 15 are compared in a frequency detection circuit 18 and the detection signals of the frequency difference are integrated in a loop filter 22 and supplied to a control circuit 23 as error signals. By the control circuit 23, the center frequency of the main BPF 11 is controlled along with the center frequency to of the dummy BPF 12.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a filter circuit for performing a predetermined filtering process on an input signal,
In particular, the present invention relates to a filter circuit having a configuration in which a characteristic frequency can be automatically adjusted by a PLL (phase locked loop).

[0002]

2. Description of the Related Art In an 8 mm VTR, an AFM (Audio Frequency) for frequency-multiplexing an audio signal and recording / reproducing with a rotary head on the same track as a video signal on a video tape.
1.5 MHz (or 1.
A BPF (bandpass filter) of 7 MHz) requires very high accuracy. For this reason, conventionally, the AFM of 1.5
A BPF of MHz (or 1.7 MHz) is externally configured using L (coil) and C (capacitor).

On the other hand, there is also one built in an IC.
When incorporated in an IC, it is necessary to absorb variations in the elements, and conventionally, the center frequency of the filter (characteristic frequency)
A technique for automatically adjusting fo was used. The structure of the filter automatic adjustment circuit in this IC is shown in FIG. In the figure, the BPF 41 is a filter for performing the original filtering process on the input signal. A dummy BPF 42 is provided for the main BPF 41.

A high-precision reference signal oscillated by a crystal or the like is converted into a rectangular wave by a limiter 43, and is again converted into a sine wave by an LPF (low-pass filter) 44 to be waveform-shaped and then to a phase shifter 45. Supplied. This phase shifter 4
5 outputs a signal having a phase difference of 0 ° and a signal having a phase difference of 90 ° with respect to the input signal. A signal with a phase difference of 0 ° directly becomes one input of the phase detector 46, and a signal with a phase difference of 90 ° becomes the other input of the phase detector 46 after passing through the dummy BPF 42.

The phase detector 46 has a phase difference of 90 degrees between two inputs.
When the angle is °, the phase error becomes 0 and the phase difference is 90 ° + Δθ.
At that time, a phase error signal corresponding to Δθ is output. This phase error signal is supplied to the detection circuit 47 at the next stage. The detection circuit 47 uses the phase error signal to detect the phase detector 4
Feedback is applied to the BPF 42 so that the phase difference at 6 becomes 90 °. At this time, the detection circuit 47 supplies a current of Δi to the BPF 42 based on the phase error signal.
A control current of K · Δi is supplied to 41. This coefficient K is
It depends on the frequency characteristics of the BPFs 41 and 42.

That is, in the automatic adjustment circuit having the above-mentioned configuration, the high-precision reference signal is passed through the dummy BPF 42,
The phase difference with the signal on the path that does not pass through the BPF 42 is 90.
The PLL is constructed by applying feedback of Δi to the BPF 42 so that the angle becomes °. At this time, BPF41
Also, by applying the same control K · Δi as Δi, the center frequency fo of the BPF 41 becomes the same as the center frequency fo of the dummy BPF 42 locked by the PLL, so that variations in the elements are absorbed and the main BPF 41 is absorbed. It is possible to accurately and automatically adjust the center frequency fo of the.

[0007]

However, the filter circuit provided with the above-described conventional automatic adjustment circuit has the following problems. AFM of 8 mm VTR 1.5 MHz (or 1.
7MHz) BPF, the high-precision reference signal used in the set is the color subcarrier fsc (NTS).
3.58MHz in C method, 4.43M in PAL method
Hz), the dummy BPF 42 is
Used at the same frequency, and the original BPF41 is 1.5MHz
(Or 1.7 MHz), the dummy BPF 42 and the original BPF 41 cannot be accurately paired.

In the 8 mm VTR, there are an NTSC system and a PAL system as television systems, and the respective reference signal frequencies are different (3.
58 MHz, 4.43 MHz in the PAL system), whereas the center frequency fo of the BPF of the AFM is the same in both systems and is 1.5 MHz (or 1.7 MHz), so the center frequency fo in the NTSC system and the PAL system is fo. Need to be adjusted. In particular, the BPF of the 8 mm VTR AFM has a very high Q and the demand for the accuracy of fo is so high that the characteristics cannot be satisfied by the conventional automatic adjustment circuit.

The present invention has been made in view of the above problems, and its object is to obtain a very high Q and f
The object of the present invention is to provide a filter circuit which can satisfy the characteristics even if there is a high demand for the accuracy of o and can be integrated into an IC.

[0010]

A filter circuit according to the present invention comprises a first circuit for performing a predetermined filtering process on an input signal and a second circuit having the same frequency characteristic as that of the first circuit. An oscillator configured using the above, and a predetermined reference signal is divided by a predetermined dividing ratio to obtain a first divided output,
A frequency divider circuit that obtains a second divided output by dividing the oscillation output of the oscillator by a predetermined dividing ratio is compared with the frequencies of the first divided output and the second divided output, and the frequency is compared. An error detection circuit that outputs an error signal corresponding to the difference and a control circuit that controls each characteristic frequency of the first and second circuits based on the error signal are configured.

In the filter circuit having the above structure, the second circuit having the same frequency characteristic as the first circuit which performs the original filtering process constitutes an oscillator which oscillates at a predetermined frequency. Then, the error detection circuit divides a predetermined reference signal by a predetermined dividing ratio and a first divided output obtained by dividing the oscillation output of the oscillator by a predetermined dividing ratio. The frequency is compared with the frequency-divided output of, and an error signal corresponding to the frequency difference is output. Then, the control circuit feeds back this error signal to the second circuit so that the frequency difference becomes 0, controls the characteristic frequency of the error signal, and also controls the characteristic frequency of the first circuit.

Another filter circuit according to the present invention is an FM modulator for FM-modulating an audio signal and a first frequency-divided output by dividing a predetermined reference signal by a predetermined dividing ratio to obtain an FM modulator. A frequency divider circuit that obtains a second frequency division output by dividing the output frequency of the first frequency division output by a predetermined frequency division ratio, and the frequencies of the first frequency division output and the second frequency division output are compared, and the frequency difference Error detection circuit that outputs an error signal according to the
F comprising a control circuit for controlling the center frequency of the M modulator
In a device having an M signal processing circuit, a first circuit that performs a predetermined filtering process on an input signal, and an oscillator configured by using a second circuit that has the same frequency characteristic as the first circuit. , A changeover switch that selectively supplies the output frequency of the FM modulator and the oscillation frequency of the oscillator to the frequency dividing circuit, and the control circuit controls the center frequency of the FM modulator based on the error signal. , First
Also, each characteristic frequency of the second circuit is controlled.

In the filter circuit having the above structure, the output frequency of the FM modulator and the oscillation frequency of the oscillator are selectively supplied to the frequency dividing circuit by the changeover switch, while the control circuit responds to the frequency difference between the frequency dividing outputs. The error signal is fed back to the FM modulator so that the frequency difference becomes 0, the center frequency thereof is controlled, and the characteristic frequencies of the first and second circuits are also controlled. That is, the frequency dividing circuit, the frequency detecting circuit and the control circuit forming the FM modulation signal processing circuit of the recording system are also used as the circuits of the main part of the filter circuit.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing one embodiment of the present invention. In FIG. 1, B
The PF 11 is a main BPF for performing the original filtering process on the input signal. On the other hand, BPF12
Has the same frequency characteristic as the BPF 11 has the same filter configuration, and its output waveform is the limiter 13
Then, the oscillator 14 is made to have a center frequency fo, which is a characteristic frequency, of, for example, 1.5 MHz, by forming a rectangular wave with a positive feedback to the input end. Note that the limiter 13 is not essential, and it is possible to omit it and configure the oscillator 14 with only the BPF 12.

The oscillation frequency of the oscillator 14 is divided by 1/8208 by the frequency divider 15 to be a frequency division output for NTSC, and is also divided by 1/8184 by the frequency divider 16 to be a frequency division output for PAL. . These frequency-divided outputs are output to the changeover switch 17
Are alternatively supplied to the frequency detection circuit 18 as one of its inputs. On the other hand, the high-accuracy reference signal oscillated by a crystal or the like is set to the frequency of the color subcarrier fsc, and therefore 3.58 MHz in the NTSC system.
Then, the frequency divider 19 divides the frequency by 1/19584 to NTS.
The frequency-divided output for C is 4.43 MHz in the PAL system, and the frequency divider 20 divides the frequency by 1/24192 to obtain the frequency-divided output for PAL. These frequency-divided outputs are output by the changeover switch 2
Alternatively, 1 is supplied to the frequency detection circuit 18 as the other input.

The frequency detection circuit 18 compares the frequencies of the two inputs and detects the frequency difference. The detection signal indicating the frequency difference is integrated by the loop filter 22 and supplied as an error signal to the control circuit 23 having the detection circuit configuration. The frequency detection circuit 18 and the loop filter 22 constitute an error detection circuit. The control circuit 23 feeds this error signal back to the BPF 12 as a control signal Δi. The PLL is configured as described above. Control circuit 23
Applies the same control signal .DELTA.i to the BPF 11 to control its center frequency fo.

The filter circuit having the above structure is, for example, 8 mm.
VTR AFM 1.5MHz (or 1.7MH
Used as the BPF of z). In this case, the original BP
A reproduction (PB) FM signal is input as an input signal of F11. In this filter circuit, in the case of the NTSC system, the changeover switch 17 selects the divided output of the frequency divider 15 and the changeover switch 21 selects the divided output of the frequency divider 19. On the other hand, in the case of the PAL system, the changeover switch 17 selects the frequency division output of the frequency divider 16 and the changeover switch 21 selects the frequency division output of the frequency divider 20.

The frequencies of the divided outputs are compared by the frequency detection circuit 18, the detection output of the frequency difference is integrated by the loop filter 22, and further fed back to the BPF 12 as the control signal Δi by the control circuit 23, whereby the frequency difference is detected. The center frequency fo is controlled so that
The center frequency fo of F11 is similarly controlled. Since the Q of the BPF 12 is high, the oscillator 14 oscillates accurately at 1.5 MHz at the phase of 0 °. Therefore,
By configuring BPF12 with exactly the same filter as BPF11, the center frequencies fo of both filters are the same, so even if there are variations in the elements when the IC is built-in, BPF11 is accurate to 1.5 MHz. Is automatically adjusted to.

As described above, the BPF 12 having exactly the same configuration as the BPF 11 for filtering the original input signal is positively fed back to form the oscillator 14, and the divided output of the oscillation frequency of the oscillator 14 and high precision are provided. The frequency detection circuit 18 performs frequency comparison with the divided output of the reference signal of
An error signal corresponding to the frequency difference is sent from the control circuit 23 to B
Feedback is applied as the control signal Δi of the PF 12, and
Since the control signal Δi is similarly applied to the main BPF 11, the center frequency fo of the BPF 11 is set to the BPF 11.
Since it is controlled so as to be exactly the same as the oscillation frequency of the oscillator 14 constituted by 12, there is no fluctuation in fo due to element variations or temperature characteristics, and an accurate reference signal oscillated by a crystal or the like is followed. BPF can be realized. Moreover, there is no influence on the accuracy due to the signal level or distortion of the subcarrier fsc which is the reference signal, and no pseudo lock occurs at frequencies other than the desired center frequency fo.

The accuracy of the oscillation frequency of the oscillator 14 is
In the case of this embodiment, (3.58 / 19584) × 820
8 / 1.5 × 100 = 0.03 [%], and BP
Center frequency fo of F11 and center frequency fo of BPF12
Can be configured with the same 1.5 MHz, so it is only necessary to consider the relative variation between both filters. It should be noted that there is no problem if this frequency division ratio can be purchased according to the required accuracy of the BPF.
Further, since switching between the NTSC system and the PAL system is performed digitally by switching the frequency division ratio by selecting one of the frequency dividers 15 and 19 and the frequency dividers 16 and 20, each mode of NTSC / PAL is selected. Does not change the accuracy.

By the way, in the recording system of the 8 mm VTR AFM, the FM signal processing circuit has the same circuit structure as that of the filter circuit according to the present embodiment. The configuration of the FM signal processing circuit of this recording system is shown in FIG. FIG.
In FIG. 1, a VCO (voltage controlled oscillator) 21 constitutes an FM modulator having a center frequency fo of 1.5 MHz, FM modulates an audio signal which is a modulated wave input, and outputs it as a 1.5 MHz carrier FM modulated signal. .

The oscillation frequency of the VCO 21 is divided by the frequency divider 25 by 1/8208 to be an NTSC frequency division output, and is also divided by the frequency divider 26 by 1/8184 to be a PAL frequency division output. These frequency-divided outputs are output to the changeover switch 27.
Is alternatively supplied to the frequency detection circuit 28 as one of its inputs. On the other hand, the high-accuracy reference signal oscillated by a crystal or the like is 3.58 MHz in the NTSC system, is divided by 1/19584 by the frequency divider 29 to be an NTSC frequency division output, and in the PAL system is 4.43 MHz. Then, the frequency is divided by 1/24192 by the frequency divider 30 to be the PAL frequency division output. These frequency-divided outputs are output to the changeover switch 31.
Are alternatively supplied to the frequency detection circuit 28 as the other input.

The frequency detection circuit 28 compares the frequencies of the two inputs and detects the frequency difference. The detection signal indicating this frequency difference is integrated by the loop filter 32 and supplied as an error signal to the control circuit 33 having a detection circuit configuration. The control circuit 33 uses this error signal as a control signal Δi for VC.
Return to O24. The PLL is configured as described above, and the PLL is controlled so that the center frequency fo of the VCO 24 is always 1.5 MHz.

Here, when comparing the reproducing system filter circuit according to the present embodiment of FIG. 1 and the recording system FM signal processing circuit of FIG. 2, the configuration surrounded by a broken line in both figures is exactly the same. It can be seen that it is. Therefore, since the recording system and the reproducing system cannot be in the operating state at the same time, in configuring the filter circuit according to the present embodiment, the portion surrounded by the broken line also serves as the recording system circuit. And FIG. 3 shows an application example of the present invention when the circuit of the recording system is also used. In the figure, the same parts as those in FIGS. 1 and 2 are designated by the same reference numerals.

As shown in FIG. 3, the portion surrounded by the broken line also serves as a recording system circuit, and the frequency of the oscillator 14 and the frequency of the VCO 24 are selectively changed by the selector switch 34. , 26 while supplying the control signal Δi from the control circuit 33 to the VCO 24 and also to the dummy BPF 12 and the main BPF 11. In the present example, the frequency shift amount of the BPFs 11 and 12 and the VC with respect to the unit amount of the control signal Δi
Assuming that the amount of frequency shift of O24 is the same,
The control signal Δi is commonly fed back to the BPFs 11 and 12 and the VCO 24.
This can be dealt with by multiplying the control signal Δi fed back to F11 and F12 by a predetermined coefficient.

As is clear from the above, the main part of the reproducing system filter circuit according to the present embodiment has the same circuit configuration as that of a part of the recording system FM signal processing circuit, and therefore the circuit thereof is the same. Since most of the components are also used as the common circuit portion of the recording system, the filter circuit according to the present embodiment can be configured only by newly adding the oscillator 14 and the changeover switch 34, so that the number of parts is significantly reduced. In addition to being able to do so, the cost will be greatly reduced.

Further, the recording system VCO 24 is provided with a BP as in the oscillator 14 in the filter circuit according to the present embodiment.
It is also possible to form an FM modulator by using F and a limiter and by positively feeding back the output of the BPF that has passed through the limiter. According to this, V of this FM modulator
Since CO can also be used as the dummy BPF 12, and there is no need to provide the changeover switch 34, it is not necessary to add any components other than the main BPF 11 when configuring the filter circuit (BPF) of the regeneration system. . Therefore, it is possible to further reduce the number of parts and the cost.

In the above embodiment, the case where the filter circuit is applied to the BPF has been described. However, the present invention is not limited to the application to the BPF, and the LPF is not limited thereto.
The same can be applied to the above. For example, when applied to an LPF, the cutoff frequency fc becomes the characteristic frequency. In addition, the characteristic B using the multi-order as shown in FIG.
The PF, that is, the BPF obtained by combining the characteristics of, for example, four BPFs 1, 2, 3, and 4, is f of the dummy BPF.
This can be achieved by using a configuration in which it is controlled by o and a filter having the closest cutoff.

In the above embodiment, 8 mmV
Although the case where the present invention is applied to TR has been described, the present invention is not limited to this and the present invention can be applied to VTRs in general.

[0030]

As described above, according to the present invention,
An oscillator is configured using a second circuit (dummy filter) having the same frequency characteristics as the first circuit (main filter) that performs the original filtering process, and the divided output of the oscillation frequency of this oscillator and high The frequency of the precision reference signal is compared with the frequency division output, and the error signal corresponding to the frequency difference is fed back to the second circuit so that the frequency difference becomes 0, and the characteristic frequency is controlled. By controlling the characteristic frequency of the first circuit as well, the characteristic frequency of the first circuit becomes exactly the same as the oscillation frequency of the oscillator. Therefore, it is possible to accurately follow the highly accurate reference signal oscillated by a crystal or the like. A different filter circuit can be realized. Therefore, even if the Q is very high and the accuracy of the characteristic frequency is highly required, the characteristics can be satisfied and the IC can be built in.

Further, most of the filter circuit according to the present invention is also used as the common circuit portion of the FM signal processing circuit of the recording system, so that the number of parts can be greatly reduced and the cost can be greatly reduced. Become.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of an FM signal processing circuit of a recording system.

FIG. 3 is a block diagram showing an application example of the present invention.

FIG. 4 is a block diagram showing a conventional example.

FIG. 5 is a characteristic diagram of a multi-order BPF.

[Explanation of symbols]

 11 Main BPF 12 Dummy BPF 14 Oscillator 15, 16, 19, 20 Divider 17, 19 Changeover switch 18 Frequency detection circuit 22 Loop filter 23 Control circuit

Claims (4)

[Claims] 1. A first circuit that performs a predetermined filtering process on an input signal, an oscillator configured by using a second circuit having the same frequency characteristic as the first circuit, and a predetermined reference. A frequency dividing circuit for dividing the signal by a predetermined dividing ratio to obtain a first divided output, and dividing an oscillation output of the oscillator by a predetermined dividing ratio to obtain a second divided output; An error detection circuit that compares the frequencies of the first frequency-divided output and the second frequency-divided output and outputs an error signal according to the frequency difference, and the first and second error detection circuits based on the error signal. And a control circuit for controlling each characteristic frequency of the circuit of FIG. 2. The predetermined frequency division ratio can be switched according to a television system.
The described filter circuit. 3. An FM modulator for FM-modulating an audio signal,
A predetermined reference signal is divided by a predetermined dividing ratio to obtain a first divided output, and an output frequency of the FM modulator is divided by a predetermined dividing ratio to obtain a second divided output. A frequency division circuit, an error detection circuit for comparing the frequencies of the first frequency division output and the second frequency division output, and outputting an error signal according to the frequency difference, and the error detection circuit based on the error signal In a device having an FM signal processing circuit including a control circuit for controlling a center frequency of an FM modulator, a first filtering process is performed on an input signal.
Circuit, an oscillator configured by using a second circuit having the same frequency characteristic as the first circuit, and an output frequency of the FM modulator and an oscillation frequency of the oscillator, the alternative frequency A control circuit for controlling the center frequency of the FM modulator based on the error signal and the characteristic frequencies of the first and second circuits. A filter circuit characterized by. 4. The predetermined frequency division ratio can be switched according to a television system.
The described filter circuit.