JPH0134434B2 - - Google Patents

Description

[Detailed description of the invention]

In a VTR, the carrier color signal (chroma signal) of the color video signal is low frequency converted and then superimposed on, for example, an FM modulated luminance signal and recorded.
It is conceivable to configure the APC circuit provided in the reproduction system as shown in FIG. In the figure, Si is the reproduced chroma signal, which has a color subcarrier frequency f _sc in the frequency converter 1.
Converted to 3.58MHz chroma signal So. This chroma signal So is supplied to the burst separation circuit 3 to separate the burst signal S _B (3.58MHz), which is the reference output S _R (3.58MHz) obtained from the reference oscillator 4.
The phase is compared by the phase comparator 5, and the comparison output is converted to the control voltage V _C by the low-pass filter 6.
This control voltage V _C is supplied to the variable frequency oscillator 7, and a frequency (3.58 MHz + jitter component) corresponding to the control voltage V _C is obtained. This is the signal S _L (688k in this example) for low frequency conversion.
Hz) and is supplied to the frequency converter 8, where it is converted into a carrier signal S _C having a predetermined frequency (4.27MHz), which is then converted into a reproduced chroma signal Si (688k
Hz) is supplied as a carrier signal to a frequency converter 1 provided on a transmission path. In addition, 9 is an oscillator (variable type) that obtains the low frequency signal S _L ,
2 is an output terminal. As the variable frequency oscillator, an oscillator with a wide frequency variable range (a variable relaxation oscillator such as an emitter-coupled multivibrator, a variable oscillator using a ceramic filter, etc.) is used. Since this type of variable frequency oscillator 7 generally has a large temperature drift, a control system 20 is provided to suppress frequency fluctuations due to this temperature drift. In other words, the frequency difference detection circuit 11 outputs the reference output S _R
The frequency difference Δf between the oscillation output S _V of the variable frequency oscillator 7 and the oscillation output S V of the variable frequency oscillator 7 is detected. This detection circuit 20 is used to obtain a detection output (voltage ₎ V _D proportional to the frequency difference _Δf , as shown in FIG. The differential output V _Y is supplied to the control sensitivity adjustment amplifier 14 through the low-pass filter ₁₃ , and the output voltage _V is supplied to the variable frequency oscillator 7. Now, in this APC circuit 10, the relationship between the oscillation frequency f _V and the control voltages V _C and V _X is as shown in equation (1), and the relationship between the detection output V _D of the detection circuit 11 and the frequency difference Δf is It becomes as shown in equation (2). _{f V = f R} + _{K 1 V C + K 2 V Modulation} sensitivity of the variable frequency oscillator 7 seen from the terminal of _{C 2} : Modulation sensitivity _of the variable frequency oscillator ₇ seen from the _terminal of control voltage _V Error frequency (drift frequency) From formula (1), V _C = 1/K ₁ (f _V −f _R −K ₂ V _X −f _e ) ...(3) Also, the differential output V _Y is V _Y = K ₄ (V _C −V _D ) ...(4) Here, K ₄ : Gain of differential amplifier 12 Substituting equations (2) and (3) into equation (4) and rearranging, we get equation (5). It becomes like this. V _Y = K ₄ (1/K ₁ − _{K 3} )(f _V -f _R )−K ₄ /K ₁ (K ₂ V _X +f _e )...(5) Here, modulation sensitivity K ₁ and demodulation If the product of sensitivity K ₃ is selected as K ₁・K ₃ = 1 ……(6), equation (5) becomes V _Y = −K ₄ /K ₁ (K ₂ V _X +f _e ) ……( 7) becomes. Also _, in terms _of direct current _{, V X} = _{V Y ,} so _V 8)
_{The formula is V _ _ _ _ _ _ e} = f _R + K ₁ V _C (10) Thus, the fluctuation in the oscillation frequency f _V due to drift is removed. Then, the control voltage V _X is controlled so that the average values of the control voltage V _C and the detection output V _D match, and thereby the oscillation frequency f _V is controlled to always be equal to the reference frequency f _R. FIG. 3 shows a specific example of the above-mentioned phase comparator 5, which has a multiplier 21, and a pair of multiplication outputs are supplied as control signals to a pair of series-connected current sources 22 and 23, and these current sources A phase comparison output va is taken out from the connection midpoint between 22 and 23. In addition, Ra,
Rb is a voltage dividing resistor for applying a constant DC voltage V _A as a bias voltage to this phase comparison output va. 24 indicates its power terminal. FIG. 4 shows a specific example of the frequency difference Δf detection circuit 11, in which the reference output S _R (FIG. 5B) is supplied to the set terminal S of the flip-flop circuit 30.
The reference output S _R (A in the figure) is supplied to the reset terminal R to form the pulse output Pa shown in C in the figure, which is smoothed by the low-pass filter 31, and the output
Pb (D in the figure) is supplied to the differentiating circuit 32. The polarity of the differential pulse Pc is different when the oscillation frequency _fV is lower than the reference frequency _fR and when it is higher. The differential pulse Pc is supplied to the first slice circuit 33A selected at the positive slice level L ₁ to form _the slice output Pd ₁ shown in FIG. A slice output Pd ₂ of G in the figure is formed in the slice circuit 33B. These are pulse outputs of a predetermined width from the monostable multivibrators 34A and 34B, respectively.
Pe ₁ and Pe ₂ (H and I in the figure) are then synthesized in the synthesis circuit 35 according to the level of the pulse outputs Pe ₁ and Pe ₂ . If the reference level of the pulse outputs Pe ₁ and Pe ₂ is Eo, the combined output Pf will be as shown in F in the figure. Therefore, if this composite output Pf is smoothed by the low-pass filter 36, the oscillation frequency _fV and the reference frequency
DC output (detection output) corresponding to the frequency difference with f _R
V _D (F in the same figure) is obtained. With the configuration shown in FIG. 4 as described above, the frequency difference-detection output characteristic as shown in FIG. 2 can be obtained. FIG. 6 shows a specific example of the synthesis circuit 35, in which V _L ,
Three values of L _M , V _H (V _L < V _M < V _H ), e.g. 4V-6V-
It has a reference voltage source 40 that outputs 8V and a switching circuit 41, and the switching circuit 41 is controlled as desired by the output of a control circuit 45 composed of a flip-flop circuit 42, an OR circuit 43, and a decoder 44, as shown in the figure. Ru. An example of logical operation is shown in (Table 1).

[Table] As shown in the figure, the reference voltage source 40 is of a resistance division type and has a plurality of resistors R ₁ to _{R 4} . 46 is a power terminal. Now, as mentioned above, the oscillation frequency f _V is controlled by the control voltage (V _C − V _X ), and the control voltage V _X is expressed as (4)
Since it is related to V _D from the formula and the explanation that follows, the center frequency (the control voltage at that time _{V
In the control centering on V M _ _ _ _} +K ₁ (v _a +V _A −V _M ) ...(13). When the oscillation frequency f _V is controlled in a closed loop so as to be equal to the reference frequency f _R , the detection output V _D is an intermediate voltage V _M , and the control voltage V _C is centered on the variable frequency oscillator 7. A voltage V _A that oscillates at a frequency f _v , which is the voltage V _M
be equivalent to. Therefore, the second term on the right side of equation (13) is zero. By the way, the voltage V _A mentioned above is determined by the resistors Ra and Rb as shown in Figure 3, and the voltage
Since V _M is determined by the reference voltage source 40 as shown in FIG. 6, voltage sources formed from mutually independent power sources are used. Therefore, variations in the voltages V _A and V _M due to temperature drift, etc. may occur completely unrelated to each other, and in such a case, the oscillation frequency f _V cannot be accurately controlled, and these voltages V _A and V Depending on how _M is biased, the operating point of the APC loop shifts and the oscillation frequency f _V
The disadvantage is that the control range is narrowed. Therefore, the present invention is designed to prevent the voltages V _A and _VM from varying independently and unrelatedly due to temperature drift or the like. Therefore, in this invention, as shown in Fig. 7, a voltage related to the reference voltage V _M is supplied as the bias voltage V _A of the control voltage V _C , and the resistor Ro is for adjusting the control sensitivity. be. The equivalent circuit is shown in FIG. In this equivalent circuit, the circuit for obtaining the control voltage _VC , and therefore the phase comparator 5, operates as a current source, so if the current is now i _a , the following equation holds true. f _V = f _R + K ₁ (V _C − V _M ) ...(14) Here, since V _C = V _M + i _a Ro, f _V = f _R + K ₁ (V _M + i _a Ro− V _M ) =f _R −K ₁ i _a Ro ……(15) Then, the drift component K ₁ (V _M −
V _M ) becomes zero. Therefore, even if the reference voltage V _M itself fluctuates, the operating point of the APC circuit 10 will be biased to one side.
There is no possibility that the frequency control range will become narrower. FIG. 9 shows a specific example of this invention, in which a reference voltage source 40
A resistor Ro is connected between the connection midpoint p between the resistors R ₂ and R ₃ and the connection midpoint q between the current sources 22 and 23. As explained above, according to the present invention, the drift component due to temperature etc. can be reduced to zero with an extremely simple configuration, so that the operation of the APC circuit 10 is stabilized.
Therefore, the frequency control range will not be narrowed due to deviation to one side. Therefore, the variable frequency oscillator according to the present invention is as shown in FIG.
It is extremely suitable for application to APC circuits.

[Brief explanation of drawings]

Fig. 1 is a system diagram of the APC circuit used to explain the present invention, Fig. 2 is an explanatory diagram of APC control operation, and Fig. 3 is a diagram explaining the APC control operation.
Figure 4 is a system diagram of the phase comparator, Figure 4 is a system diagram of the frequency difference detection circuit, Figure 5 is a diagram explaining its operation, Figure 6 is a system diagram of the adder, and Figure 7 is the variable frequency according to the present invention. FIG. 8 is a system diagram showing an example of the application of an oscillator to an APC circuit, FIG. 8 is an equivalent circuit diagram thereof, and FIG. 9 is a connection diagram showing an example of a variable frequency oscillator. 7 is a variable frequency oscillator, V _M is a reference voltage, 11
5 is a frequency difference detection circuit, and 5 is a phase comparator.

Claims (1)

[Claims] 1. A variable frequency oscillator whose center frequency is determined by a reference voltage supplied as a bias to a phase comparator that compares the phases of an input signal and a reference frequency signal. In a circuit configured to supply the output of a frequency difference detection circuit with the output of a frequency oscillator to control the oscillation frequency of the variable frequency oscillator, the bias voltage for the output of the frequency difference detection circuit is based on the reference voltage. A variable frequency oscillator characterized by using voltage.