JPS6150486A - Discoid information signal recording medium reproducing device - Google Patents

Abstract

PURPOSE:To improve quality of a reproducing signal by selecting and changing over the first horizontal synchronizing signal in which phase is synchronized to a composite synchronizing signal separated from an information signal, and a reference horizontal synchronizing signal corresponding to an action condition of a discoid information signal recording medium reproducing device and a condition of an information signal. CONSTITUTION:An signal in which an equalizing pulse is sampled at an equalizing pulse sampling circuit 34, namely, a reproducing horizontal synchronizing signal is supplied to a phase comparing circuit 35 as a reference signal. The phase comparing circuit 35 compares a phase with the reproducing horizontal synchronizing signal supplied from the equalizing pulse sampling circuit 34 and the signal supplied from a frequency dividing circuit 40 (1/N6) to be explained later, and the phase of both signals is different, the circuit outputs a phase error signal (voltage). A switching circuit 39 selects, changes over and outputs a signal from a frequency dividing circuit 38 (1/2) and a signal from a frequency dividing circuit 9 (1/2) corresponding to a prescribed control signal supplied from a control circuit, etc., to be explained later (not shown in a figure).

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a disk-shaped information signal recording medium reproducing device.

(Conventional technology) In recent years, with the advancement of electronic technology and recording and reproducing technology, disc-shaped information signal recording media (hereinafter referred to as disks) on which information signals such as video signals and audio signals are recorded have become popular. A disk-shaped information signal recording medium playback device (hereinafter sometimes referred to as a disk playback device) has appeared that plays back information (sometimes referred to as a disk playback device).

The color subcarrier frequency fsc of the FAI system, which is one of the standard television systems, is the horizontal scanning frequency 10.

+, =15625 (to1z) and vertical scanning frequency fv t’v=5Q (Hz) is expressed as in equation (1).

=4.43361875 (MHz) In other words, in the P^[ method, the modulation polarity of one of the two color signal modulation axes is reversed every horizontal scanning period (180° phase), and the color 1iPI carrier frequency and horizontal scanning frequency are The color in PAL system is subcarrier frequency fs
c is (1/4) of the horizontal scanning frequency fH and (1/2) of the vertical scanning frequency fv as shown in equation (1) above.
), a frequency offset is added.

By the way, the color subcarrier frequency fsc in the PAL system
The relationship between the horizontal scanning frequency fu and the frequency is 7093
79h=2500fsc... (2) Since it is shown in the above equation (2), the color subcarrier frequency fsc can be simply divided by an integral multiple of the frequency to obtain the horizontal scanning frequency f.

and vertical scanning frequency [■ cannot be obtained.

Therefore, in an example of a conventional disk-shaped information signal recording medium 9-station location, for example, formula (2) is modified to obtain the formula (3) shown above.
By configuring a circuit according to the formula, a reference horizontal synchronization signal having a frequency approximately the same as the frequency of the horizontal synchronization signal of the information signal is generated using a signal phase-synchronized with a reference signal output from a crystal oscillation circuit to be described later. Various synchronous I/H signals such as vertical synchronous signals can be easily and continuously generated.

An example of a conventional disk-shaped information signal recording medium reproducing apparatus will be explained below with reference to FIG. Fig. 2 shows a system diagram 1 of an example of a conventional disk-shaped information signal recording medium reproducing device.j The crystal oscillator 1 is connected to the crystal oscillation circuit 2, and the crystal oscillation circuit 2 is connected to the color subcarrier frequency. <Outputs a signal with a frequency of 4fsc, which is four times the frequency of SC.

Note that if the circuit shown in FIG. 2 is a signal processing circuit for PAL video signals, 4 fsc = 17.734 (M to 1z).

The output signal of the crystal oscillator circuit 2 is supplied to the (1/4) frequency divider circuit 3, and therefore, the (1/4.) frequency divider circuit 3 outputs a signal with a frequency of the color subcarrier frequency fsc, that is, fsc=4. .4336 (MH2) (PAL method)
is output.

- [The signal i outputted from the (1/4) frequency dividing circuit 3 described above is supplied to the phase shifter (color subcarrier phase shifter) 30 described later, and the (1/N+) frequency dividing circuit 4.

Incidentally, if the circuit shown in FIG. 2 is a circuit that overrides the signal processing related to the video signal of the P8 method, the value of N1 is set to 162.

Therefore, a signal with a frequency of fsc/N+, that is, fsc/162 (to P [method)] is output from the frequency dividing circuit 4 (<1/N+), and this signal is used as a reference signal (Q phase comparator circuit 5 is input.

Further, the phase comparison circuit 5 is also supplied with a signal from the (1/N2) frequency dividing circuit 6.

The phase comparator circuit 5 compares the phases of the signal supplied from the (1/N+) frequency dividing circuit 4 and the signal supplied from the (1/N2) frequency dividing circuit 6, and determines whether the phases of the two signals are different. In this case, a phase error signal (voltage) corresponding to the phase difference is supplied to the voltage controlled oscillation circuit 8 via a filter (for example, a low-pass filter) 7.

The voltage controlled oscillator circuit 8 receives a signal of a frequency corresponding to the phase difference im 2] electric power VJ-) supplied from the phase comparator circuit 5 via the filter 7, specifically, 282 h in the case of the PAL system. The signal whose oscillation center frequency is (1/N
2') Output to frequency divider circuit 6 and (1/21 frequency divider circuit 9).

Note that if the circuit shown in Figure 2 is a circuit that performs signal processing on PAL video signals, the value of N2 above is 1.
61.

Therefore, from the (1/N 2 ) frequency dividing circuit 6, the PAL
(282fh) / N2'' (282fs)
A signal with a frequency of /161 is output.

Note that the above-mentioned crystal 1, crystal oscillation circuit 2, (1/4) frequency divider circuit 3, (1/N + ) frequency divider circuit 4, phase comparison circuit 5, (1/N2) frequency divider circuit 6, and filter 7 and the voltage controlled oscillation circuit 8 is a phase locked loop (hereinafter referred to as PL).
It constitutes a circuit (sometimes written as I-), and (1/
N 2 ) Output from frequency dividing circuit 6 (282 fs) / N 2 (PI method)%
A signal with a frequency of (formula %) becomes a signal that is phase-synchronized with a reference signal of a frequency of fsc/N+, =fsc/162 (P8 [method)] output from the (1/N 1) frequency divider circuit 4.

The (1/2) frequency divider circuit 9 divides the frequency 2B2h (P^[method) of the signal supplied from the voltage controlled oscillation circuit 8 by (1/2), and divides this signal by (1/N 3 ). Supplied to circuit 10.

That is, the (1/2) frequency divider circuit 9 supplies a signal with a frequency of 141fn (PAL system) to the (1/N 3 ) frequency divider circuit 10.

(1/N 3) frequency divider circuit 10 is (1/2) frequency divider circuit 9
If the frequency of the signal supplied from < 1/N s)
This signal is supplied to the (1/Na) frequency dividing circuit 11 and also to the terminal 12. Further, a signal whose phase differs by 011800 from the (1/N·) frequency dividing circuit 10h is supplied to the sawtooth wave generating circuit 13 and a phase shifter 30, which will be described later.

Therefore, the frequency of the signal output from the (1/N 3 ) frequency dividing circuit 10 is (1'I 1 f, l) / N 3 (P
to L J'j formula) Note that the circuit shown in Figure 2 is P
If there is a circuit C that processes a video signal of the ^1 system, the value of N3 is set to 141. In other words, (1/
N3) A signal with a frequency of H is output from the frequency dividing circuit 10.

The frequency of this signal is the horizontal scanning frequency, and this signal is a signal that depends on the oscillation accuracy of the crystal 1 and the crystal oscillation circuit 2. In other words, it is a reference horizontal synchronization signal (pulse) that does not depend on the reproduced information signal. Become. This reference horizontal synchronization signal (
For example, in the case of a disc playback device, the pulses are used to control the rotation of a motor (not shown in FIG. 2) that rotates the disc.

The (1/N 4 ) frequency dividing circuit 11 divides the frequency of the horizontal synchronizing signal having a horizontal scanning frequency of 1,000 supplied from the (1/'N3) frequency dividing circuit 10 to <1/N 4 ).

In other words, the frequency of the signal output from the (1/N4) branching circuit 11 is f, l/N4.

Note that if the circuit shown in Figure 2 is a circuit that performs signal processing on a PAI video signal, the value of N4 above is 6.
It is said to be 25. In other words, (1/N 4) frequency dividing circuit 11
The frequency of the signal output from is fll/6 2 5
(P8 [method)] This signal is supplied to the terminal 14 and also to the (1/Ns) branch circuit 15.

Now, considering the processing of the signal reproduced from the disk 16, the information signal reproduced from the disk 16 by the sensor 17 is FM demodulated by the FM demodulation circuit 18, and then processed by the color signal separation circuit 19 and the luminance signal, which will be described later. The signal is supplied to the signal separation circuit 20 and also to the synchronization signal separation circuit 21 .

The synchronization signal separation circuit 21 separates a composite synchronization signal from the reproduced FM demodulated signal, and supplies this composite synchronization signal to the vertical synchronization signal separation circuit 22 and also to the phase comparison circuit 23.

The vertical synchronization signal separation circuit 22 separates the vertical synchronization signal from the composite synchronization signal (1/N 4) and supplies it to the separation circuit 11.

(1/N4) frequency dividing circuit 11 is vertical synchronization signal separation circuit 22
It is controlled by a vertical synchronization signal (vertical reset pulse signal) supplied from

In other words, the (1/Na) frequency dividing circuit 11 outputs a signal phase-synchronized with the vertical synchronizing signal (vertical reset signal) supplied from the vertical synchronizing signal separation circuit 22 from the terminal 14, and also divides the frequency by (1/N5). Output to circuit 15.

The (1/N5) frequency divider circuit 15 divides the frequency of the signal supplied from the (1/N4) frequency divider circuit 10 into (1/N5).
Make it.

In other words, the frequency of the signal output from the (1/N5) 111 circuit 15 is fH/(N4N5). This signal is supplied to terminal 24.

Note that the value of N5 above is 4 when an information signal related to a video signal for 4 fields is recorded in one track of the disc (or an information signal related to a video signal for 2 fields in one track of the disc). If an information signal is recorded,
2). Therefore, the frequency of the signal output from the terminal 24 is fo/ (625X4) and fu/ (625X2) in the case of the PAL system, and this signal becomes a rotation synchronization signal (pulse) that is almost phase-synchronized with the rotation frequency of the disk.

The phase comparison circuit 23 is supplied with a composite synchronization signal as shown in FIG. 5([)] from the synchronization signal separation circuit 21 and a sawtooth wave signal as shown in FIG. 5(C) from the sawtooth wave generation circuit 13. has been done.

The phase comparison circuit 23 compares the phases of the composite synchronization signal supplied from the synchronization signal separation circuit 21 and the sawtooth wave signal supplied from the sawtooth wave generation circuit 13, and if there is a phase difference between the two signals, the filter A phase error signal (voltage) is supplied as a stretcher control signal to a stretcher control coil 26 that controls the position of the sensor 17 via the stretcher control signal 25, and the stretcher control of the sensor 17 is performed. Hit the phase error signal (voltage) 8! The position of the sensor 17 is controlled in the i direction.

Note that the horizontal synchronization signal (pulse) supplied to the sawtooth wave generation circuit 13 and the horizontal synchronization signal (pulse) supplied to the phase shifter 30
pulse) is 180″ out of phase.

Although not shown in FIG. 2, a shift circuit for shifting the phase of the horizontal synchronizing signal (pulse) by 1800 is inserted between the (1/N 3 ) frequency dividing circuit 10 and the sawtooth wave generating circuit 13. ing.

In addition, this shift circuit is a (1/N 3 ) frequency dividing circuit 1
It is also possible to configure it so that it is included in the zero or sawtooth wave generation circuit 13.

The (1/N3) frequency divider circuit 1 shown in Figure 2
0 has a configuration that incorporates the shift circuit described above.

By the way, the information signal (video signal) recorded on the disc is a signal of a different type from the standard television system in order to ensure compatibility between the three types of standard television systems.

Specifically, when recording on a disc, the color subcarrier signal is recorded on the disc at a different frequency from the color subcarrier signal of the standard television system, and during playback, the color subcarrier signal of the information signal is The color subcarrier frequency of the carrier signal is lF! Signal processing is performed to achieve the color subcarrier frequency of the quasi-television system.

In a disc playback device (hereinafter sometimes referred to as a PAI disc playback device) that outputs an information signal played from a disc as a video signal of the PAL system, which is one of the standard television systems, the disc At the same time, signal processing is performed to convert the color subcarrier frequency of the information signal reproduced from the information signal into the color subcarrier frequency of the standard television system, and one of the two color signal modulation axes of the color signal and burst signal of the information signal is processed. It is necessary to use a signal whose modulation polarity is inverted every horizontal scanning period (180' phase).

Therefore, in a PAI disc playback device, the color signal is separated from the information signal reproduced from the disc, and the separated color signal is demodulated into, for example, a (R-Y) color difference signal and a (B-Y) color difference signal. In the balanced modulation circuit, the color subcarrier signal of the standard television system is balanced-modulated with the color difference signal to produce a carrier color signal, and then the two types of carrier color signals are mixed, and further,
Thereafter, it is necessary to mix it with the luminance signal to obtain a reproduced signal in the form of a composite video signal.

The signal processing operation of the above-mentioned reproduced information signal will be explained below.

The reproduced FM demodulated signal supplied to one color signal separation circuit is separated into only the color signal components by the color signal separation circuit 19, and then converted into a (R-Y) color difference signal and a (B-Y) color difference signal by the demodulation circuit 27. The signal is demodulated and separated.

The above-mentioned IC (R-Y) color difference signal is supplied to the balanced modulation circuit 28, and the (B-Y) color difference signal is supplied to the balanced modulation circuit 29.

By the way, the phase shifter 30 receives a signal of color subcarrier frequency fs from the (1/4.) frequency dividing circuit 3 and (1/N 3 ).
A signal with a horizontal scanning frequency of +8 is supplied from the frequency dividing circuit 10, and the phase shifter 30 inverts the phase of the signal of the color subcarrier frequency fsc by 1806 points every horizontal scanning frequency fN period and outputs the inverted signal. For example, if the phase of the color subcarrier signal is
The color subcarrier signal is inverted at 90° and 2700° for each horizontal scanning period and is output, and the color subcarrier signal output from the phase shifter 30 is supplied to the balanced modulation circuit 28.

Therefore, the balanced modulation circuit 28 generates a color subcarrier signal (90'/2700
> is balanced-modulated with the (RY) color difference signal and a carrier color signal is supplied to the mixing circuit 31.

Further, the balanced modulation circuit 29 is supplied with a color subcarrier signal (180') from the (1/4) frequency dividing circuit 3.

Therefore, the balanced modulation circuit 29 outputs a carrier color signal obtained by balanced modulating the color subcarrier signal (180°) supplied from the (1/4) frequency dividing circuit 3 with the (B-Y) color difference signal to the mixing circuit 31. do.
The carrier color signal mixed by the mixing circuit 31 is supplied to the mixing circuit 32, separated by the luminance signal separation circuit 20, and mixed with the luminance signal supplied to the mixing circuit 32 to form a composite video signal (reproduction signal). Become.

(Problems to be Solved) As mentioned above, in the signal processing process to obtain a PAl-based composite video signal from a reproduced information signal, the phase of the color subcarrier signal modulated by the (R-Y) color difference signal is changed by one horizontal line. It is necessary to switch to 1800 inversions (90°/270') every scanning period.

Furthermore, as shown in FIG. 3, the above-mentioned switching of the color subcarrier signal occurs over a period from the temporal position of the end of transmission of the video signal one horizontal scanning period before to the temporal position immediately before the transmission of the next burst signal starts. (approximately 7 μsec).

If the switching is not performed during this period, that is, if the switching timing of the color subcarrier signal is shifted, the color of the image transmitted during the horizontal scanning period in which the switching timing is shifted will be distorted.

Furthermore, since the reproduced information signal includes a time axis fluctuation (jitter) component, a stretcher filJIIl is performed to correct the time axis fluctuation (jitter) component.

The stretcher control is performed by supplying the composite synchronization signal of the reproduced information signal as described above and the horizontal synchronization signal output from the (1/N3) frequency dividing circuit 10 to the sawtooth wave generation circuit 13. The phase comparison circuit 23 performs a phase comparison between the sawtooth wave signal and the composite synchronization signal as shown in FIG.
This control is for correcting the time axis variation (jitter) component of the reproduced information signal by driving the sensor 17 and controlling the position of the sensor 17 in the h direction where the phase error signal (voltage) is canceled out.

The above-mentioned stretcher control is performed when the composite synchronization signal of the reproduced information signal is outputted from the (1/N 3 ) frequency dividing circuit 10 with respect to the horizontal synchronization signal shown in FIG. 5 (A). The signals are controlled so that they have different phases as shown in FIG. 5(B).

In other words, the phase of the horizontal synchronizing signal output from the (1/N3) frequency dividing circuit 10 is shifted by 1800, and the horizontal synchronizing signal (pulse) shown in FIG. 5(B) is supplied to the sawtooth wave generating circuit 13. As a result, the composite synchronization signal of the reproduced information signal (not shown in FIG.
1 for the signal shown in Figure 5(C) shifted by °.
It is controlled to have a phase difference of 80°.

Therefore, the composite synchronization signal shown in FIG. 5(D) of the reproduced information signal is in phase synchronization with the horizontal synchronization signal shown in FIG. do.

Furthermore, the phase of the color subcarrier signal balanced modulated by the (RY) color difference signal is output from the (1/N3) frequency dividing circuit 10 with respect to the reproduced video signal as shown in FIG. 5(E). Since the switching is performed at the timing shown in FIG. 5(F) by the horizontal synchronizing signal, the temporal position of the phase switching of the color subcarrier signal output from the phase shifter 30 and the composite synchronizing signal of the reproduced information signal are Since the arrival time position coincides,
(RY) Phase switching of the color subcarrier signal that is balanced-modulated by the color difference signal is performed from the temporal position of the end of transmission of the video signal one horizontal scanning period before to the start of transmission of the next burst signal, as shown in Figure 3. This will be carried out within a period (approximately 7 μsec) up to the immediately previous temporal position.

However, in reality, the phase of the horizontal synchronizing signal (pulse) supplied to the sawtooth wave generation circuit 13 is shifted by 1800 (1/N
3) Even if the shift circuit connected to the frequency divider circuit 10 is configured to accurately shift the phase by 180 degrees and generates a signal that shifts the phase by 180 degrees with accurate timing, the signal from the sawtooth projection q circuit 13 The accuracy of the generated sawtooth signal is determined by the time constants of the circuit components. In other words, the sawtooth wave generation circuit 13 includes, for example, a resistor,
] Consisting of capacitors, the constants of the circuit components change due to temperature changes, making it difficult to output a sawtooth signal at accurate timing.

As shown in FIG. 3, the switching timing of the color subcarrier signal is the period from the temporal position of the end of transmission of the video signal one horizontal scanning period before to the temporal position immediately before the transmission start of the next burst signal, that is, Since the switching period is approximately 7 μsec,
During circuit design, the temporal position of the phase switching of the color subcarrier signal that is balanced-modulated by the (R-Y) color difference signal is determined by the above switching period 7.
When set to a time position in the center of μsec, the time position of the phase switching has an allowable error range of ±3.5 μsec.

By the way, let us consider the value of the period of 3.5 μsec in the above-mentioned allowable error range from the sawtooth wave generating circuit 13. The sawtooth wave generation circuit 13 has a horizontal scanning period of 63.5μ.
Assuming that it is saturated in seconds, the error is 3.5/63.5 = 0.05 = 5.5C%]. Further, the sawtooth wave is represented by a saturation period t=RXC.

If we consider the errors of ordinary resistors (5% error) or capacitors (10% error), the maximum error is 15%.
Therefore, it is difficult to construct it using ordinary parts.

Furthermore, even if circuit elements with small errors are used (resistors (error: 1%), capacitors (error: 2%)), temperature changes and time axis fluctuations of the reproduced information signal (error:
However, due to jitter components and the like, it is difficult to accurately determine the switching timing.

Furthermore, if individual adjustments are made using variable resistors or the like in order to achieve accurate switching timing, there is a problem in that the manufacturing process and adjustment process are increased.

In order to generate the switching signal that determines the switching timing described above, it is necessary to take into account the temperature characteristics of the components that make up the circuit, and it is necessary to use components that have good temperature characteristics and less error. However, when using such parts,
The problem is that the price of the circuit is high, and even if high-precision components such as those mentioned above are used, the reproduced information screen has a time axis fluctuation (jitter) component. Therefore, there was a problem in that switching could not be performed at accurate switching timing.

Therefore, the present invention provides a first horizontal synchronization signal that is phase-synchronized with a composite synchronization signal separated from an information signal, and a reference horizontal synchronization signal that corresponds to the operating state of the disc-shaped information signal recording medium reproducing device or the state of the information signal. By selecting and switching the polarity of one of the two color modulation axes of the information signal at accurate timing without using special components, the quality of the reproduced signal is improved. It is an object of the present invention to provide a disc-shaped information signal recording medium reproducing device that can perform the following steps.

(Means and operations for solving the problems) In order to solve the above-mentioned problems, the present invention provides a disk-shaped information signal recording medium reproducing apparatus having a configuration as shown in FIG.

FIG. 1 is a block diagram of the basic configuration of a disc-shaped information signal recording medium reproducing apparatus according to the present invention.

In FIG. 1, A is a first horizontal synchronization signal generation system that outputs a first horizontal synchronization signal that is phase-synchronized with a composite synchronization signal separated from the supplied reproduced information signal, and B is a reference horizontal synchronization signal output system. a second horizontal synchronization signal generation system; C is a control circuit that outputs a control signal corresponding to the operating state of the disk-shaped information signal recording medium reproducing device or the state of the reproduced information signal; D;
The first horizontal synchronizing signal outputted from the first horizontal synchronizing signal generation system A and the reference horizontal synchronizing signal outputted from the second horizontal synchronizing signal generating system B are controlled by the control signal supplied from the control circuit C. The selection switching circuit E uses the signal output from the selection switching circuit to invert the modulation polarity of -h of the two color signal modulation axes of the information signal, thereby reproducing the form of the composite video signal. This is a signal processing unit that outputs as a signal.

(Embodiment) An embodiment of the disk-shaped information signal recording medium reproducing device according to the present invention will be described below with reference to FIG.

In addition, in Figure 6, the same components as in Figure 2 are
1 is given the same reference numeral and the explanation thereof will be omitted.

In addition, a crystal resonator 1, a crystal oscillation circuit 2, a (1/4) frequency dividing circuit 3, a (1/N+) dividing circuit 4, a phase comparator circuit 5, (
The 1/N2) frequency divider circuit 6, the filter 7, the voltage controlled oscillation circuit 8, the <1/2) frequency divider circuit 9, and the (1/N3) frequency divider circuit 10 constitute a second horizontal synchronization signal generation system B. element,
FM demodulation circuit 18, color signal separation circuit 19, luminance signal separation circuit 20, color signal demodulation circuit 27, balanced modulation circuit 27゜2
8. Mixing circuit 3L32 is an element constituting the signal processing section E.

For example, a composite synchronization signal separated from an information signal reproduced from a disk or the like is supplied to the terminal 33.
The reproduced composite synchronization signal inputted to the terminal 33 is supplied to an equalization pulse handling circuit 34.

The signal from which the equalization pulse has been extracted by the equalization pulse extraction circuit 34, that is, the reproduced horizontal synchronization signal, is supplied to the phase comparison circuit 35 as a reference signal.

The phase comparator circuit 35 receives a reproduced horizontal synchronizing signal supplied from the equalization pulse handling circuit 34 (described later) (1/N
a) Compare the phase with the signal supplied from the frequency dividing circuit 40, and if the phases of both signals are different, output a phase error signal (voltage) corresponding to the phase difference.

Phase error signal (voltage) output from the phase comparison circuit 35
is supplied to a voltage controlled oscillation circuit 37 via a filter (for example, a low-pass filter) 36.

The voltage controlled oscillation circuit 37 outputs a signal with a frequency corresponding to the phase error No. 15 (voltage) supplied from the phase comparison circuit 35 via the filter 36.

To be more specific, the voltage controlled oscillation circuit 37 has a frequency of 282 f in the case of the PAL system.

Outputs a signal with the oscillation center frequency set to the frequency.

The signal output from the voltage controlled oscillation circuit 37 is (1/2)
The signal is supplied to the frequency dividing circuit 38. The signal whose frequency is reduced to (1/2) by the (1/2) frequency dividing circuit 38, that is, 141 f+ (PAL system), is supplied to the switching circuit 39, which is a selection switching circuit.

The switching circuit 39 supplies the signal from the (1/2) frequency divider circuit 38 and the signal from the above-mentioned (1/2) frequency divider circuit 9 from a control circuit (not shown in FIG. 6), which will be described later. The output is selectively switched in response to a predetermined control signal.

The signal output from the switching circuit 39 is (1/N
s) is supplied to the frequency divider circuit 4o.

(1/Ns) The frequency dividing circuit 40 is the switching circuit 3
After dividing the frequency of the signal supplied from 9 by (1/N s >), it is supplied to the terminal 41 and the phase comparator circuit 3
Supply to 5. It is also supplied to the phase shifter 3o.

The phase shifter 30 is composed of (1/4) branching circuit 3 and (1/N s
) A color subcarrier signal of a predetermined phase is supplied to the balanced modulation circuit 28 using the signal supplied from the frequency dividing circuit 40.

Specifically, in the case of the PAL system, the phase shifter 30 changes one color per horizontal scanning period. A signal with a J carrier frequency fsc (90'') and a signal with a color subcarrier frequency fsc (270°) are output alternately, and the (1/4) frequency divider circuit 3 outputs a signal with a color subcarrier frequency fsc (180'). A signal is output.

Note that if the circuit shown in FIG. 6 is a circuit that processes a PAL video signal, the value of N6 above is 1.
It is said to be 41.

Therefore, the signal output from the (1/N s ) frequency dividing circuit 40 becomes a signal with a horizontal scanning frequency of H.

In addition, an equalization pulse extraction circuit 34 and a phase comparison circuit 35
, filter 36, voltage controlled oscillation circuit 37, (1/2) frequency dividing circuit 38, and (1/Na) frequency dividing circuit 40 constitute a first horizontal synchronizing signal generation system A, and the switching circuit 3
9 is selectively switching the output signal of the first horizontal synchronizing signal generation system A, the output signal from the (1/N s ) frequency dividing circuit 40 is the same as the input signal output from the equalization pulse extraction circuit 34. A signal that is phase-synchronized with the phase of the signal. In other words, the signal output from the first terminal 41 becomes the first horizontal synchronization signal (pulse) phase-synchronized with the composite synchronization signal extracted from the information signal, and the phase shifter 30 has (1/
Ns) Since the first horizontal synchronizing signal is supplied from the frequency dividing circuit 40, the phase shifter 30 always maintains accurate timing (this accurate timing is the video signal before the start of one horizontal scanning period of the reproduced information signal). It is possible to switch the phase of the signal of the color subcarrier frequency fsc during the period from the temporal position of the end of transmission to the temporal position immediately before transmission of the next burst signal.

By the way, in one embodiment of the disc-shaped information signal recording medium reproducing apparatus according to the present invention shown in FIG. 6, the control circuit C (fourth (not shown in the figure) includes, for example, the state of the sensor that reproduces information signals from the disc, the rotational state of the motor that rotates the disc, and the operation (high-speed search operation fl') that searches for a desired information signal at high speed. The configuration is configured to supply a predetermined control signal to the switching circuit 39 using the presence or absence of the same as an identification condition.

That is, for example, when the sensor is reproducing information signals from the disk, the motor is at a predetermined reproducing rotation speed, and there is no high-speed operation input, the control circuit C Since the switching circuit 39 outputs a control signal that selectively outputs the signal from the (1/2) frequency divider circuit 38, the first horizontal synchronizing signal (pulse) is output from the (1/Ns) frequency divider circuit 40. ) is output. In addition, if the sensor is not in a state of reproducing information signals from the disk, or the motor is not in a state of a predetermined reproducing rotational speed, or if there is a high-speed search operation input, the control circuit C causes the switching circuit 39 to Since a control signal for selectively outputting the signal from the (1/2) frequency divider circuit 9 is output, the (1/N s ) frequency divider circuit 40 outputs a reference horizontal synchronizing signal.

Hereinafter, with reference to FIG. 7, the circle according to the present invention! ! U? A control circuit of an embodiment of an information signal recording medium reproducing device will be described. FIG. 7 is a block diagram of a control circuit of an embodiment of the disc-shaped information signal recording medium reproducing apparatus according to the present invention.

The control circuit 42 shown in FIG. 7, which is the control circuit C, outputs a predetermined control signal depending on the state of the sensor, the rotational state of the motor, and the presence or absence of a high-speed search operation input.

Here, a signal corresponding to the state of the sensor is supplied to the terminal 43 of the control circuit 42.

For example, when the sensor is in a state of reproducing information signals from the disk, a signal of level 1 is supplied to the terminal 43;
When the sensor is not in a state of reproducing information signals from the disc, an L level signal is supplied to the terminal 43.

Further, a signal corresponding to the rotational state of the motor is supplied to the terminal 44.

For example, if the rotation speed of the motor is the regeneration speed (steady rotation state)
In this case, an H level signal is supplied to the terminal 44,
When the rotation speed of the motor is not at the reproduction speed (steady rotation state), an L level signal is supplied to the terminal 44.

Furthermore, a signal corresponding to the high speed υ-chi operation input is supplied to the terminal 45.

For example, when there is a high-speed search input, an H level signal is supplied to the terminal 45, and the high 3! When there is no υ-wave input, an L level signal is supplied to the terminal 45.

The signals supplied to the terminals 43 and 44 are supplied to a NAND circuit 46.

Therefore, the NAND circuit 46 outputs an L level signal only when the sensor is in the state of reproducing information signals from the disk and when the motor is at the reproducing rotation speed (steady rotation state), and in other cases. An H level signal is output.

The signal supplied to the terminal 45 and the signal output from the NAND circuit 46 are supplied to an OR circuit 47.

Therefore, the OR circuit 47 outputs an L level only when the sensor is reproducing the information signal from the disk, the motor is at the reproducing rotational speed (steady rotational state), and there is no high-speed υ-b scanning input. control of
A control signal is output, otherwise an I'' level control signal is output.

The three switching circuits are selectively switched so as to output the output signal from the (1/2) frequency divider circuit 9 when the control circuit 42 outputs the control signal at the 1'' level, and the control circuit 42 outputs the output signal from the frequency dividing circuit 9 at the L level. When outputting a signal, it is configured to be selectively switched so that the output signal from the (1/2) frequency divider circuit 38 is output.

Note that the control circuit 42 described above may have various configurations other than the configuration shown in FIG. Needless to say, any control circuit configured as shown above will suffice.

In the above embodiment, the first horizontal synchronization signal outputs the first horizontal periodic signal phase-synchronized with the composite synchronization signal separated from the information signal depending on the operating state of the disk-shaped information signal recording medium reproducing device or the reproducing state of the information signal. The output signal from the generation system △ and the output signal from the second horizontal synchronization signal generation system 8 which outputs the reference horizontal synchronization signal are selected by a selection switching circuit, and the output signal from the selection switching circuit is switched. Using the signal processing section E
is configured so that the modulation polarity of one of the two color modulation axes is inverted every horizontal scanning period, so the phase of the color subcarrier signal modulated by the (R-Y) color difference signal can be adjusted at accurate timing. It is possible to switch between the two and obtain good reproduced images.

Furthermore, in the case of the S[CAM system, which is a standard television system other than the above-mentioned standard pre-vision system, it can be handled by applying the case of the PΔ[ system described in the above embodiment.

Furthermore, although the above embodiments have been described using the P to L standard television system as an example, the present invention can also be applied to other standard television systems such as the NTSC system and the S E CA H system. In the case of the NTSC7'1 type, set the constants N1 to N6 of each of the (1/N+) frequency divider circuit 4 to (1/Ns) frequency divider circuit 40 as shown in the table below, and set the signal Processing part E is NTSC
It is only necessary to configure the system so that it can process the video signal of the system.

In addition, in the case of S [CAM method, (1/N+) branch circuit 4
The constants N1 to N6 of each of the frequency dividing circuits of the ~(1/Ns) frequency dividing circuit 40 need only be set to be the same as those of the PAL system, and the signal processing section E is configured to be able to process video signals of the 5ECAI4 system. do it.

(Effects of the Invention) Since the present invention has the above-described configuration, it is possible to satisfactorily perform signal processing related to the reproduced information signal, and in particular, the reproduced information signal can be processed without using any special components. This has the advantage that the modulation pole of one of the two color modulation axes can be switched with accurate timing, and the quality of the reproduced signal can be improved.

[Brief explanation of drawings]

FIG. 1 is a block system diagram of the basic configuration of a disk-shaped information signal recording medium reproducing apparatus according to the present invention, FIG. 2 is a block system diagram of an example of a conventional disk-shaped information signal recording medium reproducing apparatus, and FIG. FIG. 4 is a diagram for explaining the timing of information switching of the color subcarrier IH, FIG. 4 is a diagram for explaining the sawtooth wave signal, and FIG. FIG. 6 is a diagram for explaining an embodiment of the disc-shaped information signal recording medium reproducing apparatus according to the present invention.
, II Block System Diagram of 18 Circuits FIG. 7 is a block system diagram of a control circuit of an embodiment of the disc-shaped information signal recording medium reproducing apparatus according to the present invention. A...First horizontal synchronization signal generation system, B...Second horizontal synchronization signal generation system, C(42)...Control circuit, D...Selection switching circuit, E
...Signal processing unit, 1...Crystal, 2...Crystal oscillation circuit, 3...(1/
4) Frequency divider circuit, 4°-(1/ゝ+) 9fflC1il”・
j5.23.35...Phase comparison circuit, 6...(1/N2) frequency dividing circuit, 7.25.36
...filter, 8.37...power control oscillation circuit, 9.38...(1/2) branching circuit, 10...(1/N3) frequency dividing circuit, 11...(1) /N a ) Frequency divider circuit, 12.14.
24,33゜41.43,44.45...Terminal, 13...Sawtooth wave generation circuit, 15...(1/N5) frequency dividing circuit, 16...Disc-shaped information signal edge medium ( disk), 17... Len + J
, 18... FM demodulation circuit, 19... Color signal classification circuit, 20... Luminance signal separation circuit, 21... Synchronization I8 separation circuit, 22... Vertical direction t! ] Signal separation circuit, 26...=1
27... Color signal demodulation circuit, 28.29... Balanced modulation circuit, 30... Phase shifter, 3
1.32...Mixing circuit, 34...Equalizing pulse extraction circuit, 39...Switching circuit, 40...(1/Ns) frequency dividing circuit, 42...Control circuit, 4G... NAND circuit, 47...OR circuit. 1 figure, 2 eyes, 73 troubles, 74 figures, 5 torture - yu

Claims (1)

[Claims] An information signal recorded on a disc-shaped information signal recording medium is reproduced to produce a reproduced signal in the form of a composite video signal containing a color signal in which the modulation polarity of one of two color signal modulation axes is reversed at predetermined intervals. A disc-shaped information signal recording medium reproducing device for outputting a disc-shaped information signal recording medium, comprising: a control circuit that outputs a control signal corresponding to an operating state of the disc-shaped information signal recording medium reproducing device or a state of the information signal; and a control circuit separated from the information signal. A first horizontal synchronization signal generation system that outputs a first horizontal synchronization signal phase-synchronized with the composite synchronization signal, and a second horizontal synchronization signal generation system that outputs a reference horizontal synchronization signal.
a horizontal synchronizing signal generation system, and the first
a selection switching circuit that selects and outputs the horizontal synchronization signal and the reference horizontal synchronization signal, and a modulation polarity of one of the two color signal modulation axes of the information signal using the output signal of the selection switching circuit; A disc-shaped information signal recording medium reproducing apparatus comprising: a signal processing section that inverts the signal at predetermined intervals and outputs the resultant signal as a reproduced signal in the form of a composite video signal.