JPS6074481A - Schottky barrier diode - Google Patents

Schottky barrier diode

Info

Publication number
JPS6074481A
JPS6074481A JP15902484A JP15902484A JPS6074481A JP S6074481 A JPS6074481 A JP S6074481A JP 15902484 A JP15902484 A JP 15902484A JP 15902484 A JP15902484 A JP 15902484A JP S6074481 A JPS6074481 A JP S6074481A
Authority
JP
Japan
Prior art keywords
region
semiconductor
regions
schottky barrier
guard ring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15902484A
Other languages
Japanese (ja)
Inventor
Yuki Shimada
島田 悠紀
Shohei Sekiya
関谷 庄平
Katsunori Ichikawa
市川 且典
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd, Nippon Telegraph and Telephone Corp filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP15902484A priority Critical patent/JPS6074481A/en
Publication of JPS6074481A publication Critical patent/JPS6074481A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To effectively lessen inverse current without reducing the forward direction characteristics of the title diode by a method wherein each outermost side circumferential edge part of the Schottky barrier metal region is encircled with a guard ring region, and at the same time, the inverse withstand voltage of each semiconductor part adjoining to them is made to drop. CONSTITUTION:The depth and width of each guard rind 4 are respectively set deeper and wider than those of each of semiconductor regions 7 for space-charge region formation. Each semiconductor region at the outermost edges is made to function as the guard ring 4 and a Schottky barrier forming metal laer 1 is formed across the semiconductor regions 4 and 7 and regions surrounded with the regions 4 and 7. The interval (a) and (b) of the encircled regions are set in most than double that of each of depletion layers, which are made of the p<+> type and N<-> type semiconductors, that is, in a degree that the passages for inverse current can be reduced to zero by pinchoff. For preventing the with-stand voltage from dropping, the guard ring 4 is respectively provided at the outermost side circumferential edge parts of the P-N junction.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は逆電圧印加時の逆電流を減少せしめ/ζ効率の
高いンヨノトキバリアダイオードに関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a barrier diode that reduces reverse current when a reverse voltage is applied and has high efficiency.

(従来技術) 従来のンヨソトキバリアダイオードは第1図(C示すも
のが代表的である。第1図において1(d/ヨノトキバ
リア形成金属層、2は絶縁被膜、例乏−ば/リコン酸化
膜、3は半導体基体(例えは/リコン)、4は基体3と
反対導電型の’kbとh1半導体層で形成するガードリ
ングである。141 r2+の場合はンヨソトキバリア
形成金属層1の周辺部を酸化膜2でカバーし、特性の安
定化を図っている。これら従来のものはバリヤ・・イト
の高さのみを利用するので動作原理上11kW方向屯圧
を低くすると、逆電流が増加する構造であり、効率の向
上には限界があった。
(Prior art) A typical conventional barrier diode is shown in FIG. 1 (C). In FIG. 3 is a semiconductor substrate (for example, /recon), 4 is a guard ring formed by 'kb and h1 semiconductor layers of the opposite conductivity type to the substrate 3. In the case of 141 r2+, the peripheral part of the barrier forming metal layer 1 is It is covered with an oxide film 2 to stabilize the characteristics.Since these conventional devices only utilize the height of the barrier, due to the operating principle, if the directional pressure is lowered to 11kW, the reverse current increases. Therefore, there was a limit to the improvement of efficiency.

丑だンヨソトキバリアメタルの周辺部での電界集中の/
ζめ、配圧をPNダイオードの場合のように理論値の7
0係近くになるようには出来なかった。
Electric field concentration around barrier metal /
ζ, the pressure distribution is set to the theoretical value of 7 as in the case of a PN diode.
I couldn't make it close to 0.

本発明はこれら従来型の欠点を解決するため、順方向電
圧降下を充分に低−「シ、逆]1111圧はカード、リ
ング効果を利用して高くとり、高効率の7ヨノトキバリ
アダイオードを得るものである。
In order to solve these drawbacks of the conventional type, the present invention makes the forward voltage drop sufficiently low - 1111 voltage is high using the card and ring effect, and uses a highly efficient 7-way barrier diode. It's something you get.

(図ではN−型)6と反対導電型(図ではP+型)の最
外縁領域(ガードリング領域)、7は前記最外縁領域4
に囲まれたこれと同一導電型の半導体領域、5及び1は
前記領域4に囲まれた半導体層領域及び該最外縁領域4
に跨がり且つ該最外縁領域4と領域7間の半導体層領域
上に夫々設けたノヨノトキバリア形成金属層、8は半導
体層6と同一導電型の半導体基体(図ではN+型)、9
は絶縁被膜、例えばノリコン酸化膜、Aはノヨソトキバ
リア形成金属層(1,、5)に設け/コ(+l 電極(
第37(S’。
(N- type in the figure) 6 and the outermost edge region (guard ring region) of the opposite conductivity type (P+ type in the figure), 7 is the outermost edge region 4
5 and 1 are semiconductor layer regions surrounded by the region 4 and the outermost region 4.
8 is a semiconductor substrate having the same conductivity type as the semiconductor layer 6 (N+ type in the figure); 9
is an insulating film, such as a Noricon oxide film, and A is provided on the Noyosotoki barrier-forming metal layer (1, 5)/co(+l electrode (
No. 37 (S'.

極)、Bは半導体基体8のF而に設けた(−)電極(第
1電極)である。
B is a (-) electrode (first electrode) provided at F of the semiconductor substrate 8.

ここで4は従来のPNダイオードの揚台にも設けられる
ことがあったガードリングであるから、その深さ、幅(
・J空間電荷・頭形成用半導体領域7のものよりも深く
広く設定される。
Here, 4 is a guard ring that was sometimes provided on the platform of a conventional PN diode, so its depth and width (
- It is set deeper and wider than that of the J space charge/head forming semiconductor region 7.

最外縁の半導体領域4をカードリンクとなし、且つ/ヨ
ノトキバリア形成金属層1(又に15)が核″1−47
体領域4.半導体鎮域7及びこitらに四4れt(半導
体層領域にまたがって形成されている。
The outermost semiconductor region 4 is used as a card link, and/the barrier forming metal layer 1 (also 15) is the core "1-47".
Body area 4. The semiconductor regions 7 and 44 are formed over the semiconductor layer region.

又、取り囲まれ/こ領域の間隔a、bは■〕I′N−に
、Lる空乏層の2倍以5ド、即ちピンチオフに1=り逆
電流の通路が消滅しうる程度にしている。
In addition, the distances a and b between the surrounding regions are set to such an extent that the reverse current path of 1 = 1 = disappears during pinch-off. .

/ヨy ) キクイA−)’M!’1NI−i?Iりの
周:)J r?li −c (t:I、)、17i造の
連続性がときれる/こめ、電界集中が)5c、/l′、
シやすく、高耐圧化をはかることが困1!11であるこ
とが知られている。このような例は、一般的なPNダイ
オードの場合でも知られている。
/yoy) Kikui A-)'M! '1NI-i? I'm here :) J r? li -c (t:I,), 17i structure continuity is broken /kome, electric field concentration)5c, /l',
It is known that it is easy to remove, and it is difficult to increase the voltage resistance. Such an example is also known in the case of a common PN diode.

したがってPNダイオードの場合でも、11j]圧低[
を防止するため、ガードリングをPN接合の最外周辺縁
部に設けられて来た。したがって、/ヨノトキバリアダ
イオードの場合、第1図に示すような構造を利用してバ
リアメタル直下の領域を、逆電圧印加時に、空間電荷領
域で実質的にうめ尽そうとしてもそれによって達成され
る逆面j圧は、ガードリングを有さない従来のPNダイ
オード並みのものでしかない。
Therefore, even in the case of a PN diode, 11j] pressure low [
To prevent this, a guard ring has been provided at the outermost peripheral edge of the PN junction. Therefore, in the case of a barrier diode, even if the structure shown in Figure 1 is used to substantially fill the area directly under the barrier metal with the space charge area when a reverse voltage is applied, this will not be achieved. The reverse surface j pressure is only comparable to that of a conventional PN diode without a guard ring.

し/こがって従来のPNダイオードの逆耐圧の高電圧化
はガードリングを並設することで達成されたように、第
1図に示すノヨソトキバリアダイオードの場合にも、活
性部の最外周縁部にガードリングを並設することによっ
てよシ一層の高1制圧化を達成することができる。
However, just as the reverse withstand voltage of the conventional PN diode was achieved by installing guard rings in parallel, the Noyosotoki barrier diode shown in Figure 1 also has a high reverse breakdown voltage of the active part. By arranging guard rings in parallel on the outer peripheral edge, it is possible to further suppress the height.

すなわち、耐圧比較を敢えて行なうとすれば本所構造タ
ガードリング伺きPNダイオード〉第1図の/ヨソトキ
ダイオードタガードリングなしPNダイオード(〉単純
7ヨノヒキバリアダイオード)となる。
That is, if we were to compare the withstand voltages, we would compare a PN diode with a tagger ring with a Honjo structure, a PN diode without a tagger ring, and a PN diode without a tagger ring (a simple 7-way barrier diode).

第2図による本発明の7ヨツトキバリアダイオードの設
置例を示すと、 N+層 1/1000〜3/100(lΩ−an厚さ2
00μmηのザブストレート層 N一層 05Ω−cm 厚さ5μmのエピタキンアル層 ■針留 表面濃度2X1.01”個/cc以1:深さ1
5μmの半導体拡散層 間隔a、b 2〜3μm このような設営1において、115の7ヨノトキバリア
形成金属層とし一〇はクロノ1.モリブデンあるいはチ
タンを蒸着して得ることができる。更に、第3図(a、
) 、 Q))に半導体基体と反対s、j’fi TF
i 塑の半導体mによって取り四重れ/こ領域を複数個
設け/こ本発明の他の実施例を示すパ゛第;3図は第2
図に夫々苅応するものであって、その作用は同一である
が、取り四重ねた領域を複数個設けて電ツノ処理容1汁
の大きな半導体基体面積の大なる/ヨノトギバリアダイ
オードの逆電流を有効に低減している。また反対導電型
半導体領域7相互間l−1連結さね、ているが、7によ
って取り囲捷れた領域が逆電圧印加時にピンチオフされ
Sばよい。なお各図においてN型半導体基体を用いたが
必要に応じてI)型導電型半導体茫体を選択しうるのは
もちろんである。
An example of the installation of the 7-layer barrier diode of the present invention according to FIG. 2 is as follows:
00 μm η Zabstraight layer N single layer 05 Ω-cm 5 μm thick epitaxy layer ■ Needle clamp Surface concentration 2 x 1.01” pieces/cc or more 1: Depth 1
Semiconductor diffusion layer spacing a, b of 5 μm 2 to 3 μm In such construction 1, 115 7th barrier forming metal layer and 10 are Chrono 1. It can be obtained by vapor depositing molybdenum or titanium. Furthermore, Figure 3 (a,
), Q)) opposite to the semiconductor substrate s, j'fi TF
i. A plurality of quadruple regions are formed using a plastic semiconductor m.
Although the function is the same, it is possible to create a large semiconductor substrate area with a large electric horn processing capacity by providing a plurality of overlapping regions. Effectively reduces current. Further, although the opposite conductivity type semiconductor regions 7 are connected to each other by l-1, the region surrounded by the semiconductor regions 7 may be pinched off when a reverse voltage is applied. Although an N-type semiconductor substrate is used in each figure, it goes without saying that an I) type conductivity type semiconductor substrate can be selected as required.

以上説明したように、本発明の/ヨノトキバリアダイオ
ードは順方向特性をぎせいにすることなく逆電流を有効
忙小在らしめる。!]”)に′r13.力用として高周
波特性の良い高効率の整流素子をうることができ、実用
に供して極めて効果大なるものである。
As explained above, the barrier diode of the present invention effectively reduces reverse current without impairing forward characteristics. ! ]'') It is possible to obtain a highly efficient rectifying element with good high frequency characteristics for power use, and it is extremely effective in practical use.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のンヨソトキバリアダイオードの構造図、
第2図、第3図は本発明の実施例を示す図において1は
/ヨノトキバリア形成金属層、/\ 2及び9は絶縁被膜、ニー3及び8は半導体基体、4は
3,8と反対導電型の半導体領域、7は6と反対導電型
の半導体領域、6は8と同−rj:i、屯型の半導体層
、Aは十電極、Bは一電極。 洛1図 ノ 熟20 第3(2) to> (bl
Figure 1 is a structural diagram of a conventional barrier diode.
Figures 2 and 3 are diagrams showing embodiments of the present invention, in which 1 is a barrier-forming metal layer, 2 and 9 are insulating coatings, knees 3 and 8 are semiconductor substrates, and 4 is the opposite conductor to 3 and 8. 7 is a semiconductor region of the opposite conductivity type to 6, 6 is the same as 8 -rj:i, a trapezoidal semiconductor layer, A is a ten-electrode, and B is one electrode. Raku 1 Zu no Juku 20 No. 3 (2) to> (bl

Claims (1)

【特許請求の範囲】 第1の導電形半導体領域上に、ノヨソトキバリアメタル
と第2の導電形半導体小領域群が形成され、ノヨットキ
バリアメタルと第1の導電形半導体領域間の逆耐圧より
も低い逆電圧を印加した状態で、前記第2の導電形半導
体小領域間が、空間電荷領域によって結ばれる大きさと
されるよう形成された/ヨットキバリア半導体装置に於
いて、ショットキバリアメタル領域の最外側周辺縁部を
第2の導電形半導体で形成されるガードリング領域で取
り囲むと共に、かつ、上記の第2の導電形成 半導体小額群の上記ガードリングに隣接する小領へ 域との間に位置する第1の導電形半導体部がいずれも、
第1の導電形半導体とショットキバリアメタルとの逆耐
圧よシも低い逆電圧を印加した状態で、空間電荷領域で
うめられるように設定きれて形成されたことを特徴とす
るショットキバリアダイオード。
[Claims] A Noyotoki barrier metal and a second conductivity type semiconductor small region group are formed on the first conductivity type semiconductor region, and an inverse relationship between the Noyotoki barrier metal and the first conductivity type semiconductor region is formed. In a Schottky barrier semiconductor device, the Schottky barrier metal region is formed such that the second conductivity type semiconductor small regions are connected by a space charge region when a reverse voltage lower than the withstand voltage is applied. The outermost peripheral edge of is surrounded by a guard ring region formed of a second conductive type semiconductor, and is between a small region adjacent to the guard ring of the second conductive semiconductor small group. Both of the first conductivity type semiconductor portions located in
A Schottky barrier diode characterized in that it is formed so as to be filled in a space charge region when a reverse voltage that is lower than the reverse breakdown voltage between a first conductive type semiconductor and a Schottky barrier metal is applied.
JP15902484A 1984-07-31 1984-07-31 Schottky barrier diode Pending JPS6074481A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15902484A JPS6074481A (en) 1984-07-31 1984-07-31 Schottky barrier diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15902484A JPS6074481A (en) 1984-07-31 1984-07-31 Schottky barrier diode

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP7765179A Division JPS562672A (en) 1979-06-20 1979-06-20 Schottky barrier diode

Publications (1)

Publication Number Publication Date
JPS6074481A true JPS6074481A (en) 1985-04-26

Family

ID=15684584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15902484A Pending JPS6074481A (en) 1984-07-31 1984-07-31 Schottky barrier diode

Country Status (1)

Country Link
JP (1) JPS6074481A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02137368A (en) * 1988-11-18 1990-05-25 Toshiba Corp Semiconductor rectifier
US5389815A (en) * 1992-04-28 1995-02-14 Mitsubishi Denki Kabushiki Kaisha Semiconductor diode with reduced recovery current

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02137368A (en) * 1988-11-18 1990-05-25 Toshiba Corp Semiconductor rectifier
US5389815A (en) * 1992-04-28 1995-02-14 Mitsubishi Denki Kabushiki Kaisha Semiconductor diode with reduced recovery current

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