JPS607382A - Watch metronome - Google Patents

Abstract

PURPOSE:To enable a common use of a reference clock signal generator by a metronome section and a watch section by providing a specified reference sound synthesizing circuit to allow a highly accurate setting of the frequency of output signals even when the frequency of the reference clock is low. CONSTITUTION:A metronome section 2 and a watch section 3 are arranged and reference clock signals from a reference oscillator 4 are fed these sections. The metronome section 2 is equipped with a reference sound synthesizing circuit comprising a scale synthesizing section 24 and a reference sound generating section 25. The synthesizing circuit is equipped with an arithmetic unit, an accumulator and a memory and a series of sampling data with a desired waveform are read out sequentially from the memory as output of the scale synthesizing section 24, converted into a discontinuous analog data with the reference sound generating section 25 and taken out as continuous analog waveform signal with a desired frequency through an LPF to be fed to a speaker.

Description

[Detailed description of the invention] The present invention relates to a watch-metronome.

Recently, various metronomes using electronic circuits have been proposed, but these types of devices are required to output signals with fractional frequencies, such as 440Hz±α, with high precision. Therefore, it is necessary to have a highly accurate waveform synthesis circuit.

As such a waveform synthesis circuit, for example, sampling data of the basic waveform of a desired waveform signal is stored in a memory in advance, and a continuous analog waveform of a desired frequency is generated by appropriately changing the cycle of a read clock applied to the memory. Waveform signal generation circuits designed to obtain signals have been used. However, in this type of waveform signal generation circuit,
The base thread clock pulse is divided appropriately to obtain a readout signal of a desired frequency, and the waveform signal of the desired frequency is obtained from the memory by stiffness. It is necessary to increase the frequency of the thread clock pulse, which increases the number of frequency division stages, increases the circuit scale, and has the drawback of increasing current consumption.

Therefore, it is an object of the present invention to provide a signal generator capable of accurately controlling the frequency of a signal read out from a waveform memory even if the frequency of a base ring signal source is low; To provide a watch metronome which can realize a metronome function based on a signal and also has a clock function operated by a basic signal from a standard No. 16 source.

According to the present invention, there is provided a base ring oscillator that outputs a reference clock signal, a setting section, and a first synthesis section that synthesizes a required tempo and time signature in response to the reference clock signal and the setting signal from the setting section. a metronome display section that displays the output from the first synthesis section; a reference sound generation circuit that generates a desired reference tone in response to the basic thread clock signal and the setting signal from the setting section; and the reference clock signal. the reference sound generation circuit includes a memory in which sampling data of the fundamental waveform of the reference sound is stored, and a clock section operated by the setting section; an arithmetic means for calculating the cumulative value A per clock of the reference clock signal; an adder for calculating the cumulative value A per clock of the reference clock signal; and an adder for calculating the cumulative value A per clock of the reference clock signal; It is characterized in that it comprises means for specifying a read address of the memory according to the data of the integer part.

The value of the cumulative value A is determined by the following formula % formula % (1) using the frequency fo of the reference clock, the frequency fa of the desired reference sound, and the number N of waveform data for one cycle, with the desired number of digits below the decimal point. This value can be easily calculated as a value, and using this value, a floating point accumulation operation is performed in an adder q4, and this addition A.

The integer part of the result is sequentially used as address data. Therefore, the output data from the adder always accurately indicates the address value necessary to obtain the signal of frequency fa, and the frequency of the obtained reference sound signal will therefore be exactly the desired frequency fa. .

As can be seen from the above description, the frequency value fa of this reference sound can be set to any value and can be synthesized, so it is also possible to synthesize a reference sound having an arbitrary fraction.

By configuring the reference sound generation circuit as described above, the frequency of the reference clock signal can be low, and therefore, the frequency of the reference clock signal is usually used as a reference clock signal for watches.
It can be set to 68 Hz. As a result, it becomes possible to use a common reference pulse signal source for the clock section and the metronome section, and a watch metronome can be constructed without increasing the circuit scale.

Hereinafter, the present invention will be explained in detail with reference to illustrated embodiments.

FIG. 1 shows a block diagram of an embodiment of a watch-metronome according to the present invention. This watch meeting metronome includes a metronome section 2 and a watch section 3, and a reference clock signal CL outputted from a reference oscillator 4 is commonly supplied to the metronome section 2 and the watch section 3. This is a scale setting device indicated by the symbol 5, which inputs information such as the operation mode of this IF, the tempo, beat, and scale settings of the metronome, the time correction of the clock, and the time setting of the timer, and converts it into electrical signals. It is a device for converting. Setting information signal S output from the setting device 5
S is input to the metronome section 2 and the tsuchi section 6.

The watch section 6 is a timekeeping function section consisting of a clock section 31 and a timer section 32, and the clock section 61 uses the reference clock OL to generate a one-second pulse L2, which activates a counter to keep track of hours, minutes, and so on. Outputs time data DI in seconds. The timer section 32 receives a reference clock signal CL input after application of the counting start timing signal given by the setter 5.
The number of pulses is counted, and the counting result is output as elapsed time data Da. This elapsed time data Da obtained by counting the differential clock signal OL is applied to the display device B.

The display 6 includes a display device for displaying the time based on the time data Di and the time based on the elapsed time data Da.

On the other hand, the metronome section 2 has a tempo synthesis section 21 into which the base clock OL is input, and creates a timing signal T1 of a desired tempo specified by data input from the setting device 5, and synthesizes the beat and child. The information is input to the section 22. In the time signature synthesis section 22, the timing signal TI is converted into a time signature signal 0 representing the new strong and weak time signature, and the metronome display section 23 is driven by this time signature signal O.

The metronome display section 26 can be of a type that outputs a desired beat signal in accordance with the beat signal 0, but may have other display formats.

However, since it is well known that metronome display can be performed electronically at a desired beat based on such basic thread clock OL, detailed explanation thereof will be omitted.

The metronome trt+S2 further includes a fundamental W tone synthesis circuit 26 connected to the scale synthesis section 24 and the reference tone generation section 25 in order to output a predetermined reference tone, for example, a 440.0 Hz tone. The scale synthesis unit 24 is a circuit that outputs fundamental waveform data of the designated frequency in response to the frequency designation data and the basic clock signal OL output from the setter 5, and the reference sound waveform data D1. is output as an audible sound by the reference sound generating section 25.

FIG. 2 shows a detailed block diagram of the reference sound synthesis circuit 26. Reference numeral 41 indicates a memory in which a waveform ramp data for one cycle of the basic waveform is stored.

FIG. 3 schematically shows the state of the waveform sampling data shown in FIG. 2 and stored in the memo IJA1. This waveform ramping data is data obtained by sampling one cycle of the basic sine wave signal into 256 parts, and each sampled data is stored in the address address 256 as 8-bit data.

Therefore, the level of the basic waveform data is shown in 256 levels.

The reference sound synthesis circuit 26 includes an arithmetic unit 42 and an accumulator 46 so that data in the memory 41 can be read out at appropriate time intervals for all addresses or discrete addresses, and waveform signal data of a desired frequency can be obtained. It also has the following. Frequency data D4 for specifying a desired frequency fa is inputted to the calculator 42 from the setting device 5.
In order to obtain a signal with frequency fa from memory 1, one clock pulse of reference clock signal OL and the beginning of memory 1 must be
．． f how many addresses should be advanced.

Here, fo is the frequency of the reference clock signal CI, and N is the number of divisions of the basic waveform data stored in the memory (=
This is a circuit that calculates with a fraction of 1 below the decimal point based on .256).

The N and foO values are known in advance, so these values are stored in the constant and [2] operator 42. The iJ A'J signal obtained as a result is applied to the accumulator 4 to which the reference clock signal OL from the reference oscillator 4 is applied.
3 as data D, and each time each clock pulse constituting the reference clock signal OL is output,
A floating point addition operation is performed on the value A by the accumulator 43. In the cumulative operation, only the integer part is used as information indicating the output address of memory R71, and the address data D6 attached to 't1 is outputted. At L・S data 1) s (ri me 7 1) 41 to [''ko addition sai 1, me 1-ri 41 to -, +15 + 7) t
+l period ";1h jrchi D leaf 1 higdekkaku scale synthesis section 24 g') 川"I-""-ta p and l, te l.
” is read next. This readout head 1 f 1411γ-data 3) is converted into discrete analog data ΔV(τ 1.fl 41
, the controller AD converts the low-pass filter 45 into a continuous analog waveform of frequency fa. -i-βS le 1- is taken out. After the analog waveform signal S is amplified by an amplifier 46, it is applied to a speaker 47 and output as an audible sound.

FIG. 4 shows a detailed block diagram showing a specific example of the accumulator 43 shown in FIG. 2. Data D from the arithmetic unit 42 is sent to the adder 7 configured as a full adder.
1, and the output Dou+ of the latch circuit 76 applied to the other input is added. The addition output data Da from the adder 11 is input to another latch circuit 72, and the latch circuit 7 is inputted at the rising timing of the inverted signal OL of the reference clock signal OL from the reference oscillator 4.
It is latched to 2. The latch output Da of the latch circuit 72 is input to the latch circuit 73, and the clock signal OL
The data is latched by the latch circuit 73 at the rising edge of the signal, and the latch data is applied to the other input of the adder 71. As a result, the data D& is cumulatively calculated every time the clock signal OL rises, and the result of this cumulative calculation is latched in the latch circuit 76. The latch circuit 73 (r-r-1 integer part is configured to have an 8-bit capacity, and this 8-bit data is output as the address data D. Therefore, the contents of the address data D6 are as follows. 0-255
, and any address in the memory 41 can always be specified.

Next, the operation of the reference synthesis circuit 26 will be explained using a specific example. The frequency of the reference clock signal CL is 32.768H.
z and the desired signal frequency fa is 440 Hz, the calculation result calculated by the calculator 12 based on equation (1) is 276B. When this is expressed as a binary number, (11,0111
).

becomes. This value is accumulated by the accumulator 43, and the integer part indicates the address value, so the result is as follows.

Cumulative value Read address value 3.4375, (11,0111)s, 33.437
5X2 (110,1110), 6tt X3 (1
010,'0101), 10/7 X4 (1101
, 11DO), 15//X74 (1111110
,0110), 25A/7 X75 (1,1101
), 1 As can be seen from the table above, the accumulation operation itself is performed accurately and the data in the integer part is used as the read address, so the frequency of the signal S obtained through the low-pass filter 45 is extremely low. Accuracy (A 40
H2, and it is possible to realize a signal generator with an extremely high frequency range.

In addition, since fractions are also accumulated by floating point accumulation operations, there is no security that the operation result in the operation unit B must be an integer as in the past, and therefore the frequency of the basic clock is There is no need to worry about raising the price; it can be lower.

Further, since there is no problem even if the desired frequency value is an odd value, fine adjustment of the frequency f'i can be easily performed, and FM modulation etc. can be easily applied.

Therefore, this reference sound synthesis circuit 26 can output a reference sound with extremely high frequency accuracy at any frequency. Moreover, since the frequency of the reference clock signal OL may be low, the same signal as the reference clock signal given to the watch section 6 can be used.

According to the present invention, the signal generation circuit that generates the reference tone is configured to be able to accurately set the frequency of the output signal even if the frequency of the reference clock signal is low, as described above. A reference clock signal with a low standard can be used as a reference clock signal of a reference sound generation circuit,
Therefore, the base A clock signal generator can be shared by the metronome section and the watch section, and multiple functions can be provided while keeping manufacturing costs low.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the watch autometer and ronome according to the present invention, FIG. 2 is a detailed block diagram of the reference tone synthesis circuit shown in FIG. 1, and FIG. 3 is the memory shown in FIG. 2. FIG. 4 is a detailed block diagram of the accumulator 43 shown in FIG. 2. 1... Watch - metronome 2... Metronome section 6... Watch section 4... Reference oscillator 5... Redundancy device 6... Display unit 21... Tempo synthesis section 22... Time signature Synthesis unit 23...Metronome display unit 24...Scale synthesis unit 25...Reference sound generation unit 26...Reference sound synthesis circuit OL...Reference clock signal DI...Time data DI...Progress Time data'rs...Tamming signal and above Applicant Daini Seikosha Co., Ltd. Agent Patent attorney Tsutomu Mogami

Claims (1)

[Claims] a reference oscillator that outputs a reference clock signal; a setting section;
a first synthesis section that synthesizes a required tempo and time signature in response to the base clock signal and a setting signal from the setting section;
a metronome display unit that displays the output from the first synthesis unit; a base tone generation circuit that generates a desired reference tone in response to the base clock signal and the setting signal from the setting unit;
and a clock unit operated by the base clock signal,
The basic sound generation circuit stores a memory in which sampling data of the basic waveform of the reference sound is stored, and one clock of the reference clock signal required to obtain the reference sound of the frequency set by the setting section. an arithmetic means for calculating the cumulative value of a hit, a calculator for performing cumulative calculation of the cumulative value every clock of the base clock signal, and reading of the memory according to the data of the integer part of the output of the adder; a watch metronome, characterized in that it is equipped with a means for full addressing;