JPS6072317A - Lsi logical circuit - Google Patents

Abstract

PURPOSE:To inspect numerous signal lines through a small number of inspection terminals, by decoding a selected control signal from a decorder circuit and selecting one signal in accordance with the decoded output by means of a selector, and then, connecting the selected signal to a gate circuit. CONSTITUTION:When a prescribed input signal is impressed upon input terminals D1, D2-DN of a decoder circuit B, a signal decoded by the circuit B is introduced to a selector circuit A and the circuit A selects one inspection signal line corresponding to the decoded signal out of inspection signal lines S1, S2-SA and introduces the signal to a gate circuit C. In case where a logic signal is led from an inspection signal terminal T to one inspection signal line thus selected, the input terminal K of a changeover controlling signal is set to the input mode and, where the logic signal of an inspection signal line is outputted from the terminal T, the terminal K is set to the output mode. In this case, a small number of LSI terminals are sufficient even when the number of signals lines to be inspected is 2<n> and, moreover, it is not necessary to add any unnecessary floating capacities for performing the inspection.

Description

[Detailed description of the invention] The present invention relates to LSI logic circuits.

Conventionally, testing of logic L81 involves leading the signal line to be tested to the external terminal of the LSI and testing the logic signal from outside the LSI.
Test pads were installed on the wiring patterns inside the LSI chips for inspection by placing a needle on them with a prober or the like.

However, with this type of method, when the circuit scale becomes large, the LS
The number of test terminals becomes unrealistically large compared to the number of Φ terminals in a package equipped with I-, and because the needle is placed on the 7-stop pad used for signal lines, stray capacitance is unevenly added to signal lines and the original The disadvantage was that the signal could change.

The purpose is to provide an LSI ethical circuit that can be implemented without causing harm to 4□1o, □ii□yo, 6, engineering, and 8°Chen. 1 The noble Sl logic circuit of the present invention has a switching control signal K E
L? ra digit number, -6 digits, 1, selection control signal ``-1 degree degu circuit and this output selects one of the signal lines (11ffiMK) 11ffiMK
't6-kV/9-f□□62. Ya7 ``:ni':'E:I='l''A. 'A, 111fflJ
Kvvs1@4'i: #JfflL/1ra clear.
1: In the diagram, the signal line to be inspected is inspection signal 11!81゜82
, ~f9. A, and this test signal 4-wire s1. s2゜-B
A is connected to the input of a selector circuit A, a selection input of this selector circuit is connected to the output of a decoder circuit B, and input terminals DI, D2 . ~DN is taken out to the outside as the I and SI terminals, and from the gate circuit C connected to the output of the selector circuit, there is a test signal terminal T for inputting and outputting the transverse bone signal, and a logical signal input and output. Input terminal 1 of the switching f4 signal for mode switching is taken out to the outside as a terminal of the LSI.

If the required input 1 is applied to the input terminals DI and D2 to DN of the decoder circuit B, the decoder circuit B will lead the decoder signal to the selector circuit A, and the seven-stage circuit will be tested. Ig line 81°, S2. . . . 8, which corresponds to the decoder manual signal; select one and lead it to the gate circuit C. When guiding the inspection signal from the inspection signal terminal T to the selected inspection signal line in this way, set the switching control signal input terminal 6d to input mode and inspect the logic signal of the inspection signal line. When outputting from signal terminal T, input terminal K for Rarili+BI control signal
Set to output mode.

According to such an LSI logic circuit, even if the number of signal lines to be tested is 2", the number of LSI lines is n decoder input terminals, one test signal terminal, and one switching control signal input terminal. All you need is a book.Also, if you design the LSI circuit with the LSI logic circuit connected, unnecessary stray capacitance will not be added for testing.

As explained above, the present invention has a configuration in which the test signal lines can be arbitrarily selected by the selector circuit and the decoder circuit, and the input/output of the test signals can be switched by the gate circuit. This has the effect of allowing inspection to be performed at the terminal without adversely affecting the signal line to be inspected.

[Brief explanation of the drawing]

The figure is a circuit diagram showing an embodiment of the present invention. 81, s2, ~SA...Test signal line, DJ
9. ．． 1) 2 to DN... Input terminal for selection control signal, T... Inspection signal terminal, 1 (... Input terminal for switching control signal, A...・Selector circuit, B...Decoder circuit. C...Gate circuit.

Claims (1)

[Claims] It has a gate circuit that inputs and outputs a logic signal in accordance with a switching control signal, a decoder circuit that decodes a selection control signal, and a selector circuit that selects one of the signal lines based on the output of the gate circuit and connects it to the gate circuit. An LSI logic circuit characterized by ξ.