JPS6070838A - Bit error rate supervising system - Google Patents

Abstract

PURPOSE:To attain low power consumption by providing a changeover switch to select an output of plural intermediate repeaters in terms of time division, separating multiplexedly the obtained signal by a demultiplexer and detecting a bit error with respect to the separated signal. CONSTITUTION:An optical PCM signal inputted via transmission lines 11, 12 is transmitted in the repeates 13, 14 via photoelectric converters 15, 16, waveform shaping, electrooptic converters 17, 18 to a transmission line. Moreover, buffers 19, 20 branch and amplify a signal from the converters 15, 16 and input the result to a selector 21. The selector 21 changes over a branched output of each repeater at each prescribed time and inputs the result to a demultiplexer 22. The multiplexer 22 takes synchronism to the input signal and separates multiplexedly it and extracts a signal inserted to supervise the line, inputs it to a bit error rate supervising circuit 23 to obtain a bit error rate.

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to a method for monitoring the pit error rate of a digital transmission signal, and more particularly to a bit error rate monitoring method for performing such monitoring in an intermediate repeater. It is.

Prior Art and Problems When multiple transmission paths are provided between one terminal station and the other terminal station via a large number of relay stations, the pit error rate of the transmission signal has conventionally been monitored using the terminal station installed at the terminal station. Repeater (end middle)
This was done only at the relay station, and was not performed at the intermediate repeater (hollow) installed at the relay station.

FIG. 1 is a diagram showing the configuration of a transmission route when a large number of intermediate repeaters are provided. The figure illustrates a case in which long-distance optical PCM communication is performed between a terminal station (A) and a terminal station (B) using a transmission line made of optical fiber and an intermediate repeater,
'-++ '-2+..., 1-n is terminal station (A)
t- Optical PCM terminal repeater comprising 2-1+"-
1+°°..., 2-% is the light P that constitutes the terminal station (B)
CM method terminal station repeater h'-1-j r 5-1-2
r """ + 3-1-'n is the relay station (1) 'e is the intermediate repeater that constitutes, 3-poison-1, 6-frL-2,..."
", s-m-n is an intermediate repeater that makes up relay station (m). There are many relay stations (not shown) arranged between relay station (1) and relay station (Tsuru). , each relay station has n% intermediate repeaters, and each relay station (1)
The intermediate repeaters in ~(J) are all composed of an upper p-side repeater and a lower p-side repeater.

In the transmission route with the configuration shown in Figure 1, each intermediate repeater conventionally performs optical/electrical conversion (hereinafter referred to as "transmission conversion"), waveform shaping, and electrical/optical conversion (hereinafter referred to as "transmission conversion").
The bit error rate is monitored only at both end station repeaters (A) and CB).
This was done only in This is because the configuration of the monitoring circuit required to monitor the bit error rate at the repeater is complex and extensive, so providing such a monitoring circuit for each intermediate repeater requires high density. This is because not only is this undesirable in terms of reduction in energy consumption and power consumption, but it also imposes a significant economic burden.

Purpose of the Invention The present invention is intended to solve the problems of the prior art, and its purpose is to achieve high density.

Suitable for low power consumption and economically advantageous,
This paper provides a method for monitoring bit error rate in intermediate repeaters.

Structure of the Invention The bit error rate monitoring method of the present invention includes one demultiplexer and one bit error rate monitoring circuit for a plurality of intermediate repeaters, and a changeover switch to time-divisionally monitor each intermediate repeater. This monitors the bit error rate.

Embodiment of the Invention FIG. 2 shows the configuration of an embodiment of the bit error rate monitoring system of the present invention. The figure shows an example of a bit error rate monitoring method when n intermediate repeaters are installed in one relay station, and 11 and 12 are each made of optical fiber,
Downlink transmission lines, 13 and 14 are uplink and downlink repeaters, respectively, and repeaters 13 and 14 are O/E converters 1, respectively.
5.16, E converter 17゜18 and buffer 19
．． 20, all of which form one intermediate repeater. Other (%-1) intermediate repeaters not shown are also
It shall have a similar configuration. 21 is a selector to which the outputs of the % converters in each intermediate repeater are added via a buffer, and these outputs are sequentially switched and output. 22 is a demultiplexer (D-MUX), which demultiplexes the outputs of each intermediate repeater input via the selector 21. 23 is a bit error rate monitoring circuit.

In FIG. 2, for example, in repeaters 13 and 14 constituting one intermediate repeater, optical PCM signals input via transmission lines 11 and 12 are transmitted to Saki converters 15°1iSI, respectively.
The signal is converted into an electrical signal at C, and after waveform shaping, is converted into an optical signal again at the respective scoop converters 17 and 18, and sent out to the transmission line. Buffers 719 and 20 branch and amplify the electrical signals of converters 15 and 16, respectively, and input them to selector 21. In FIG. 2, (1) and (21 indicate the outputs of the buffers 19 and 20, respectively, and (s
1) The upper and lower branch outputs of each intermediate repeater are
Each is input to the selector 21. Selector 21
For example, the branch outputs of each repeater are switched at regular intervals and inputted to the demultiplexer 22. The demultiplexer 22 demultiplexes the input signal in synchronization with the input signal, extracts the signal inserted for line monitoring, and inputs it to the pit error rate monitoring circuit 23.

The pit error rate monitoring circuit 26 detects frame errors, parity errors, or code errors based on this signal, and calculates the bit error occurrence rate per unit time, that is, the bit error rate. Various configurations of pit error rate monitoring circuits are already known.

As described in detail, according to the pit error rate monitoring circuit of the present invention, a changeover switch is provided to select the outputs of a plurality of intermediate repeaters in a time-sharing manner, and the obtained signals are multiplexed and separated by a demultiplexer. Since bit errors are detected on the separated signals and 2-rate monitoring is performed on the pits, in a relay station with multiple intermediate repeaters, one demultiplexer and one pit By providing an error rate monitoring circuit, the bit error rates of a plurality of intermediate repeaters can be monitored, which is suitable for increasing density and reducing power consumption, and is also economically advantageous.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of a transmission route having an intermediate repeater, and FIG. 2 is a diagram showing the configuration of an embodiment of the bit error rate monitoring circuit of the present invention. 1-++'-2,..., 1-? L, 2-J+
2-2+..., 2-outside: terminal repeater, 3-1-
1, l-1-2+...+3-1-%,...
..., 5-ta-+, 34-2 +...
..., 5-m-n: intermediate repeater, 11: upper transmission line, 12: downlink transmission line, 16: uplink repeater, 14: lower p repeater, 15.16: optical/optical (o/ E) '11 converter, 17.18 two electrical/optical (Elo) converters, 19,
20: Buffer 1. 21: Selector, 22: Demultiplexer (D-MUX), 23: Bi, Toler rate monitoring circuit Patent applicant Fujitsu Limited Patent attorney Gobe Tamamushi (1 other person)

Claims (1)

[Claims] In a relay station that is equipped with a plurality of intermediate repeaters corresponding to a plurality of transmission paths and that relays and retransmits digital signals, a changeover switch that selects and outputs outputs of the plurality of intermediate repeaters in a time-sharing manner; A pit error rate monitoring system comprising: a demultiplexer that multiplexes and separates the output of the changeover switch; and a pit error rate monitoring circuit that detects pit errors in the output of the demultiplexer and monitors the pit error rate. .