JPS6069739A - Information processor - Google Patents

Information processor

Info

Publication number
JPS6069739A
JPS6069739A JP58177455A JP17745583A JPS6069739A JP S6069739 A JPS6069739 A JP S6069739A JP 58177455 A JP58177455 A JP 58177455A JP 17745583 A JP17745583 A JP 17745583A JP S6069739 A JPS6069739 A JP S6069739A
Authority
JP
Japan
Prior art keywords
program
load program
transferred
main storage
initial load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58177455A
Other languages
Japanese (ja)
Inventor
Yasuhiro Nagayama
永山 保裕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58177455A priority Critical patent/JPS6069739A/en
Publication of JPS6069739A publication Critical patent/JPS6069739A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To prevent storage contents from being destroyed owing to the transfer of a program by transferring data in an area of a main storage device to another memory temporarily before an initial load program to said area. CONSTITUTION:The information processor consists of a main storage device 1, a central processor which executes a program in the main storage device, a local memory 3 stored with the initial load program for transferring a load program to the main storage device 1, and an input/output controller 4 which receives a start indication from another device 5 and generates a trigger signal for starting. Once the start indication is received, the contents of the area stored with the initial load program are transferred to the local memory 3, the load program is transferred from the device 5 to the device 1 after the initial load program is executed, and the contents transferred to the local memory 3 are returned to the device 1 again to execute the load program.

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は情報処理装置に関する。[Detailed description of the invention] [Technical field to which the invention pertains] The present invention relates to an information processing device.

〔従来技術〕[Prior art]

従来の情報処理装置は、起動時等に、イニシャルロード
プログラムを主記憶装置内に格納し、このプログラムを
実行することによりダンププログラムまだはロードプロ
グラム等を他装置から主記憶装置内に格納している。し
かしながら、従来装置には、イニシャルロードプログラ
ムを主記憶装置内に格納したとき、以前に主記憶装置内
の対応する領域に存在していたデータが破壊されてしま
うという欠点がある。
Conventional information processing devices store an initial load program in the main memory at startup, etc., and by executing this program, dump programs, load programs, etc. from other devices are stored in the main memory. There is. However, the conventional device has a drawback in that when an initial load program is stored in the main memory, data that previously existed in the corresponding area in the main memory is destroyed.

〔発明の目的〕[Purpose of the invention]

本発明の目的は上述の欠点を除去しイニシャルロードプ
ログラムの転送による記憶内容の破壊全防げる情報処理
装置を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide an information processing apparatus that eliminates the above-mentioned drawbacks and completely prevents destruction of stored contents due to transfer of an initial load program.

〔発明の構成〕[Structure of the invention]

本発明の装置は、他装置からの起動指示に応答して起動
できる情報処理装置において、前記他装置からの起動指
示に応答して起動用トリガ信号を出力する入出力制御手
段と、情報を格納する主記憶手段と、該主記憶手段内の
情報に基づいて処理を実行する中央処理手段と、ダンプ
プログラムまたはロードプログラムのうちの少なくとも
一方を前記主記憶手段内に転送するだめのイニシャルロ
ードプログラムを格納したローカル記憶手段とを備え、
前記入出力制御手段からのトリガ信号に応答して前記主
記憶手段内の一部の領域の内容を前記ロー カル記憶手
段に転送したあと前記ローカル記憶手段内のイニシャル
ロードプログラムを前記主記憶手段内の前記一部の領域
に転送し、この転送されたイニシャルロードプログラム
の前記中央処理手段による実行後に、前記ローカル記憶
手段内に転送した前記一部の領域の内容を前記主記憶手
段に転送するよう転送制御を行なう。
The device of the present invention is an information processing device that can be activated in response to a startup instruction from another device, and includes an input/output control unit that outputs a startup trigger signal in response to a startup instruction from the other device, and an information processing device that stores information. a central processing means for executing processing based on information in the main memory; and an initial load program for transferring at least one of a dump program and a load program into the main memory. and a local storage means for storing the
In response to a trigger signal from the input/output control means, the contents of a part of the area in the main storage means are transferred to the local storage means, and then the initial load program in the local storage means is transferred to the main storage means. after the transferred initial load program is executed by the central processing means, the content of the partial area transferred to the local storage means is transferred to the main storage means. Performs transfer control.

〔発明の実施例〕[Embodiments of the invention]

第1図を参照すると、本発明の一実施例は、プログラム
およびデータが格納される主記憶装置lと、主記憶装置
1内のプロクラムを実行する中央処理装置2と、ダンプ
プログラムまたはロードプログラムを主記憶装置lに転
送するだめのイニシャルロードプログラムを格納したロ
ーカルメモリ3と、他装置5からの起動指示を受信し起
動用トリガ信号を発生する入出力制御装@4とから構成
きれる。
Referring to FIG. 1, one embodiment of the present invention includes a main storage device 1 in which programs and data are stored, a central processing unit 2 that executes programs in the main storage device 1, and a dump program or a load program. It consists of a local memory 3 that stores an initial load program to be transferred to the main storage device 1, and an input/output control device @4 that receives a startup instruction from another device 5 and generates a startup trigger signal.

第2図は主記憶装は1およびローカルメモリ3のプログ
ラム配置を示す図である。
FIG. 2 is a diagram showing the program arrangement of the main memory device 1 and the local memory 3. As shown in FIG.

次に第1図および第2図を参照して動作を説明する。他
装置5から信号m7を介して自装置の起動が入出力制御
装置4にかかると、入出力制御装置4は中央処理装置2
に信号線6を介して起動信号を送る。中央処理装置2は
装置1内の領域12に格納された内容をローカルメモリ
3内の領域10に転送する(第2図の矢印14)。この
あと、ローカルメモリ3に格納されているイニシャルロ
ードプログラム11′f:主記憶装置1の領域12に転
送する(同矢印15)。次に、転送されたこのイニシャ
ルロードプログラムが実行され、他装置5からダンププ
ログラムまたはロードプログラムが装置1の領域13に
転送される(同矢印16)。
Next, the operation will be explained with reference to FIGS. 1 and 2. When the input/output control device 4 is activated via the signal m7 from the other device 5, the input/output control device 4 is activated by the central processing unit 2.
A start signal is sent to the terminal via the signal line 6. The central processing unit 2 transfers the contents stored in the area 12 in the device 1 to the area 10 in the local memory 3 (arrow 14 in FIG. 2). Thereafter, the initial load program 11'f stored in the local memory 3 is transferred to the area 12 of the main storage device 1 (arrow 15). Next, this transferred initial load program is executed, and the dump program or load program is transferred from the other device 5 to the area 13 of the device 1 (arrow 16 in the same).

次に、ローカルメモリ3の領域10の内容を主記憶装置
1の領域12にもどす(同矢印17)。次に、領域13
に転送したダンププログラムまたはロードプログラムの
実行に移る。
Next, the contents of area 10 of local memory 3 are returned to area 12 of main storage device 1 (arrow 17). Next, area 13
Start executing the dump program or load program transferred to .

この様にして、プログラムの転送を行なうことにより、
あたかもイニシャルロードプログラムが主記憶装置1に
存在しなかったかのように見える。
By transferring the program in this way,
It appears as if the initial load program did not exist in the main storage device 1.

従って、ソフトウェアはハードウェアの固定記憶領域を
意識せずにプログラムを作ることができ、プログラムの
作成か容易になる。
Therefore, software programs can be created without being aware of the fixed storage area of the hardware, making it easier to create programs.

なお本実施例ではローカルメモリ3と主記憶装、@ 置1と間の転送制御全中央処理装置2により行っている
が、主記t【装置1とローカルメモリ3との両方rアク
セスできる他の!iil 僻手段により行なってもよい
In this embodiment, the transfer control between the local memory 3 and the main storage device @device 1 is performed by the entire central processing unit 2; ! iii This may be done by remote means.

〔発明の効果〕〔Effect of the invention〕

以上、本発明には、イニシャルロードプログラムの転送
による記憶内容の破壊の除去およびプログラム作成の容
易化ケ達成できるという効果がある。
As described above, the present invention has the advantage of eliminating destruction of stored contents due to transfer of an initial load program and facilitating program creation.

【図面の簡単な説明】 第1図は本発明の一実施例を示すブロック図および第2
図は主記憶装置およびローカルメモリの記憶内容配置を
示す図である。 図において、工・・・・・・主記憶装置、2・・・・・
・中央処理装置、3・・・・・・ローカルメモ1ハ 4
・・・・・・入出力制脚装置、訃・・・・・他装置、6
,7・・・・・・信号線、10〜13・・・・・・領域
[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG.
The figure is a diagram showing the storage content arrangement of the main storage device and local memory. In the figure, 2... main storage device, 2...
・Central processing unit, 3...Local memo 1c 4
...Input/output restraint device, other devices, 6
, 7... signal line, 10-13... area.

Claims (3)

【特許請求の範囲】[Claims] (1)他装置からの起動指示に応答して起動できる情報
処理装置において、前記他装置からの起動指示に応答し
て起動用トリガ信号を出力する入出力制御手段と、情報
を格納する主記憶手段と、該主記憶手段内の情報に基づ
いて処理を実行する中央処理手段と、ダンププログラム
またはロードプログラムのうちの少なくとも一方を前記
主記憶手段内に転送するだめのイニシャルロードプログ
ラムを格納したローカル記憶手段とを備え、前記入出力
制御手段からのトリガ信号に応答して前記主記憶手段内
の一部の領域の内容を前記ローカル記憶手段に転送した
あと前記ローカル記憶手段内のイニシャルロードプログ
ラムを前記主記憶装置内の前記一部の領域に転送し、こ
の転送されたイニシャルロードプログラムの前記中央処
理手段による実行後に、前記ローカル記憶手段内に転送
した前記一部の領域の内容を前記主記憶手段に転送する
よう転送制御を行なうことを特徴とする情報処f3J!
、装置。
(1) In an information processing device that can be started in response to a start-up instruction from another device, an input/output control means that outputs a start-up trigger signal in response to a start-up instruction from the other device, and a main memory that stores information. means, a central processing means for executing processing based on information in the main storage means, and a local processing means storing an initial load program for transferring at least one of a dump program or a load program into the main storage means. storage means, in response to a trigger signal from the input/output control means, the contents of a part of the area in the main storage means are transferred to the local storage means, and then the initial load program in the local storage means is loaded. After the transferred initial load program is executed by the central processing means, the content of the partial area transferred to the local storage means is transferred to the main memory. The information processing f3J! is characterized in that it performs transfer control so that the information is transferred to the means.
,Device.
(2)前記転送制御を、前記中央処理手段か実行するこ
とを特徴とする特許請求の範囲外(1)項記載の情報処
理装置。
(2) The information processing apparatus according to claim (1), wherein the transfer control is executed by the central processing means.
(3) 前記転送制御を、前記中央処理手段以外の制御
手段が実行すること全特徴とする特許請求の範囲第(1
)項記載の情報処理装置。
(3) Claim No. 1 characterized in that the transfer control is executed by a control means other than the central processing means.
) The information processing device described in section 2.
JP58177455A 1983-09-26 1983-09-26 Information processor Pending JPS6069739A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58177455A JPS6069739A (en) 1983-09-26 1983-09-26 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58177455A JPS6069739A (en) 1983-09-26 1983-09-26 Information processor

Publications (1)

Publication Number Publication Date
JPS6069739A true JPS6069739A (en) 1985-04-20

Family

ID=16031241

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58177455A Pending JPS6069739A (en) 1983-09-26 1983-09-26 Information processor

Country Status (1)

Country Link
JP (1) JPS6069739A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57130132A (en) * 1981-02-04 1982-08-12 Toshiba Corp Ipl controlling system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57130132A (en) * 1981-02-04 1982-08-12 Toshiba Corp Ipl controlling system

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