JPS6069736A - Multiplier - Google Patents

Abstract

PURPOSE:To speed up DELTA function operation while maintaining precision by outputting the multiplication result between signal-precision data and double precision data with double precision as the result of operation which is performed by a pipeline multiplier. CONSTITUTION:Data having signal precision and double precision are inputted to inputs 2-1 and 2-2 respectively. Exponent parts of the signal precision and double precision data are set in registers 103 and 104 at the 1st stage 2 of the multiplier. Mantissa parts are set in registers 116 and 117. The exponent parts are summed up by an adder 105 and set in a register 107 at the 2nd stage 3. The mantissa parts are multiplied by a multiplier 118 and set in a register 119. The contents are transferred to a register 108 as they are and the multiplication result of the mantissa parts are added by an adder 120 by using the shift contents of the output at the 3rd stage 4. A bit correction control circuit 126 makes bit corrections at the 4th stage 5 when necessary and the contents of the registers 108, 113, and 121 are outputted by an output control circuit 125.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention is directed to the 70-1 Teinogu Dictionary Circuit, Floor 9, Special V Co.
(2) Concerning a pibre/urinary device that performs vector operations at high speed using EEE4 semi-floating/Gdata 7omants.

[Background of the invention] Noorty 7g data allows you to move from A to C, and in function operations, etc., the digit is +! 2! Multiplication with double precision is essential to prevent r-chir.

The processing procedure for solving 5IN is as shown below.

(1) Separate into X=-F1-1.

2 (-1<F<1.l: positional number) (4) 5IN(-・F)τice.

(2) If V 〉 2/π is given by anonymity data and 〉 π/2, then from (2/π・X)
f take out 1 and the decimal capital Fr this figure is born, +iL
is not the floor. In order to prevent this digit / 8 ra C, 2 /
If the rice is converted and then double-sharpened, then note II will be removed due to the acid treatment.

[Purpose of the invention]

The purpose of Fuyumei is to understand the difference between single precision and double 4n degree bit interpretation.
) 4 times (rate 4f1 degrees) x (fir), and provide the output child Pygraia multiplier by sparing its power.

[Summary of the invention]

The uninvented point A is a pipeline/multiplier which performs a real multiplier operation and has the ability τ to output the multiplication result of single-precision data and double-precision data as double-precision data.

[Example of human power for invention]

Figure 1 shows single-precision and double-precision data in the yCI E E E image semi-floating format. In this format, the data to be saved is S as the code part and E B HE as the code part.
Let D be the number group, Fg, )'D e as the mantissa part, a
-BB AAA degree: (-1J-・2 ・(1,Fa) BD-1
0 1t ¥ 4 anonymity: (-1)"・2 ・(1, FD). However, k3s and BD are the bias of n single precision and double official's d effect 11ti, respectively. 'th 2 shows the configuration of the pipeline multiplier. In detail, l is the microprogram controller that controls the pipeline terminal, 2rl is the first stage of the high ply/terminus, and 3 is pi 12 raised to the 5th power. Km 3rd stage, bk yo pipe 2i/rider 4th stage, x-i~l -4y; -1 is the pipe line / future ig pressure signal, 2-2 is the right input of the big wire rice booster 1i1+js
23 is Paigun Inn rice A machine output 1B.

Figure 3 shows the detailed combination of the bigline door device.

In FIG. 1 and 2, 101 and 102 are exponent input control circuits;
103, 104 rt: Input ti e di ((l: latch register, 105 is for the heka active part k), 107 is the increase for the power Ill father-in-law 106 [latching register, 108 is the circular table τ of the register lυ7, and the register that latches the casing, 1cJ9r, and the i exponent part is output as it is. Manned Kai+ KE Q Rfb
E, OR circuit, Ill is E A register that latches the output τ of OR circuit 1111, a register that launches with the round table f't of l l 2rtl l l, 113 is 112
Registers that latch as is, 114, 115
is mantissa manual control tgl14. 116, 117 is manual mantissa t2 inch'''j'2 register, 118v'i, hill side board number part and stone side board ridge part is calculated by Song Dynasty, 119 is multiplication of mantissa part. Register to latch $t for 7'CS, 120r
i1191c Lunched county branch t Garo nose blade calculator, 121 is 120 addition n result total 2 registers, 1
22 is a zonota that shifts the 32 focus hill of the sword q arithmetic milling rice latched to 121, 123 is @0''/selector that selects all outputs of the lid 122, and work 24 is a register 121c.
t) A selector that selects whether to output Iil force as is, or to output 1 shift with 1 focus shift, 12
5 is an output 'iti control circuit, 126 is a focus correction system 11141 circuit that selects whether or not bit correction is necessary;
127 is the bias correction value, 2-4°2-5 is the input number 16 from 2-1.2-2 to the exponential part manual frost 1jf4 circuit 101,
101 Kotsute and 9 were issued for the index department human power No. 16, 2-(
i, 2-7 are taken out from the input information 2-1 and 2-2 by the artificial human power control circuits 114 and 115 A7' (mantissa input signal, 2-8 is the code output, 2- 9 is the result of exponent part calculation, and 2-10 is the result of mantissa part calculation.

The procedure for executing (single precision data) X (double precision data) will be described below.

First, single-precision data is transferred to the press input 2-1 of the first stage 2, and upper 32 pinpoints of double-precision data are transferred to the right input 2-2. At this time, the microprogram controller #
) The input control 1R No. 1-1 is output to the ml stage 2, and the input control circuit 101.102 outputs the left input control 2.
-11 The exponent part 2-4.2-5 of the right human power 2-2 is output. FIG. 4 shows the configuration of the exponent part input control circuit 10112). In the figure, 1-il and 1-12 are the left human power luu groan signals included in the input control signal l-1, and when the left input data is single-precision data, 1-ii is °l'', double-precision data For Royal 32 pinto, 1-12 is '1'', exponent part 2-4 of press-in force data for single precision and double precision respectively.
is output. 102 also has the same configuration as lOl, and the exponent part 2-5 of the right input data is outputted by the right input 1fflJ1 immediate signal included in the input control signal 1-1. In this case, press input 2-1 is single precision data, right input 2-2 is double s
Since this is the upper 32 bits of data, : is set in the register 103 as the exponent part of the single-precision data, and in the register 104, the exponent part of the data in double precision is set. Mantissa input control circuit 1
14.115 outputs the mantissa parts 2-6, 2-7 of the multi-located input 2-1 and the right input 2-2. FIG. 5 shows the configuration of the mantissa input control circuit 114. In figure 2, 1-11.1
-12.1-13 is the left input control signal based on the input control signal 1-1, and when the press force data is single precision data, 1
When -11 is “1” and the upper 32 bits of the double tank metadata,
When 1-12 is 1″ and the lower 32 double-precision data is in focus,
The mantissa part 2-6 of the left input data is output when 1-13 is "1" and the upper 32 bits of single precision and double precision are respectively t. 115 has the same configuration as 114, and the mantissa part 2-7 of the right human power data is outputted according to the right human power control signal included in the input control signal 1-1. In this case, the mantissa part 2-6
The mantissa part of the left input single-precision data is output from the 0th to 7th bits, l# is output from the 0th and 8th pins, the mantissa part of the left input single precision data is output from the 9th to 31st bits, and the mantissa part from 2-700th to lOth bits is output from the 0.11th bit. “1
1', 12th to 31st bits, right input double-precision data upper''
The mantissa part included in 32 pinto is output and stored in register 11.
6,117 cents. 8th bit of 2-6 and 2-
The reason for outputting 1 at the 11th focus of 7 is to set the hidden focus due to the data format.

The data set in registers 116 and 117 are also shown in Figure 6.

In the figure, 6-10 FS is the mantissa part of the left input single-precision data, and 6-2 FDυ is the top 3 I sound consistency data of the right input.
The reciprocal part data is enriched with 2 bits.

The sign part τEO of the left and right input data is processed by FORIIO, and the result is set in the register 111.

In the next man/cycle, the remaining double-precision data lower 32 pintos are transferred to the right input signal line 2-2 of the l-th stage 2. At this time, the input control controller 1g 1-16 is outputted from the microprogram controller 1 to the first stage 2. When 1-16 is “12”, the mantissa input control circuit 1
17, the data on the right input signal line 2-2 is sent to the register 117 as is. The data τvJG sent to the register 117 is shown in 6-3 of the figure. Registers other than 117 in the l-th stage 2 are not updated. In the second stage, in the first machine cycle registers 1.03, 10
4 cents and add the 7c exponent part and the result and Bayanu 1 rin Bs gold? ) Calculate Jc. In this case (single precision) x
Since the calculation is performed with (l precision), the exponent part is ')-no (gs-gD-in 1-Bl12''+-
It is necessary to calculate s″×2' = 2. To output in double precision,
It is necessary to subtract the bias value Bs from the result of adding the exponent part. The result of subtracting the bias value is set in the register 107. The contents of the register 112 are sent to the register 112 as they are.

Multiplier 118 registers 1 in the first machine cycle.
16,117 is multiplied by the sent data and the partial product is sent to the t register 119.

In the next machine cycle, the multiplier 11 of the second stage 3
8, the mantissa part 6-1 of the single-precision data sent to the register 116 in the first machine cycle is multiplied by the lower 32 bits 6-3 of the double-precision data set in the register 117 in the 24th machine cycle. and the partial product is stored in register 11
9 cents. In the third stage, register 107
The contents of the register 108 and the contents of the register 112 are sent to the register 113 as they are. The part obtained by multiplying the mantissa part 6-1 of the AAA wave data sent to the register 119 in the second machine cycle by the lower 32 bits of the double precision data, ta, is added by the adder 120, and the result is set in the t register 121. Fru.

In the next machine cycle, the contents sent to register 119 in the 34i-th machine cycle and the contents sent to register 121
Of the data sent to dt, the pressure is shifted by 32 steps using the dt function 122, and the power n is calculated using the 5th step 120, and the result is sent to all registers 121. The shape of the sword aX at that time is shown in Figure 7V. 2 in the figure, 8-1.8-2
is a bit configuration diagram of the mantissa multiplied by the true value placed in the register 121, 8-1 shows the case where a carry is rarely carried from the most significant focus, and 8-2 shows the case where there is no carry.

In the next 777 cycles, the t-bit correction control circuit 126 first selects whether or not focus correction is necessary, and registers 108, 113, and 126 select whether or not focus correction is necessary.
The output control circuit 125 outputs the contents. FIG. 8 shows the configuration of the output control g1 circuit 125. In the figure 2,
1-41. 1-42, 1-43 are signals included in the signal 1-4 output to the microprogram controller lJ:pi4 stage 5, and 1-41 is a signal included in the signal 1-4 output when outputting the single-precision multiplication result. "1" and 1-42 are "l#" when outputting the multiplication result of (single precision summer x (can color) in double precision, and 1-43 outputs the double precision multiplication result. If bit correction is not required, the multiplication result output signal line 2-300th bit of the register 1130 is set to the 0th to 10th bits fi:2- of the register 108.
3, and the 12th to 63rd bits of the 2nd to 53rd pins τ2-3 of the 12th register.

If bit correction is required, the contents of register 113 2-3
At the 00th focus, the contents of the register 108 are added to the adder 109.
The result is shifted to the 12th to 63rd bits of 2-3 by shifting the result by 1 bit to the right using the shifter 124. As described above, the multiplication result of (single precision) x (double precision) is outputted to the multiplication result output signal line 2-3 in the form of one note and a fourth.

〔Effect of the invention〕

According to the invention, it is possible to perform multiplication of (single precision) x (double precision) and output in double precision, so fc
You can speed up functional operations.

[Brief explanation of drawings]

Figure 1 is an IEEE standard floating data format diagram, Figure 2 is a schematic diagram of a pipeline multiplier, Figure 3 is a detailed diagram of a pipe life multiplier, and Figure 4 is a diagram of the 2 in Figure 3.
Fig. 5 is a block diagram of 114 in Fig. 3,
FIG. 6 is an explanatory diagram of the data cents 116 and 117 in FIG. 3, FIG. 7 is a diagram of the focus configuration during multiplication of the mantissa part, and FIG. 8 is a diagram of the configuration of 125 in 2 in Figure g3. 101...Exponent part input control circuit, 114...Mantissa part ΔContinued from Day 1, Page 1 0 Inventor Hideyuki Hara Hitachi University, Mika-cho 5-chome or 2-1, Hitachi, Ltd. fruit

Claims (1)

[Claims] Engineering, single A/n degree, double tank fake ■jt 2 in the circuit that goes on,
Single tree position, 1f scale designation (yoshi, inn fji capital and mantissa selection circuit, circuit to operate the exponent part, circuit to multiply the mantissa part, na number mantissa multiplication rice) According to the circuit for correcting the exponent, whether to output the single end calculation function in single/r*sum or to output the result of inertia multiplication in double precision;
(Single precision) A circuit that outputs all data depending on whether it is output with X (double precision) or not, (+, f! Anti-XX (
This multiplier is made up of a t21 path that uses double-precision data to calculate 7 multipliers using double-precision data.