JPS6066865A - Manufacture of thin film transistor - Google Patents

Manufacture of thin film transistor

Info

Publication number
JPS6066865A
JPS6066865A JP58176716A JP17671683A JPS6066865A JP S6066865 A JPS6066865 A JP S6066865A JP 58176716 A JP58176716 A JP 58176716A JP 17671683 A JP17671683 A JP 17671683A JP S6066865 A JPS6066865 A JP S6066865A
Authority
JP
Japan
Prior art keywords
substrate
transparent substrate
transistor
thin film
glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58176716A
Other languages
Japanese (ja)
Other versions
JPH0452628B2 (en
Inventor
Akira Muraki
村木 明良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toppan Inc
Original Assignee
Toppan Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toppan Printing Co Ltd filed Critical Toppan Printing Co Ltd
Priority to JP58176716A priority Critical patent/JPS6066865A/en
Publication of JPS6066865A publication Critical patent/JPS6066865A/en
Publication of JPH0452628B2 publication Critical patent/JPH0452628B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Liquid Crystal (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To prevent the damage of the surface of a substrate and to block the diffusion of alkaline components from the substrate by a method wherein an organic polymer layer by plasma polymerization is formed on the substrate, when the thin film transistor is formed on the transparent substrate of glass or quartz. CONSTITUTION:An organic polymer film 8 of hydrocarbon series is formed on the transparent substrate 1 made of glass or quartz by the reduced pressure glow discharge of a hydrocarbon gas of methane, ethane, acetylene, ethylene or benzene. Next, a gate electrode 2 is provided at the center of this surface and then covered with a gate insulation layer 6, and an amorphous Si layer 5 is provided thereon into said transistor. Such a manner allows no decrease in the transparency due to the damage of the substrate 1 during the manufacturing process of the transistor because the chemical properties of the film 8 are extremely stable, and facilitates the manufacture because of durability to a temperature of approx. 400 deg.C.

Description

【発明の詳細な説明】 牛1に/リコン系の拐刺を川(・で、ガラスある(・は
イー1英基叛の上に71、ク膜トランジスタの半導体装
置を製,1(、する力を去に関する。
[Detailed Description of the Invention] On the cow 1/recon system, there is a glass (71) on the Ei 1 British rebellion, the power to make a semiconductor device of the film transistor, 1(, Regarding leaving.

近ント、液晶を利用してマトリクス表示を行なう&小1
人11′tの開発が各方面で活発に行なわれて〜・る。
Nearby, matrix display using liquid crystal & 1st grade
Human 11't development is being actively carried out in various fields.

・1、′1に陰極線17(ブラウン管)に変えて液晶に
よる7ij)l ’l,’,!テレビを実現する場合、
1l!ll1象の駆動を制御するものとして薄膜トラン
ジスタ( i’h i n 、F i l mTran
sisier :以下単K ’l” F i”と(・う
)が重要視されている。TPTをガラスある〜・は石英
等の透明基板上に形成する場合、当然ながら、−Sに施
されたアモルファスシリコン層や窒化硅素膜を所望部分
だけ残し、不必要な部分をエツチング剤去する工程があ
るのであるが、この際、下地の透明基板もエツチング剤
に侵されると(・5問題がある。
・1, '1 instead of cathode ray 17 (cathode ray tube), liquid crystal 7ij)l 'l,',! When realizing television,
1l! Thin film transistors (i'h in, F i l mTran
sisier: Hereinafter, the simple K 'l'' F i'' and (・U) are emphasized. When forming TPT on a transparent substrate such as glass or quartz, there is a process of leaving only the desired portions of the amorphous silicon layer or silicon nitride film applied to -S and removing unnecessary portions with an etching agent. However, in this case, if the underlying transparent substrate is also attacked by the etching agent, there is a problem (5).

図面の第1図および第2図(al〜(Clに基−・て、
以下説明すると、ガラスある(・は石英からなる透明基
板(1)は、液晶表示装置の駆動用電極のための基板で
もある。液晶表示装置が反射型にせよ透過型にせよ、透
明基板(1)の透明性は、厳しく保持ずべきものである
。第1図にお(・で、ゲー) Wf 4令t21、ソー
ス電極(:3)、ドレイン電極(4)は金属層をパター
ン化したものであり、一方、シリコン系の+A別で形状
される半導体層(5)とゲート絶縁層(に)は、それぞ
れアモルファスシリコン(a−Si) と窒化硅素( 
Si3N4 )からなる。ゲート絶縁層((i)は透明
であるか、その屈折率が20程度であり、透明基板(1
)の屈V〒率15とがなり差があるため、ゲート絶縁石
〆i(にlと透明基板(1)とが接する部分でがなり光
透過率が落ちる。よって第」図に示すよう((、ゲート
絶縁層(に)は、i” l=” ’J”が存在する部分
とその近傍の1イlI成内にその・余聞をとどめ、液晶
駆動の画素部には窒化硅素のゲート絶縁層(6)を存在
さぜな(・ようエツチング除去する。しかしながら、ゲ
ート絶縁層(6)の窒化硅素とガラスの透明基板(1)
とはそのfヒ学的性γfが近似−するため窒化硅素のみ
を選択的にエツチングすることが極めて困唾である。
Figures 1 and 2 of the drawings (al~(based on Cl-,
To explain the following, the transparent substrate (1) made of glass (* is quartz) is also the substrate for the driving electrodes of the liquid crystal display device.Whether the liquid crystal display device is a reflective type or a transmissive type, the transparent substrate (1) ) should be strictly maintained. In Figure 1, the source electrode (:3) and drain electrode (4) are patterned metal layers. On the other hand, the semiconductor layer (5) and the gate insulating layer (2), which are shaped by silicon-based +A, are made of amorphous silicon (a-Si) and silicon nitride (
Si3N4). The gate insulating layer ((i) is transparent or has a refractive index of about 20, and the transparent substrate (1
Since there is a difference in the refractive index V of the gate insulating stone (i) and the transparent substrate (1), the light transmittance decreases at the part where the gate insulating stone (i) and the transparent substrate (1) are in contact.Therefore, as shown in Fig. (The gate insulating layer is limited to the portion where i''l='''J'' exists and its remaining portion within 1 IlI layer in the vicinity, and the gate insulating layer is made of silicon nitride in the pixel area for liquid crystal drive. The insulating layer (6) is removed by etching. However, the silicon nitride and glass transparent substrate (1) of the gate insulating layer (6)
Since the chemical properties .gamma.f of .gamma.f are similar to that of .gamma.f, it is extremely difficult to selectively etch only silicon nitride.

この事情を、第2図(al〜(C1に基(・て説明する
と、低コストのガラス板を透明基板に用(・る場合、透
+14 、I、j、板(Ill二に保r−MM(71ト
L−c=e化ケ’f a (SiO2)、酸化−ノ′ル
ミニウム(A、J203)、窒化硅素等の薄膜を施して
から’J’ Ii’ Tを形成することがあるが、この
[1,h合にお(・ても、ゲート絶縁層(6)と保護膜
(7)を選別し一〇エツチングすることは困り・(1で
ある。すなゎt)、第2図(1)l Kおいで、保護J
i!!(71の上にゲート電(1むり(2)、窒化硅素
膜t6iおよびアモルファスシリコン層(5)を図のよ
うに積層し、第2 図(cl K 示j 、t: 5 
K、アモルファスシリコン層(51と窒化硅素膜((5
1を部分的にエツチングし、所望形状の栄、!4体層(
,5)とゲート絶縁層(6)を得る。しかし、この時保
護層(7)もその表面が侵されて、表面にくもりを生じ
透明性が著しく阻害される。この現象は、保護層+71
が無(・場合には、透明基板(1)の表面にて同様に起
こり、光透過率が低下して液晶表示装置の電極板として
甚だ不都合なものとなる。
This situation can be explained based on Figure 2 (al~(C1). If a low-cost glass plate is used as a transparent substrate, transparent +14, I, j, plate (Ill2) and r- 'J'Ii' T may be formed after applying a thin film of MM (71 tL-c=e oxidation) f a (SiO2), oxidized aluminum (A, J203), silicon nitride, etc. However, in this case [1, h], it is difficult to select and etch the gate insulating layer (6) and the protective film (7). Figure 2 (1) l K come, protect J
i! ! (A gate electrode (1 layer (2), a silicon nitride film t6i, and an amorphous silicon layer (5) are stacked on top of 71 as shown in the figure.
K, amorphous silicon layer (51) and silicon nitride film ((5
1 is partially etched to form the desired shape! 4 body layers (
, 5) and a gate insulating layer (6) are obtained. However, at this time, the surface of the protective layer (7) is also attacked, causing cloudiness on the surface and significantly inhibiting transparency. This phenomenon is caused by the protective layer +71
If there is no such phenomenon, the same occurs on the surface of the transparent substrate (1), and the light transmittance decreases, making it extremely inconvenient as an electrode plate for a liquid crystal display device.

実際的には、ゲート絶縁層(6)をエツチングする速度
を落として、透明基板(1)と窒[ヒ硅素膜((51の
干渉色を見ながらエツチングを行なり・、ガラスへのダ
メージを最小限にするようにして(・るが、エツチング
の進行の不均一もあって、光透過率を低下させる損傷は
避けられな(・。
In practice, the speed of etching the gate insulating layer (6) is slowed down and etching is performed while observing the interference color of the transparent substrate (1) and the nitride/arsenic film (51) to avoid damage to the glass. However, due to the unevenness of the etching process, damage that reduces light transmittance is unavoidable.

本発明は上記のような欠点の生じな(胃の膜トランジス
タの製造方法であって、具体的には、ガラスもしくは石
英の透明基板上に、プラズマ重合法による炭化水素系も
しくはフッ化炭素系の有機ポリマー層を形成し、しかる
のチ;切膜トランジスタを形成することで、透明基板の
表面が損傷するのをII)月1ニしたことを特徴とする
The present invention is a method for manufacturing a gastric membrane transistor that does not suffer from the above-mentioned drawbacks. Specifically, the present invention is a method for manufacturing a gastric membrane transistor, in which a hydrocarbon-based or fluorocarbon-based film is formed on a transparent substrate of glass or quartz by plasma polymerization. II) The method is characterized in that by forming an organic polymer layer and then forming a film-cut transistor, the surface of the transparent substrate is prevented from being damaged.

本発明の実施態様を示す図面の第3図ta+〜(clに
基(・て以下祝明すると、透明基板(1)の上面にまず
プラズマ11【合法による炭化水素系の有(幾ポリマー
膜(8)を形成する。該有機ポリマー膜(8)は、メタ
ン(CI+4)、エタン(CJIe)、アセチレン(C
2■lz)、エチレン(C21+4)、ベンゼン(Co
l’la)等の炭化水素ガスの減圧グロー放電によって
容易に得られる。例えば、十′fj平板型のプラズマ化
学的気相蒸着装置を用いて、反応炉内を2 X 10 
”Torr以下に排気し、次いで、メタンガス等の炭化
水素系ガスを、ガスコントIJ−ラーを用いて適性圧力
で反応炉に導入し、I4明基板(1)のtlll、14
度200〜400°Cに保ち、グロー放jiLを開始す
る。放電時の圧ブハ電bIC密度は、そλlそれ0.0
1− L OTorr 、 O,Ol −10WAMl
程1リ−であり、可祝尤透過率80%以上の有機ポリマ
ー119(8)が容易に得られる。屈折率も、ガラスの
屈1月−4.< 1.4〜15程度に充分近づけること
ができる。
Based on FIGS. 3 to 3 of the drawings showing embodiments of the present invention, a plasma 11 [legal hydrocarbon-based polymer film] is first applied to the upper surface of a transparent substrate (1). 8).The organic polymer film (8) consists of methane (CI+4), ethane (CJIe), acetylene (C
2■lz), ethylene (C21+4), benzene (Co
It can be easily obtained by low pressure glow discharge of hydrocarbon gas such as 1'la). For example, using a 10'fj flat plate type plasma chemical vapor deposition apparatus, the interior of the reactor is 2 x 10
"Torr or less, then hydrocarbon gas such as methane gas is introduced into the reactor at an appropriate pressure using a gas controller, and
Maintain the temperature at 200-400°C and start glow emission. The piezoelectric bIC density during discharge is λl and 0.0
1-LOTorr, O,Ol -10WAMl
The organic polymer 119 (8) with an expected transmittance of 80% or more can be easily obtained. The refractive index of glass is also -4. It can be brought sufficiently close to <1.4 to 15.

同様にフン化炭素系のガスを川(・れば、フッ化炭素系
ポリマー膜が得られることは言うまでもな(・。このよ
うにして有機ポリマー膜(8)を施された面に対しで、
ゲート電極(2)、ゲート絶縁層(6)およびアモルフ
ァスシリコンの半導体層(51を積層し、以下従来例と
同様に所望部分のみを残しでその他をエツチング除去す
る。第3図(CIK示ずように、プラズマ重合法により
作成された有機ポリマー膜(8)は、全く侵されない。
It goes without saying that a fluorocarbon polymer film can be obtained by injecting a fluorocarbon gas in the same way.
A gate electrode (2), a gate insulating layer (6), and an amorphous silicon semiconductor layer (51) are stacked, and then, as in the conventional example, only the desired portion is left and the rest is removed by etching. Furthermore, the organic polymer film (8) created by plasma polymerization is not attacked at all.

これは、有機ポリマー膜(8)がフッ化水素(HF)、
硝酸、その他の酸、アルカリに対して極め℃高(・削性
があ−るためであり、侵食によるくもり現象(光透過率
の低下)が見られな(・ものである。
This is because the organic polymer film (8) contains hydrogen fluoride (HF),
This is due to its machinability, which is extremely high in temperature compared to nitric acid, other acids, and alkalis, and no clouding phenomenon (reduction in light transmittance) due to erosion is observed.

本発明の潮1換トランジスタの製へ方、去は、以上のよ
うなものであり、本発明によれば、プラズマ重合による
有機ポリマー膜が、化学的性質が極めて安定であること
を利用し、薄膜トランジスタの製造途中にお(・て透明
基板が損傷してその透明性が低下するのを防ぐものであ
る。そればかりでなく、プラズマ重合法による有機ポリ
マー1jンは、400℃程度の高温に耐える等の性質が
あるから、液晶表示駆動用電極板の製造工程K i6い
てしばしば行なわれる加熱処理に1111Iえられると
(・う々f都合さかある。伺言すれば有機ポリマー層は
、ガラスMの透明基板からアルカリ成分が不純物とじて
拡11りしてくるのを防ぐものでもある。
The process for manufacturing the single-channel transistor of the present invention is as described above.According to the present invention, by utilizing the fact that the organic polymer film produced by plasma polymerization has extremely stable chemical properties, This prevents the transparent substrate from being damaged and reducing its transparency during the manufacturing of thin film transistors.In addition, organic polymers produced by plasma polymerization can withstand high temperatures of around 400°C. Because of the properties such as 1111I, it is said that 1111I is applied to the heat treatment that is often carried out in the manufacturing process of electrode plates for driving liquid crystal displays. It also prevents alkaline components from spreading out as impurities from the transparent substrate.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は薄膜トランジスタの一例を示す要部断面図、第
2図(a+〜(clは従来の薄11!3g )ランジス
クの製造法の欠点を示す説明図、第3図(al〜(C1
は本発明の薄膜トランジスタの製へ方法の一実施例を示
1説明図である。 (1)・・・透明基板 (2)・・・ゲート電極f:(
+・・・ソース電極 (4)・・・ドレイン電祢(5)
・・・半導体層 (6)・・・ゲート絶縁層(7)・・
保護114X +81・・・有機ポリマー膜I時許出願
人 凸版印刷株式会社 代表者 鈴 木 相 夫
Fig. 1 is a cross-sectional view of the main parts showing an example of a thin film transistor, Fig. 2 is an explanatory diagram showing the drawbacks of the manufacturing method of a conventional thin film transistor (a+~(cl is 11~3g), and Fig. 3 is an explanatory diagram showing the drawbacks of the manufacturing method of a conventional thin film transistor.
FIG. 1 is an explanatory diagram showing an embodiment of the method for manufacturing a thin film transistor of the present invention. (1)...Transparent substrate (2)...Gate electrode f: (
+...Source electrode (4)...Drain electrode (5)
...Semiconductor layer (6)...Gate insulating layer (7)...
Protection 114

Claims (1)

【特許請求の範囲】[Claims] (1)ガラスもしくは石英の透明基板上にWI嘆トラン
ジスタを形成する際、前記のガラスもしくは石りgo)
ユジタ明ノ、(板上にプラズマ重合による有、殴ポリマ
ー層を形成し、しかるのら薄膜トランジスタを形成する
ことを特徴とする簿膜トランジスタの製造方法。
(1) When forming a WI transistor on a transparent substrate of glass or quartz, use the glass or stone as described above.
Akino Yujita, (A method for manufacturing a thin film transistor, characterized by forming a polymer layer on a plate by plasma polymerization, and then forming a thin film transistor.
JP58176716A 1983-09-24 1983-09-24 Manufacture of thin film transistor Granted JPS6066865A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58176716A JPS6066865A (en) 1983-09-24 1983-09-24 Manufacture of thin film transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58176716A JPS6066865A (en) 1983-09-24 1983-09-24 Manufacture of thin film transistor

Publications (2)

Publication Number Publication Date
JPS6066865A true JPS6066865A (en) 1985-04-17
JPH0452628B2 JPH0452628B2 (en) 1992-08-24

Family

ID=16018511

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58176716A Granted JPS6066865A (en) 1983-09-24 1983-09-24 Manufacture of thin film transistor

Country Status (1)

Country Link
JP (1) JPS6066865A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60224277A (en) * 1984-04-20 1985-11-08 Sanyo Electric Co Ltd Thin film transistor
US6242758B1 (en) 1994-12-27 2001-06-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device employing resinous material, method of fabricating the same and electrooptical device
US7399668B2 (en) 2004-09-30 2008-07-15 3M Innovative Properties Company Method for making electronic devices having a dielectric layer surface treatment
US8012782B2 (en) 1995-03-18 2011-09-06 Semiconductor Energy Laboratory Co., Ltd. Method for producing display device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60224277A (en) * 1984-04-20 1985-11-08 Sanyo Electric Co Ltd Thin film transistor
US6242758B1 (en) 1994-12-27 2001-06-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device employing resinous material, method of fabricating the same and electrooptical device
US6429053B1 (en) 1994-12-27 2002-08-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device method of fabricating same, and, electrooptical device
CN1333296C (en) * 1994-12-27 2007-08-22 株式会社半导体能源研究所 Semiconductor device
CN1333297C (en) * 1994-12-27 2007-08-22 株式会社半导体能源研究所 Semiconductor device
US8012782B2 (en) 1995-03-18 2011-09-06 Semiconductor Energy Laboratory Co., Ltd. Method for producing display device
US7399668B2 (en) 2004-09-30 2008-07-15 3M Innovative Properties Company Method for making electronic devices having a dielectric layer surface treatment

Also Published As

Publication number Publication date
JPH0452628B2 (en) 1992-08-24

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