JPS6062276A - Full-color printer control circuit - Google Patents

Abstract

PURPOSE:To obtain color data corresponding to a color code speedily and shorten a printing time by reading the color data out of a storage means storing the color data alterably while assuming the color code as an address. CONSTITUTION:The color code from a main video memory is inputted to a printer control circuit 4 and outputted to a full color printer in the form of color data as primary color gradation data. This control circuit 4 is provided with an RAM49 for color code-color data conversion. The color data corresponding to the color code is stored in this RAM49 to be alterable by a control register 43, picture element data resolving circuit 45, incrementer 47, etc. When the color data is read out of the RAM49, the color code is divided within one word according to the bit length by a DMA controller 41 and other circuits, the color code is used as an address, and the color data is applied to the full-color printer speedily.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a full-color printer ILT control circuit for converting image data stored in the form of color codes into color data and outputting the converted data to a full-color printer. In particular, this invention relates to a full-color printer control circuit that converts color codes into color data in real time.

[Background of the invention]

FIG. 1 schematically shows a configuration for transferring image data stored in a memory to a full-color printer via a printer control circuit.

According to this, the printer control circuit 4 normally receives image data stored in the main memory 2 via the server 3 in response to a command from the processor 1, and also transfers the image data to the full-color printer 5 via the printer control signal line 6. It is designed to transfer image data to. By the way, the image data finally given to the full color printer is based on Japanese Patent Application Laid-open No. 56-1.
As shown in Japanese Patent No. 11980, colors that directly represent each gradation of the three primary colors such as cyan, magenta, and yellow
However, if the image data stored in the main memory is also stored in such a form, the image data has more redundancy as the number of types of display colors decreases. If a full-color printer is capable of displaying 4-bit gradations for each of cyan, magenta, and yellow, and can display 40,964 colors, it can only display 16 colors at most. In some cases, 4 bits is sufficient for image data, and even 12 bits are not used. That is, 8
This means that it contains a bit of redundancy.

In the color graphic display device disclosed in Japanese Patent Publication No. 4, 1977-138643, the image data stored in the encoded state in the frame buffer has color gradations of cyan, magenta, and yellow). Color data is not directly displayed, but is stored in the form of a color code. Image data? '!
- Power - Memorizing the code in the form of a code does not cause redundancy problems, but the color code must be converted into color data and then sent to the full-color printer, and the conversion process takes time. It will be required.

[Purpose of the invention]

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a full-color printer control circuit that can quickly convert and output image data in the form of a color code without redundancy into power-2 data.

[Summary of the invention]

For this purpose, the present invention reads out color data corresponding to a color code from a storage means in which color data is stored in a changeable manner. That is, if the color code is used as an address and color data corresponding to the color code is stored in advance at that address, the color code can be quickly converted into color data.

[Embodiments of the invention]

The present invention will be explained below with reference to FIGS. 2 and 5.

First, the color code according to the present invention will be explained. Second
The figure shows a memory map of the main memory with 16 bits per word. In this example, the color code from address 201 to seat address 210 is: 11. ii i
Indicates the case where m data is stored. 1 - ka, 1 = r4
Since it is said to be 16 bits, if the number of display colors is small, it is possible to specify two or more color codes in one word, and it is still not possible to actually store it in memory. 4. It is said that it is advantageous for use. For example 4
096.If it is necessary to display a single color, please
The color code corresponding to each pixel must be composed of 12 bits, and when displaying 256 types of 16 unique colors, it must be composed of 8 bits and 4 bits, respectively. Therefore, in the case of 16 bits per word, if the color code is generally made up of 9 bits or more, one color code will be stored in one space, but if the color code is made up of 8 bits, In this case, two color codes can be stored, and in the case of four bits, four color codes can be stored. In this example, it is assumed that the color code is 12 bits, 8 bits, and 4 bits, respectively, and the manner in which the color code is stored in each case is as shown in FIG. That is, if the number is more than 12 bits, the color code is stored in the lower 12 bits 203 of one word, and the upper 4 bits 202 are not used. In addition, in the case of 8 bits, two consecutive bits in the upper 8 bit part 204 and the lower 8 bit part 205 are
The color code for one pixel is stored, and in the case of four bits, the four consecutive pixels are stored in the four bit portions 206 to 209.
The color code for each pixel is stored.

°The image data stored in the main memory as a color code is displayed according to the present invention (full color).
The printer 1llJ control circuit reads out the data, converts it into color data, and sends it to the full-color printer.However, the way color codes are successively output to the pull-color printer is done word-by-word rather than color-code by high-speed transfer or processor. This can be said to be desirable from the perspective of reducing the burden on people. This point is also taken into consideration in the pull color printer control circuit according to the present invention. FIG. 3 shows the configuration of an example of a full color printer control circuit according to the present invention.

According to this, the full color printer control circuit is equipped with a RAM 49 for color code-color data conversion, and when the color code is used as an address and the color data corresponding to the color code is stored in the RAM 49 in advance, By giving the read color code as an address, color data corresponding to the color code is quickly read out from the RAM 49.

f) Storing the color code in the LAM 49 In order to store the color code, the processor first uses the multipath 3, the internal bus 31. The incrementer 47 is reset via the control register 43. control register 4 by decoding the multipath controller 44uI10 address.
When a control signal as a command addressed to 3 is detected, a latch signal 443 is generated to control the command.

- is latched into the register 43.

When a reset command for the incrementer 47 is latched in the control register 43, the incrementer 47 is reset by the reset signal 437 that is the latch output. Note that the multipath 3 and multibus controller 43 will not be explained in detail, but they are described in "Intel MULT
IBUS Interface” (Intel Japan (a)
) Published by ) & Please refer to.

After resetting the incrementer 47, the processor releases the reset signal 437, then causes the control register 43 to latch the write instruction to the RAM 49, and then
A transfer start address and the number of transfer words are set in a control register inside the MA controller 41, and a transfer start command is given to the DMA controller 41. The color data stored in an appropriate area on the shift-in memory is sequentially read word by word under the control of the DMA transfer i1f and then written to the RAM 49. The color data on the main memory directly indicates the valley gradations of the three primary colors cyan, magenta, and yellow, and consists of 12 bits in total, with 4 bits allocated to each of cyan, magenta, and yellow, for example. Therefore, although it is theoretically possible to display 4096 colors, it is only necessary to store only necessary color data in the main memory in the order of predetermined addresses. For details on the DMA controller 41, see Chapter 4 "8089I10 Processor" in the "Intel 1APX86 Family User's Manual".
Please refer to the time.

Now, if I explain the DMA transfer of Kashi data,
I) When MA transfer is started, the DMA controller 41 first reads the color data corresponding to the transfer start address from the main memory, and the color data is output 425 to the data register 42 by the latch signal 412 from the DMA controller 41. The latched color data is output to the RAM 49 as stock data. On the other hand, when the control circuit 46 receives the latch completion signal 416 from the DMA controller 41,
Since the read/write signal 469 to the RAM 49 is set to write mode, the color data from the data register 42 will be written to the I%AM 49. In this case, the address where color data is written is rO
It is J. 1” from control register 43
(The AM mode signal 438 is set to the write mode based on the 1-in instruction described above, and the output 478 of the incrementer 47
Since the output 478 of the incrementer 47 is given to the selector 48 for selective output, the output 478 of the incrementer 47 is sent to the RAM as the write access address 489 via the selector 48.
49.

When the writing of color data is completed, the DMA controller 4
1, an acknowledge signal 461 to that effect is output, and the incrementer 47 receives
467 words of Ding and Seop are output for each of the 1 nos and 100 pieces of V so. As a result, the DI)MA controller 41 updates the transfer start address by +1 and repeats the above control operation until the number of transferred words is reached, so that the color data on the main memory is changed to R, AM4.
9 in the predetermined address order.

The storage of color data in the 1% AM 49 is as described above, but the subsequent output of the color data from the RAM 49 according to the color code will be explained below.

When reading color data from the RIM 49, first, the processor latches into the control register 43 that the transfer of the color code as image data is to be started. This is given to the full color printer as an initial setting command signal 54, and is also given to the DMA controller 41.
will also be notified to that effect. Next, the processor cancels the initial setting command signal 54 and latches the bit configuration of the color code and the read instruction from the RAM 49 into the control register 43.

In this example, the color code is 4 bits, 8 bits, or 12 bits, so which one is given as the pit configuration signal 435 to the pixel data decomposition circuit 45 and the control circuit 46, and also in response to the read instruction. Originally, the RAM mode signal 438 is placed in read mode. I (AM mode signal 438J-t given to control circuit 46 and selector 48, selector 4B
is the access address 489 (!:
It is designed to be output to the LTE RAM 49.

After that, the processor sets the start address of the color code in the main memory and the number of words to be transferred in the internal register of the DMA controller 41, and then instructs the DMA controller 41 to start DMA transfer, so that the color code is sent first. Similarly to the case of the color data, the data are sequentially read out from the main memory in the order of predetermined addresses.

That is, first, the color code corresponding to the first address is read out from the main memory, but this is read out from the data register 42.
f: It is provided to the pixel data decomposition circuit 45 via the pixel data decomposition circuit 45. Under the control of the control circuit 46, the pixel data decomposition circuit 45 sequentially selects and outputs color codes as units based on the bit configuration signal 435 and the color code count signal 465 from the control circuit 46. As already mentioned, in this example, the color code read word by word may include only one color code as a unit, or two color codes, 4111
! In some cases, color codes are included, but the color codes as units are selectively outputted as output 459 in a predetermined order. In this way, the color code as a unit to be selectively outputted in the 71st Fi order is stored in the RAM 4 via the selector 48.
9 as an access address 489 for reading.

As a result, the color data 53 corresponding to the color code as a unit is read out from the RAM 49. When the reading of the color data 53 from the RAM 49 is confirmed, the control circuit 46 sends a color data confirmation signal 52 to the full color printer. It is supposed to be done. In response to this, if there is an acknowledge signal 51 indicating that the color data has been received from the full color printer, the control circuit 46 outputs a power 2 - code count signal 465.
is updated to a predetermined value based on the pit configuration signal 435, and then the color code to be selected and output is updated to the access address 4.
89 and is applied to the RAM 49.

In this way, when the control circuit 46 finishes transferring all color codes to the full-color printer as units in one word, an acknowledge signal 461 is sent to the DMA controller 41, and this causes! IJ) The MA controller 41 updates the start address and reads the next word-by-word power 2-code to be read. The DMA controller O-241 reads the read address every time it receives an acknowledge signal 461 from the control circuit 46 until the number of successive outputs from the main memory reaches the number of transferred words, and then sets the color code for each word in the main memory.
e is issued.

Figure 4 shows a concrete example of the two-system data decomposition circuit 11.4.
This shows the results. According to this, the color code from the main memory is latched into the 16-bit data register 42, but if the color code as a unit is more than 4 bits, the 4-bit color code in the register section 421 is first output as the output 459. After this, the 4-bit color code in the register portions 422 to 424 is output. Also, 8
In the case of bits, the 8-bit color code in register portions 421 and 422 is first output simultaneously as output 459, and then the 8-bit color code in register portions 423 and 424 is output simultaneously. There is. Furthermore, in the case of 12 bits, a total of 16 bits of power 2-
The code is simultaneously output as output 459. However, 4 bits in the register portion 424 are unnecessary or invalid in this example. Selectors 451 to 457 have input/output units of 4 bits.
The selection output control for the selectors 451 to 453 is controlled by a 3-bit color code count signal 465, and that for the selectors 454 to 457 is controlled by a 2-bit bit configuration signal 435.

Among these, the color code count signal 465 is set to 1 when the color code is 4 bits, 8 bits, and 12 bits.
w yo p'' up to ``4'', ul'' yo shi'' up to ``2'', ''1#
The value is obtained and added by 1-# by an adder 458, and then given to the selectors 451 to 453. Furthermore, the bit configuration signal 435 is 01# when the color code is 4 bits, 8 bits, and 12 bits.
.

The values of u2m and *3w are fixed.

The function of the pixel data decomposition circuit 45 is clear from the previous explanation, and no further explanation is necessary.

Finally, control signals will be explained. FIG. 5 shows the pit configuration of the control register in which control signals from the processor are latched. The control signals to be latched include the bit configuration signal 435, reset signal 437, RA, M mode signal 438, and initial setting command signal 54. this house,
Initial setting command signal 54 full color printer for the first time]
It is not just a setting for the status, but also a step-by-step designation of the image accumulation per line of printer output.

In addition, in the above explanation, 1%A is used for color data storage.
M is used, but if the color to be displayed is constant, r(, OM may be used.

〔Effect of the invention〕

As explained above, according to the present invention, color data corresponding to the color code can be quickly obtained by reading out the color data using the color code as an address from the storage means in which the color data is stored as being changeable. effective.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a configuration for transferring image data stored in a memory to a full-color printer via a printer control circuit, and FIG. 2 is a diagram showing how a color code according to the present invention is stored in one word of the main memory. FIG. 3 is a diagram showing the configuration of an example of a full-color printer control circuit according to the present invention, and FIG. 4 is a diagram showing a specific configuration of an example of a pixel data decomposition circuit in that configuration. , Figure 5 is
FIG. 3 is a diagram for explaining control signals given to a full-color printer control circuit according to the present invention. 42... Data register, 43... Control register, 45... Pixel data decomposition circuit, 47... Incrementer, 48... Selector, 49... R, A
M (for color code-color data conversion). Agent: Patent Attorney Masami Akimoto

Claims (1)

[Scope of Claims] 1. A full-color printer control circuit that converts and outputs a color code as image data read from an external memory in units of +i words to a full-color printer in the form of color data as primary color gradation data. A storage means is provided in which the color data corresponding to the color code is stored in a changeable manner using the color code as an address, and the color data corresponding to the color code is stored as a changeable color data from the external memory. A full-color printer control circuit characterized by a configuration designed for output. 2. When outputting color data one after another, each color code from the external memory is divided into one word by the bit length division means according to the bit length of the code, and then given to the storage means in a predetermined order as a unit color code. A full-color printer control circuit according to claim 1.