JPS6061675U - Sequential circuit tester - Google Patents
Sequential circuit testerInfo
- Publication number
- JPS6061675U JPS6061675U JP15409483U JP15409483U JPS6061675U JP S6061675 U JPS6061675 U JP S6061675U JP 15409483 U JP15409483 U JP 15409483U JP 15409483 U JP15409483 U JP 15409483U JP S6061675 U JPS6061675 U JP S6061675U
- Authority
- JP
- Japan
- Prior art keywords
- pulses
- terminals
- check
- input
- check terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来のデジタル回路のチェック装置の回路図、
第2図は本考案の順序回路テスターの回路図の構成を示
すブロック図をそれぞれ示す。
11−1から11−N:チェック端子、13−1から1
3−N:立下り検知器、14−1から14−N:立上り
検知器、17:計数器、18−1から18−N:論理積
/復号/駆動器、19−1から19−Nニアセグメント
表示器。Figure 1 is a circuit diagram of a conventional digital circuit checking device.
FIG. 2 shows block diagrams showing the circuit configuration of the sequential circuit tester of the present invention. 11-1 to 11-N: Check terminal, 13-1 to 1
3-N: falling detector, 14-1 to 14-N: rising detector, 17: counter, 18-1 to 18-N: AND/decoder/driver, 19-1 to 19-N near Segment indicator.
Claims (1)
入力する複数個のチェック端子と、該チェック端子と対
応して同数設けられ、各チェック端子の入力信号に対応
したパルスを発生する検知器と、該検知器のパルスを入
力しパルス数をカウントしパルス数の総和を保持する計
数器と、上記チェック端子と対応して同数設けられ、該
チェック端子に対応する検知器のパルスが入力された時
のみ対応する回路へ上記計数器の保持するカウント値を
出力する駆動回路と、該駆動回路と対応して同数設けら
れ、該駆動回路の出力する上記計数・ 器のカウント
値を数値表示する表示器とを具備して複数個のチェック
端子から入力されるデジタル回路の各端子の信号の順序
をチェック端子に対応する表示器に数値表示することを
特徴とする順序回路テスター。A plurality of check terminals that input signal changes at each terminal of a digital circuit equipped with a large number of terminals, and detectors provided in the same number corresponding to the check terminals and generating pulses corresponding to the input signals of each check terminal. and counters that input the pulses of the detector, count the number of pulses, and hold the total number of pulses, and the same number of counters are provided corresponding to the check terminals, and the pulses of the detector corresponding to the check terminals are input. a drive circuit that outputs the count value held by the counter to the corresponding circuit only when the drive circuit is in use; What is claimed is: 1. A sequential circuit tester comprising: a display, and displays numerically the order of signals at each terminal of a digital circuit input from a plurality of check terminals on a display corresponding to the check terminals.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15409483U JPS6061675U (en) | 1983-10-04 | 1983-10-04 | Sequential circuit tester |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15409483U JPS6061675U (en) | 1983-10-04 | 1983-10-04 | Sequential circuit tester |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6061675U true JPS6061675U (en) | 1985-04-30 |
Family
ID=30340729
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15409483U Pending JPS6061675U (en) | 1983-10-04 | 1983-10-04 | Sequential circuit tester |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6061675U (en) |
-
1983
- 1983-10-04 JP JP15409483U patent/JPS6061675U/en active Pending
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