JPS6060034U - Differential circuit - Google Patents

Differential circuit

Info

Publication number
JPS6060034U
JPS6060034U JP15035883U JP15035883U JPS6060034U JP S6060034 U JPS6060034 U JP S6060034U JP 15035883 U JP15035883 U JP 15035883U JP 15035883 U JP15035883 U JP 15035883U JP S6060034 U JPS6060034 U JP S6060034U
Authority
JP
Japan
Prior art keywords
pulse signal
differential circuit
differential
pulse
period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15035883U
Other languages
Japanese (ja)
Inventor
良行 東
阿部 雄平
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP15035883U priority Critical patent/JPS6060034U/en
Publication of JPS6060034U publication Critical patent/JPS6060034U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来技術を示すブロック図、第2図は本考案に
よる実施例のブロック図である。 1・・・・・・IC,2・・・・・・基準信号出力アン
プ、3・・・・・・比較信号出力アンプ、4・・・・・
・基準信号出力端子、5・・・・・・比較信号出力端子
、6,7・・・・・・外部抵抗、8−・・・・・コンデ
ンサ、9・・・・・・チェック端子、11.12・・・
・・・内部抵抗、13・・・・・・線間容量。
FIG. 1 is a block diagram showing the prior art, and FIG. 2 is a block diagram of an embodiment according to the present invention. 1...IC, 2...Reference signal output amplifier, 3...Comparison signal output amplifier, 4...
・Reference signal output terminal, 5... Comparison signal output terminal, 6, 7... External resistor, 8-... Capacitor, 9... Check terminal, 11 .12...
...Internal resistance, 13...Line capacitance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ある周期を持つ第1のパルス信号と該第1のパルス信号
のn倍あるいは1 / n倍(nは正の整数)の周期を
持つ単=あるいは複数のパルス信号を内部回路に有し、
かつ、該パルス信号群の各伝送パターン間に介在する線
間容量により、任嫌のパルス信号の微分波形を、他の任
意のパルス信号に重畳させることを特徴とする微分回路
A first pulse signal having a certain period and one or more pulse signals having a period n times or 1/n times (n is a positive integer) the first pulse signal in an internal circuit,
A differential circuit characterized in that the differential waveform of any pulse signal is superimposed on any other pulse signal by means of line capacitance interposed between each transmission pattern of the pulse signal group.
JP15035883U 1983-09-30 1983-09-30 Differential circuit Pending JPS6060034U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15035883U JPS6060034U (en) 1983-09-30 1983-09-30 Differential circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15035883U JPS6060034U (en) 1983-09-30 1983-09-30 Differential circuit

Publications (1)

Publication Number Publication Date
JPS6060034U true JPS6060034U (en) 1985-04-26

Family

ID=30333508

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15035883U Pending JPS6060034U (en) 1983-09-30 1983-09-30 Differential circuit

Country Status (1)

Country Link
JP (1) JPS6060034U (en)

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