JPS6059739A - Dry cleaning method - Google Patents

Dry cleaning method

Info

Publication number
JPS6059739A
JPS6059739A JP16859283A JP16859283A JPS6059739A JP S6059739 A JPS6059739 A JP S6059739A JP 16859283 A JP16859283 A JP 16859283A JP 16859283 A JP16859283 A JP 16859283A JP S6059739 A JPS6059739 A JP S6059739A
Authority
JP
Japan
Prior art keywords
plasma
film
dry cleaning
mixture gas
film forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16859283A
Other languages
Japanese (ja)
Other versions
JPH0452612B2 (en
Inventor
Kanetake Takasaki
高崎 金剛
Kenji Koyama
小山 堅二
Atsuhiro Tsukune
敦弘 筑根
Mikio Takagi
幹夫 高木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16859283A priority Critical patent/JPS6059739A/en
Publication of JPS6059739A publication Critical patent/JPS6059739A/en
Publication of JPH0452612B2 publication Critical patent/JPH0452612B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To remove a film which contains silicon covered on the interior of a film forming device at a high etching speed by generating a plasma with mixture gas which contains carbon tetrafluoride and sulfur hexafluoride in the device. CONSTITUTION:A plasma is generated with mixture gas which contains carbon tetrafluoride, sulfur hexafluoride and oxygen in a film forming device, and the film which contains silicon covered on the interior of the device is removed by etching. For example, flow rate ratio of the mixture gas is, for example, set to CF4:SF6:O2=40:40:20, the pressure in a sputtering device is set to approx. 1torr., and high frequency power is applied between a substrate electrode 11 and a cleaning electrode 13 to generate the plasma.

Description

【発明の詳細な説明】 (a) 発明の技術分野 不発明は皮膜形成装置のドライエツチング方決の改善に
関する。
DETAILED DESCRIPTION OF THE INVENTION (a) TECHNICAL FIELD OF THE INVENTION The invention relates to improvements in dry etching methods for film forming apparatus.

(b) 技術の背景 ・ 半導体装置等の製造工程において、基板上に例えば多結
晶シリコン(St)、二酸化シリコン(StOt)、窒
化シリコン(St s N4’ )或いは燐珪酸ガラス
(PSG)7!どの薄膜全形成することが多く行なわれ
ている。これらの薄膜は化学気相成長方法(以下CVD
法と略称する)によって形成されることが多いが、スパ
ッタリング法なども行なわれている0 半導体集積回路装置の集積規模の増大に伴なってその信
頼性の同上がますます必要となり、前記の薄膜形成工程
についても薄膜特性の向上、欠陥の低減などがいよいよ
重要となっている。
(b) Background of the technology - In the manufacturing process of semiconductor devices, for example, polycrystalline silicon (St), silicon dioxide (StOt), silicon nitride (St s N4'), or phosphosilicate glass (PSG) 7! In many cases, the entire thin film is formed. These thin films are produced using chemical vapor deposition method (hereinafter referred to as CVD).
However, sputtering methods are also used.As the scale of integration of semiconductor integrated circuit devices increases, it becomes increasingly necessary to improve the reliability of semiconductor integrated circuit devices. Improving thin film properties and reducing defects are becoming increasingly important in the formation process.

(Cン 従来技術と問題点 CVD法及びスパッタリング法等による薄膜形成は周知
の如く封止された装置内で行なわれて、薄膜形成物質は
目的とする基板上のみならず基板を支持する電極及び装
置173壁など製造装置内の各部分に広く被着する。こ
の装置内の各部分に被着した膜は、例えは剥離して落下
するなどの汚染源となるために、これを頻繁に除去しな
ければならない。
(C) Prior art and problems Thin film formation by the CVD method, sputtering method, etc. is performed in a sealed device as is well known, and the thin film forming material is applied not only to the target substrate but also to the electrodes supporting the substrate. The film adheres widely to various parts of the manufacturing equipment, such as the walls of the equipment 173. Films that adhere to various parts of the equipment become a source of contamination, such as when they peel off and fall, so they must be removed frequently. There must be.

この様な装置内部に被着した膜を除去するためにその装
置を分解して清掃することは煩雑であって、その装置1
FF3に内壁等に達するプラズマを形成してドライエツ
チングを行なうドライクリーニング法が好んで行なわれ
ている。
It is troublesome to disassemble and clean such a device in order to remove the film deposited inside the device, and the device 1
A dry cleaning method is preferred in which dry etching is performed by forming plasma in the FF 3 that reaches the inner wall and the like.

第1図はプラズマCVD装[妊のドライクリーニングの
例を示す模式図である。図において、1は基板電極、2
は上用1′砒極、3はクリーニング用電極、4はテーヤ
ンバー壁、5はガス冑5人管、6は排気管を示す0不装
置による薄欣形成は基板電極1を通常は接地して上部電
極2との間に高周波電力を印加し、原料ガス全プラズマ
化することによって行なわれている。この際に先に述べ
た如く、基板電極lを(7Iじめチャンバー壁4の内面
1で薄膜形M、Q勿質が被ンBする。
FIG. 1 is a schematic diagram showing an example of dry cleaning using a plasma CVD apparatus. In the figure, 1 is a substrate electrode, 2
1' is the upper electrode, 3 is the cleaning electrode, 4 is the yambar wall, 5 is the gas pipe, and 6 is the exhaust pipe. 0 When forming a thin cap with a non-equipment, the substrate electrode 1 is usually grounded. This is done by applying high frequency power between the upper electrode 2 and turning the raw material gas into plasma. At this time, as mentioned above, the substrate electrode 1 (7I) is covered with a thin film type M and Q on the inner surface 1 of the chamber wall 4.

この被シM物質が先に述べたシリコン系である場合に、
従来のドライクリーニングにおいては、エッチャントと
して例えば四弗化炭素(CF4):酸素(0□)=ao
:zo6度の混合ガス或いは六弗化硫黄(SR):e累
(02)−80:20程度の混合ガスが用いられている
。すなわちこれらのエッチャントガスをガスd′f入1
5よりチャンバー壁3に導入3との間に例えはo、a[
W/i)程度の茜周波電力を印加することによってプラ
ズマを形成し−Cs 製許円に夜着している膜をエツチ
ング除去する。このエツチングにおいてクリーニング用
rL’tL 3 i4、プラズマを広く装置内に拡げて
チャンバー内壁部等をエツチングする効果を有する。
When this material to be subjected to M is the silicon-based material mentioned above,
In conventional dry cleaning, the etchant is carbon tetrafluoride (CF4):oxygen (0□) = ao
: A mixed gas of 6 degrees Celsius or a mixed gas of about sulfur hexafluoride (SR):e (02)-80:20 is used. That is, these etchant gases are added to gas d′f1
5 into the chamber wall 3. For example, o, a[
By applying madder frequency power of about W/i), plasma is formed and the film adhering to the -Cs forming circle is etched away. In this etching, the cleaning rL'tL 3 i4 has the effect of spreading the plasma widely within the apparatus and etching the inner wall of the chamber, etc.

しかしながら前記従来例のエッチャントガスを用いる場
合において、エツチング速度が低くこのドライエツチン
グ工程に長時間を要するという問題がある。
However, when using the conventional etchant gas, there is a problem that the etching rate is low and the dry etching process takes a long time.

すなわち例えば被M膜が5i3N、であるとき、前記の
C1”、+02の例においては電4へ部及びチャンバー
内壁部(σ何れも1100(n/m1n)程度のエッチ
の ング速度であり、またS Fa ” Cキllにおいて
は1づ〒離率が低くプラズマの広が9がCF4”02よ
ジ少ない之めに、電極部においては600Cnm/mi
n〕程度の速度でらるがチャンバー内壁Mliは100
 [: nm/m1n)程度の速度に止まっている。
That is, for example, when the coating M film is 5i3N, in the above example of C1'', +02, the etching rate is about 1100 (n/m1n) for the electrode 4 and the chamber inner wall (σ), and In the case of S Fa "C kill, the separation rate is low and the plasma spread9 is less than that of CF4"02, so the electrode part has 600 Cnm/mi.
n], but the chamber inner wall Mli is 100
[: nm/m1n)].

プラズマCVD装置、低圧CVD装は及びスパッタリン
グ装置等のドライクリーニングは先に述べた如く半導体
装置の信頼性の確保向上のためにますますその必要性が
高まってお9、これを従来より短時間で効果的に実施す
る方法が要求されてスパッタリング等の方法による皮膜
形成装置内部に被層したシリコノを含む皮膜を、高いエ
ツチング速度で除去するドライクリーニング方法を提供
3〜ること金目的とする0 <6) 発明の構成 ′不発明の前記目的は、皮膜形成装置内において四弗化
民糸と六弗化硫黄と成木と全貧む混合ガスを用いてプラ
ズマ勿生成して、i濱装匝内部に被着したシリコン葡貧
む皮膜をエツチング除去するドライクリーニング方法に
より達成きれる0(f)発明の実施例 以下+:発明全災鹿例により具体的に成四する0+、発
明全通用する皮)哀形成装置は、例えば先に第1図に示
した如きプラズマCVD装置、或いは第2図に俣式図を
示すスパックリング装置などそのBLhu形成方式に特
に制約はないが、クリーニングに際してプラズマを形成
する手段を備えていることは当然に必要である。
As mentioned earlier, the need for dry cleaning of plasma CVD equipment, low pressure CVD equipment, sputtering equipment, etc. is increasing to ensure and improve the reliability of semiconductor devices. In response to the demand for a method that can be carried out effectively, it is the object of the present invention to provide a dry cleaning method that removes at a high etching rate a film containing silicone coated inside a film forming apparatus using a method such as sputtering. 6) Structure of the Invention The object of the invention is to generate a plasma in a film forming apparatus using a mixed gas of tetrafluoride fiber, sulfur hexafluoride, mature wood, and a completely depleted gas. 0 (f) Embodiments of the invention that can be achieved by a dry cleaning method that etches and removes the silicone film adhered to the inside. ) The BLhu forming apparatus is, for example, a plasma CVD apparatus as shown in FIG. 1, or a spackling apparatus as shown in FIG. Of course, it is necessary to have the means to do so.

第2図に示すスパッタリング装置において、11は基板
電極、12はターゲット、13はクリー二遮蔽板であっ
て、遮蔽板19はクリーニングの除にターゲラトラ保護
するためにその前面に置かれる0 不発明においてはクリーニングのためのエッチャントガ
スとしてCF、とSFaと02 との混合ガスを用い、
その流量比はCF4及びSF、はそれぞれ20乃至60
〔裂〕程度、02を20%程度とする0−2股にCF’
4の流量比を増加するときはプラズマがよく広がシ、S
Faの流量比を増加するときは電極間にプラズマが集ま
る傾向が必り、TJL極の配置と被着している膜の厚さ
の分布等の要因によってCF4とSFaとの流量比の最
適値を選択する。なおO6は既に刈られている如く、不
揮発性のポリマーの形成を阻止する効果音響する0 不発す」による前記、混合ガスの流量比を例えばCF4
 :SFa : 02 ”’40 : 40 : 20
として装置内の圧力を例えば1[torr〕ip*tと
し、基板電極1又は11とクリ−・ニング電柩3又は1
3との114」に例2(は0.3(W7crd E程度
の凸周波電力ゲ印加してプラズマ全生成すitは、例え
り゛祖2−している皮膜かS i s N4で必るとき
に電極部とチャンバー内徹都の伺れにおいても、s 0
0 Cn m/mi n) 程度のエノテンク′速度勿
待ることができる0すなわち先に述べたSFe”02を
用いる従来例において電極部においてのみ得られたエツ
チング速度に近い高込度のエツチングを装置内部の全面
について実り11.することができる02F、発り」に
よる附記混合ガスは、蟹化シリコン(Sis凡ンの他に
多結晶シリコン(Sl)、二敞化シリコン(Si02)
、−酸化シリコン(SIO)r叡化窒化シリコン(Si
xOyNz)及びfI tRyjシス等のシリコン系被
肘膜についても同様の効果が得られ、50咬だ皮膜形成
袋ぼのm成及び′1庇悔配置等についても先に例示し几
宿造に限らず、同ν】)の構造の装置に対して本発明を
適用することができる。
In the sputtering apparatus shown in FIG. 2, 11 is a substrate electrode, 12 is a target, and 13 is a cleaning shielding plate, and the shielding plate 19 is placed in front of the substrate to protect the target rattle in addition to cleaning. uses a mixed gas of CF, SFa, and 02 as the etchant gas for cleaning,
The flow rate ratio of CF4 and SF is 20 to 60, respectively.
[Cleft] degree, CF' in 0-2 crotch with 02 being about 20%
When increasing the flow rate ratio of 4, the plasma spreads well and S
When increasing the flow rate ratio of Fa, there is a tendency for plasma to gather between the electrodes, and the optimal value of the flow rate ratio between CF4 and SFa depends on factors such as the arrangement of the TJL pole and the thickness distribution of the deposited film. Select. As already mentioned, O6 has an acoustic effect that prevents the formation of non-volatile polymers.
:SFa: 02”'40: 40: 20
For example, the pressure inside the device is set to 1 [torr] ip*t, and the substrate electrode 1 or 11 and the cleaning electric coffin 3 or 1 are connected to each other.
It is necessary to apply a convex frequency power of about 0.3 (W7crd E) to the 114'' of Example 2 to generate the entire plasma. Sometimes, even when there is a gap between the electrode part and the inside of the chamber, s 0
0 Cn m/min) The device can achieve a high etching speed close to the etching speed obtained only in the electrode section in the conventional example using SFe'02 mentioned above. 11. 02F, which can be produced on the entire internal surface, the mixed gas includes polycrystalline silicon (Sl), silicon dipropylene (Si02) in addition to silicon nitride (Sis).
, - silicon oxide (SIO) r silicon nitride (Si
Similar effects can be obtained with silicone cubital membranes such as xOyNz) and fItRyjsis, and the formation of the 50-occlusal film-forming pouch and the placement of the '1 penile membrane are also limited to the Kashukuzou as previously described The present invention can be applied to a device having the following structure.

(g) 発明の詳細 な説明した如く本発明によれは、半導体装置等の製造工
程に多く使用される皮膜形成長−の内部に被着したシリ
コンを含む皮膜を防去゛3− 、)、、 l−”ライク
リーニングを効単艮く芙施丁なことか可能となジ、半導
体装@等の百穎注及び%翻弄の向上を推進する効果が得
られるり
(g) As described in detail, the present invention prevents the removal of a silicon-containing film deposited on the inside of a film-type growth often used in the manufacturing process of semiconductor devices, etc. , it is possible to improve the effectiveness of dry cleaning, and it is possible to achieve the effect of promoting improvements in semiconductor devices and other products.

【図面の簡単な説明】[Brief explanation of the drawing]

謁1図及び鵠2図は不発明を適用することができる皮膜
形成装置の例を示す楔式凶で必る0図において、1及び
11は詠板船払2は上部電極、3及び13はクリーニン
グ用Cic 極、4及び14はチャンバー壁、5及び1
5はガス場人d16及び16は」フト気営、12はクー
ゲノ)、17μカソード、18はアノード、19は遂蔽
根嚢示すつ代理人 升珪士 松 岡 宏四部 二量−二
ニ」
Figure 1 and Figure 2 show an example of a film forming device to which the invention can be applied. Cleaning Cic poles, 4 and 14 are chamber walls, 5 and 1
5 is the gas field person d16 and 16 is ``futokiei'', 12 is kugeno), 17μ cathode, 18 is anode, 19 is the final root capsule.

Claims (1)

【特許請求の範囲】[Claims] 皮膜形成装置内において四弗化炭素と六弗化硫黄と酸素
とを含む混合ガスを用いてプラズマを生成して、該装置
内部に被着し次シリコンを含む皮膜をエツチング除去す
ることを特徴とするドライクリーニング方法。
A plasma is generated in a film forming device using a mixed gas containing carbon tetrafluoride, sulfur hexafluoride, and oxygen, and a film deposited inside the device and containing silicon is etched away. Dry cleaning method.
JP16859283A 1983-09-13 1983-09-13 Dry cleaning method Granted JPS6059739A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16859283A JPS6059739A (en) 1983-09-13 1983-09-13 Dry cleaning method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16859283A JPS6059739A (en) 1983-09-13 1983-09-13 Dry cleaning method

Publications (2)

Publication Number Publication Date
JPS6059739A true JPS6059739A (en) 1985-04-06
JPH0452612B2 JPH0452612B2 (en) 1992-08-24

Family

ID=15870908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16859283A Granted JPS6059739A (en) 1983-09-13 1983-09-13 Dry cleaning method

Country Status (1)

Country Link
JP (1) JPS6059739A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6341014A (en) * 1986-08-06 1988-02-22 Sanyo Electric Co Ltd Epitaxial growth method
JPS63253628A (en) * 1987-04-10 1988-10-20 Hitachi Ltd Plasma treatment apparatus
JPS6464326A (en) * 1987-09-04 1989-03-10 Hitachi Ltd Plasma cleaning method
JPH01136970A (en) * 1987-11-20 1989-05-30 Matsushita Electric Ind Co Ltd Method for cleaning plasma cvd apparatus
JPH01180969A (en) * 1988-01-13 1989-07-18 Matsushita Electric Ind Co Ltd Sputtering method
US6852242B2 (en) 2001-02-23 2005-02-08 Zhi-Wen Sun Cleaning of multicompositional etchant residues
JP2009267250A (en) * 2008-04-28 2009-11-12 Ulvac Japan Ltd Plasma etching method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5559723A (en) * 1978-10-27 1980-05-06 Hitachi Ltd Plasma etching method
JPS5719569A (en) * 1980-07-09 1982-02-01 Mitsubishi Electric Corp Cooler for refrigerator
JPS5727024A (en) * 1980-07-25 1982-02-13 Mitsubishi Electric Corp Washing of reactor for plasma cvd method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5559723A (en) * 1978-10-27 1980-05-06 Hitachi Ltd Plasma etching method
JPS5719569A (en) * 1980-07-09 1982-02-01 Mitsubishi Electric Corp Cooler for refrigerator
JPS5727024A (en) * 1980-07-25 1982-02-13 Mitsubishi Electric Corp Washing of reactor for plasma cvd method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6341014A (en) * 1986-08-06 1988-02-22 Sanyo Electric Co Ltd Epitaxial growth method
JPS63253628A (en) * 1987-04-10 1988-10-20 Hitachi Ltd Plasma treatment apparatus
JPS6464326A (en) * 1987-09-04 1989-03-10 Hitachi Ltd Plasma cleaning method
JPH01136970A (en) * 1987-11-20 1989-05-30 Matsushita Electric Ind Co Ltd Method for cleaning plasma cvd apparatus
JPH01180969A (en) * 1988-01-13 1989-07-18 Matsushita Electric Ind Co Ltd Sputtering method
US6852242B2 (en) 2001-02-23 2005-02-08 Zhi-Wen Sun Cleaning of multicompositional etchant residues
JP2009267250A (en) * 2008-04-28 2009-11-12 Ulvac Japan Ltd Plasma etching method

Also Published As

Publication number Publication date
JPH0452612B2 (en) 1992-08-24

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