JPS6059562U - Mounting structure of high-density circuit package - Google Patents

Mounting structure of high-density circuit package

Info

Publication number
JPS6059562U
JPS6059562U JP15157383U JP15157383U JPS6059562U JP S6059562 U JPS6059562 U JP S6059562U JP 15157383 U JP15157383 U JP 15157383U JP 15157383 U JP15157383 U JP 15157383U JP S6059562 U JPS6059562 U JP S6059562U
Authority
JP
Japan
Prior art keywords
circuit package
mounting structure
density circuit
matrix
density
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15157383U
Other languages
Japanese (ja)
Inventor
西原 幹雄
村瀬 曄生
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP15157383U priority Critical patent/JPS6059562U/en
Publication of JPS6059562U publication Critical patent/JPS6059562U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来ρ高密度回路パッケージを示す正面図、第
2図は上記回路パッケージを実装するプリント基板を示
す平面図、第3図は従来の高密度回路パッケージの実装
構造を示す断面説明図、第4図は本考案による高密度回
路パッケージの実装構造を示す断面説明図、第5図は上
記回路パッケージを実装するプリント基板を示す平面図
、第6図はプリント基板上に高密度回路パッケージを搭
載する状態を示す断面説明図、第7図は本考案の変形例
を示す断面説明図である。 10・・・プリント基板、11・・・信号ピン、11a
・・・上端部、12・・・高密度回路パッケージ、13
・・・スルーホール、14・・・ハンダメッキ、15・
・・フラ、ンジ、16,16’・・・接続パッド、17
,17’…ハンダ。
Fig. 1 is a front view showing a conventional ρ high-density circuit package, Fig. 2 is a plan view showing a printed circuit board on which the circuit package is mounted, and Fig. 3 is a cross-sectional explanatory diagram showing the mounting structure of a conventional high-density circuit package. , FIG. 4 is a cross-sectional explanatory diagram showing the mounting structure of a high-density circuit package according to the present invention, FIG. 5 is a plan view showing a printed circuit board on which the circuit package is mounted, and FIG. FIG. 7 is a cross-sectional explanatory view showing a modified example of the present invention. 10... Printed circuit board, 11... Signal pin, 11a
. . . Upper end portion, 12 . . . High-density circuit package, 13
...Through hole, 14...Solder plating, 15.
...Fla, ji, 16,16'...Connection pad, 17
,17'...Solder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 板面にマトリクス状にスルーホールが形成されたプリン
ト基板の上記スルーホールに入出力用の多数本の信号ピ
ンをそれぞれ挿入してノ1ンダ付けし、上記プリント基
板のスルーホールに対応する裏面の位置にマトリクス状
に接続パッドを形成した高密度回路パッケージをそれぞ
れの接続パ、ラドが上記信号ピンの上端部に接触するよ
うに搭載したことを特徴とする高密度回路パツケニジの
実装構造。
A large number of signal pins for input and output are inserted into the through holes of the printed circuit board, which has through holes formed in a matrix on the board surface, and are connected by soldering. A mounting structure for a high-density circuit package, characterized in that a high-density circuit package having connection pads formed in a matrix at positions is mounted such that each connection pad and pad are in contact with the upper end of the signal pin.
JP15157383U 1983-09-30 1983-09-30 Mounting structure of high-density circuit package Pending JPS6059562U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15157383U JPS6059562U (en) 1983-09-30 1983-09-30 Mounting structure of high-density circuit package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15157383U JPS6059562U (en) 1983-09-30 1983-09-30 Mounting structure of high-density circuit package

Publications (1)

Publication Number Publication Date
JPS6059562U true JPS6059562U (en) 1985-04-25

Family

ID=30335845

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15157383U Pending JPS6059562U (en) 1983-09-30 1983-09-30 Mounting structure of high-density circuit package

Country Status (1)

Country Link
JP (1) JPS6059562U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001043188A1 (en) * 1999-12-06 2001-06-14 Ibiden Co., Ltd. Electronic part module, method of producing the same, etc.

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001043188A1 (en) * 1999-12-06 2001-06-14 Ibiden Co., Ltd. Electronic part module, method of producing the same, etc.

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