JPS6059463A - Data transfer processing system of terminal controller - Google Patents

Abstract

PURPOSE:To decrease the memory operations and to shorten the data transfer time by selecting a DMA control part or a PIO control part according to the contents of data and performing the transfer of data between a memory part and a central processor equipment. CONSTITUTION:A WRITE system command delivered from a central processor equipment 5 is read out of an interface control part 8 by a main control part 9. Then the part 9 indicates an interruption to a PIO control part 12. This interruption is reported to a microprocessor control part 2, and a program stored in a memory part 3 is executed. Therefore the data transfer method of PIO or DMA, etc. is set to a register part 11. Then the part 9 indicates the read of the data following a command and fetches data from the processor equipment 5 to set it to the part 11. Then the DMA is indicated to a DMA control part 13 in case the data transfer method is defined to the DMA. The data given from the processor equipment 5 is stored to the part 3.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention is a terminal control device that controls various terminal devices, and is suitable for shortening the data transfer processing time between the terminal control device and a central processing unit. Regarding data transfer processing method.

[Background of the invention]

Conventionally, data exchange between a terminal control device and a central processing unit is performed using DMA (Dj recL M emory A).
ccass) method or PIO (Progra
+nmed I npu(.

(Qut; out) Depending on which method is best.

The DMA method is a method in which data is transferred continuously by specifying the transfer data address and transfer data callan 1 to number, and the PIO method is a method in which data is transferred continuously by specifying the transfer data address and transfer data callan 1 to number. This is a method of transferring data in units of 1 or 2 bytes, for example.

Here, the MΔ method can be faster than the PIC) method, and is suitable for cases where there are many data scenes to be transferred.

However, if the terminal device is, for example, a video device, and the kanji and kanji are mixed, it is necessary to insert a code change character such as kanji - kanji, or insert a special character code 1 for screen control. Yes, if data is transferred continuously using the D lvl A method, the process of detecting the coat change character, etc. described above and the subsequent Kanji 2 1 process etc. will not be performed on the 4t take stored in the memory in the terminal control device. Naturally, the processing time for performing operations on the memory increases dramatically, which reduces processing performance. On the other hand, if the FI J O method is used for all data, it is necessary to issue a P10 instruction for each data unit, which means that processing performance will be lowered even more than the I) M A method even from the point of view of the data. become.

[Purpose of the invention]

The L1 objective of the present invention is to enable the transfer of data containing special control characters, such as data from a video device, without reducing processing performance compared to conventional methods. The purpose of the present invention is to provide a data transfer processing method that provides the following advantages.

[Summary of the Invention] The main points of the present invention are that the terminal control device 2) directly accesses the memory; ) 10 control units, and 1) take and transfer data that is better to use MΔ transfer using the DM∆ method and data that is better to use PIO transfer using the P II O method. This is designed to reduce the number of operations performed on the memory by the program for data transfer processing as much as possible, thereby shortening the time required for data transfer processing +1ii''.

[Embodiments of the invention]

FIG. 1 is a cross-sectional diagram of an embodiment of the present invention.

In FIG. 1, a terminal control device 1 includes a microprocessor section 2, a memory section 3, and a human output control section /l,
These are the system control line 6 to the 1 node/data line 7.
connected with. The human output control unit 11 is the central processing unit 5
The parts that process the connection interface with the
○ Consists of a control section 12 and an IJMA control section 13.

Note that the terminal control device 1 includes a terminal device (such as a video device).
Is there an adapter that handles the connection interface with
In FIG. 1, it is omitted 1118.

For example, when sending a take from the central processing unit 5 to the terminal control device 1, the process is as described above.

When the central processing unit 5 issues a VJ RI l"E command, the -r interface control unit 8 receives the command 1- (J and the main control unit [J. complains.'112 f'j The received main control unit 511) reads Comania 1- etc. from the interface control unit 8 via the internal lotus 10,
After creating the interrupt information fi and sending it to the register section 11 to the cell 1, +3 IO control section 12/\interrupt J) is instructed.

The interrupt is reported to the control unit 2 via l'IO control unit 12 via the system)1 control line (j, 1151./-(,1711Jju), and the control unit 2 is sent to the memory unit:3. 1 ( ), it is 9.) By executing Norotara 11, 1'' mark 11-
I' I O or D lv
lΔ etc. wo1−=ta transfer force k]・Set in the register section 11.

1. The control section 9 controls the register section 11.

1. Data 1j: Feeding force method is set] 1. When it detects that the
7 included and 7 into the -r interface control unit 8 and process over medium heat 2! 21: Take in the take of Go 5 and transfer Cera 1 to L/sister part 11 and L - 4 After this, data transfer If the method is II) IV4Δ, enter 1. ') M△ finger; j'.

(In this case l) M A -V,'RI']”1
1) Data from the medium heat processing device 5 is stored in the memory section 3 by the 1νIA control section I3. By repeating this data transfer, all the data to be output to a video device etc. is stored in the memory section j3.
11.7-6 From terminal control device 1 to central processing)'4E i
i Transfer the take to 5 (eyes, central processing unit 9-
, to 1. ! I': △1) System commands 1 to 1 are source tj, terminal control (within 1 σ) output direction is memory section: 3 -> register section 11 -> I > 9 - base control section 8 The main control unit 9 sends the message to the central processing unit 11j7 (1).
The division that is not processed by (J becomes the movement 11 similar to -1-).

Next, JY will be explained in detail by taking as an example the case where a child -9pφノ containing the kanji ko I- is sent to the terminal control device 1 or 1) central processing unit 5. IJI (, JIIl device 5
As shown in Figure 2, it is easy to make an I- turn.
Since the content of the kanji identification code 1- is changed, it is necessary to insert the kanji identification code 1-, 1: una 1゛1゛special'' into the data and transfer it. .

In this case, the normal processing would be to insert the kanji identification code 1~ in memory 3, but this would require the entire data to be manipulated in memory 3-F, which would take a long time to process. increases to In the present invention, this is done as follows.

FIG. 3 is a flow diagram of the data transfer processing method according to the present invention, and FIG. 4 is an example of registers included in each part of FIG.

First, when transferring a kanji code, the Mytalo processor control unit 2 uses the PIO command to transfer the kanji identification code M by 1.
- is transferred to the data buffer register of the register section 11, and the value of Mbye 1- is transferred to the cheater bath counter 1.
The response is sent to the 1) MΔ address register in the IBMΔ control unit 13, and the N of the kanji code N by "1- is sent to the DMA callan 1 register, and finally the transfer to the register unit 11 is performed. Control register l) I O/1.)
Set the MΔ transfer flag and data output operation flag and perform seno 1-.

The main control unit 9 scans the operation instruction flag of the transfer control register of the register unit 11, and when detecting the data output operation flag, checks the data 1 transfer instruction, and
If the IO/DMA transfer flag is )L, it is determined that DMA transfer is to be performed after PIO.7 In this case, first, the PIO control unit 1
2, transfer the contents of the P 1.0 minute transfer data buffer register (kanji identification code) in the register unit 11 by the number of data (M bytes) indicated in the iA data buffer count register and control the interface. It is transferred to the central processing unit 5 via the output register of the unit 8, and then
'l M /~ Instructs the control unit 13 to read the data in the memory unit 3 using the DMA address register, and sets it to the IBMΔ register in the register unit 11. This l) The contents of the MA register (Kanji ko 1 ~) are set via the output register 1 internal bus 1 ( ) of the interface control unit 8 and transferred to the central processing station 5, but this operation is
By repeating the contents of the MA counter 1 register (to N by 1), all data in the memory section 3 is transferred to the central processing unit 5. While this data transfer is repeated, each count register is subtracted and each address register is added.

In addition, a series of registers is used for transfer data buffer and L)
The present invention can also be applied to a method in which the items opened to MA are set as one group, and the grouped items are double or tripled, and the grouped items are connected and processed.

〔Effect of the invention〕

As explained below, according to the present invention, either PIO or DMA data transfer force type can be freely selected depending on the data content, so that it is possible to reduce the number of manual operations during data transfer. is created, and the force 1 reduction 1 h between the data transfer outside 1 old 1 - + f is brought about.

[Brief explanation of the drawing]

Fig. 1 is an overall configuration diagram of an embodiment of the present invention, and Fig. 2 is a l
FIG. 3 is a schematic processing flow diagram of data transfer according to the present invention, and FIG. 4 is a diagram showing an example of registers included in each part in FIG. 1. 1 - terminal control device, 2... microprocessor control unit,
3...Memory section, 4.Human output control section, 5 Central processing unit, 6...System control line, 7 Address/data line,
8...Interface control line, 9...Main control section, 10
... Internal lotus, 11 Register section, 12... PIO control section, 13... DM 8 sub control section O.3 Figure

Claims (1)

[Claims] (+) A processor unit, a memory unit in which programs and data are stored, and an input/output control unit that exchanges data with a central processing unit. In a terminal control device that controls various terminal devices, 1)
``Direct memory access control unit (hereinafter referred to as 1.) MA control unit) that directly accesses the memory unit to the input/output control unit and input/output commands (1) through the processor unit
○ command) to communicate with the memory section l) 1' I
O control unit is provided, and depending on the content of the data, the above 1) M
11jt either the Δ control section or the PI○ control section.
<1/te1jij memo memory central processing'! A data transfer processing method for a terminal control device, characterized in that it processes data transfer between A and A.