JPS6057685B2 - Variable resistor extraction electrode formation method - Google Patents
Variable resistor extraction electrode formation methodInfo
- Publication number
- JPS6057685B2 JPS6057685B2 JP8414780A JP8414780A JPS6057685B2 JP S6057685 B2 JPS6057685 B2 JP S6057685B2 JP 8414780 A JP8414780 A JP 8414780A JP 8414780 A JP8414780 A JP 8414780A JP S6057685 B2 JPS6057685 B2 JP S6057685B2
- Authority
- JP
- Japan
- Prior art keywords
- variable resistor
- electrodes
- extraction electrode
- plating film
- insulating substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Adjustable Resistors (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Description
【発明の詳細な説明】
この発明は可変抵抗器の引き出し電極形成法に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming lead electrodes of a variable resistor.
第1図、第2図はこの発明の従来例を説明するための
背景となる可変抵抗器の一例を示したものであり、第1
図は可変抵抗器の平面図、第2図はその一部拡大側断面
図てある。FIGS. 1 and 2 show an example of a variable resistor that serves as a background for explaining the conventional example of the present invention.
The figure is a plan view of the variable resistor, and FIG. 2 is a partially enlarged side sectional view thereof.
図において、1はアルミナ、フォルステライト、ジル
コニアなどのセラミックからなる絶縁基板、2は抵抗被
膜て絶縁基板1上に形成されており、摺動子3がこの抵
抗被膜2上をスライドする。In the figure, 1 is an insulating substrate made of ceramic such as alumina, forsterite, zirconia, etc., 2 is a resistive coating formed on the insulating substrate 1, and a slider 3 slides on this resistive coating 2.
4、5は抵抗被膜2の両端とそれぞれ電気接続している
引き出し電極で、この引き出し電極4、5には引き出し
端子6、7が接続されている。Reference numerals 4 and 5 denote lead-out electrodes electrically connected to both ends of the resistive coating 2, respectively, and lead-out terminals 6 and 7 are connected to the lead-out electrodes 4 and 5, respectively.
8は摺動子3側の引き出し端子である。8 is a lead terminal on the slider 3 side.
このような従来構造の可変抵抗器において、特に第2
図において明らかなように、抵抗被膜2の端部は引き出
し電極4、5の上に重なつて形成されている。そしてこ
の引き出し電極4、5には従来より焼付け銀電極がもつ
ぱら用いられていた。このため最小抵抗値から抵抗を増
加させるために摺動子をスライドさせてゆくと、第3図
に示されるように抵抗値変化はなめらかにならず、特に
摺動子が移動して間もない引き出し電極側て抵抗値が飛
び上がる(ホップオフ)現象が見られた。これは焼付け
銀電極そのものが厚膜状であるため、引き出し電極4、
5上の抵抗被膜2と絶縁基板1上の抵抗被膜2とに段差
が生じ、この抵抗被膜2の段差によつて摺動子3が跳躍
し、なめらかな抵抗値変化が得られないのである。また
従来のように引き出し電極4、5が厚膜状てあると、抵
抗被膜2を形成する際、具体的には抵抗ペーストを印刷
するときに、この引き出し電極4、5の近くで、抵抗ペ
ーストの印刷幅が広がり、特に小型の可変抵抗器におい
ては、抵抗値のバラツキの要因となつていた。さらに引
き出し電極4、5の終端エッジ部における抵抗被膜2の
膜厚が薄くなるため、摺動時の断線、負荷時の電流集中
による発熱が原因の特性劣化、および摺動雑音などの劣
化要因となつていた。 したがつて、この焼付け銀電極
に代わつて、引き出し電極上の抵抗被膜と絶縁基板上の
抵抗被膜の段差が小さく、抵抗値が最小から最大へなめ
らかに変化する可変抵抗器の出現が望まれていた。In a variable resistor with such a conventional structure, especially the second
As is clear from the figure, the ends of the resistive coating 2 are formed to overlap the lead electrodes 4 and 5. As the extraction electrodes 4 and 5, baked silver electrodes have traditionally been used. For this reason, when sliding the slider to increase the resistance from the minimum resistance value, the change in resistance does not become smooth as shown in Figure 3, especially after the slider has moved. A phenomenon in which the resistance value jumped (hop-off) was observed on the extraction electrode side. This is because the baked silver electrode itself is a thick film, so the extraction electrode 4,
A difference in level occurs between the resistive coating 2 on the resistive coating 5 and the resistive coating 2 on the insulating substrate 1, and the slider 3 jumps due to the level difference in the resistive coating 2, making it impossible to obtain a smooth change in resistance value. Furthermore, if the extraction electrodes 4 and 5 are thick films as in the past, when forming the resistance coating 2, specifically when printing the resistance paste, the resistance paste The printing width has become wider, and this has become a factor in resistance value variations, especially in small variable resistors. Furthermore, since the thickness of the resistive coating 2 at the terminal edge portions of the extraction electrodes 4 and 5 becomes thinner, deterioration factors such as wire breakage during sliding, heat generation due to current concentration during load, and sliding noise may occur. I was getting used to it. Therefore, in place of this baked silver electrode, there is a desire for a variable resistor in which the step difference between the resistance coating on the extraction electrode and the resistance coating on the insulating substrate is small, and the resistance value changes smoothly from the minimum to the maximum. Ta.
この発明は上記した要求に答えることのできる可変抵抗
器の引き出し電極の形成法を提供するものである。より
具体的には、この発明はなめらかな抵抗値の変化を示す
ことができる可変抵抗器の引き出し電極の形成法を提供
するものである。The present invention provides a method for forming an extraction electrode of a variable resistor that can meet the above-mentioned requirements. More specifically, the present invention provides a method for forming an extraction electrode of a variable resistor that can exhibit a smooth change in resistance value.
さらにこの発明は引き出し電極の形成が容易に行える方
法を提供するものである。Furthermore, the present invention provides a method by which extraction electrodes can be easily formed.
さらにまたこの発明は従来の焼付け銀を用いた場合にく
らべ、大幅に安価な方法を提供するものである。Furthermore, the present invention provides a significantly less expensive method than using conventional baked silver.
すなわち、この発明の要旨とするところは、絶縁基板上
に、摺動子がスライドする抵抗被膜が形成され、一方こ
の抵抗被膜の両端に引き出し電極が形成されている可変
抵抗器において、前記引き出し電極を形成するに際し、
絶縁基板の引き出し電極を形成すべき個所に活性化ペー
ストを付与し、さらに焼付けをして活性化処理を行い、
引き続き無電解メッキ被膜を施すことを特徴とするもの
である。That is, the gist of the present invention is to provide a variable resistor in which a resistance coating on which a slider slides is formed on an insulating substrate, and extraction electrodes are formed at both ends of the resistance coating. In forming the
Activation paste is applied to the parts of the insulated substrate where the extraction electrodes are to be formed, and then activated by baking.
It is characterized by subsequently applying an electroless plating film.
以下この発明を一実施例に従つて説明する。The present invention will be explained below according to one embodiment.
実施例可変抵抗器の本体を構成する絶縁基板として、ア
ルミナ、フォルステライト、ステアタイト、ジルコニア
などのセラミック基板を用い、セラミック基板の引き出
し電極を形成する該当個所に活性ペーストを所望のマス
クを介して筆塗り、印刷、スプレーなどの手段で付与し
た。Example A ceramic substrate made of alumina, forsterite, steatite, zirconia, etc. is used as the insulating substrate constituting the main body of the variable resistor, and active paste is applied through a desired mask to the corresponding parts of the ceramic substrate where the lead electrodes will be formed. It was applied by brush painting, printing, spraying, etc.
この活性化ペー.ストは、たとえばパラジウム、白金、
金などの触媒金属を樹脂、溶剤などでペースト状とした
ものである。活性化ペーストを付与したのち乾燥させ、
次いで550〜650℃の温度で熱処理を行い、活性化
処理を行つた。さらに、公知のニッケル、銅jなどの無
電解メッキ浴に浸漬し、引き上げたのち水洗を行い、乾
燥することによつて無電解メッキ被膜よりなる引き出し
電極を形成した。こののち、抵抗被膜を形成するため、
カーボン、サーメットなどの抵抗材料を主成分とする抵
・抗ペーストをセラミック基板上に付与し、焼付け処理
を行つて抵抗被膜を形成し、その両端を引き出し電極上
に重ねて電気接続させた。This activation page. For example, palladium, platinum,
A catalytic metal such as gold is made into a paste with resin, solvent, etc. After applying the activation paste, dry it,
Next, heat treatment was performed at a temperature of 550 to 650°C to perform activation treatment. Further, it was immersed in a known electroless plating bath of nickel, copper, etc., pulled out, washed with water, and dried to form an extraction electrode made of an electroless plating film. After this, in order to form a resistive film,
A resistor/resistance paste containing a resistive material such as carbon or cermet as a main component was applied onto a ceramic substrate and baked to form a resistive film, and both ends of the paste were laid over lead-out electrodes for electrical connection.
次いで、摺動子をセラミック基板上の抵抗被膜上をスラ
イドするように回転可能に取り付けた。Next, the slider was rotatably attached to slide on the resistive coating on the ceramic substrate.
次に、具体的な実施例にもとづいて説明する。絶縁基板
としてアルミナ基板を用いた。このアルミナ基板上の引
き出し電極を形成すべき個所に、パラジウムを3重量%
含むエチルセルロース系樹脂を溶剤で希釈した活性化ペ
ーストをスクリーン印刷で塗布し、こののち表に示す各
温度で熱処理を行つた。次いで、ニッケルの無電解メッ
キ浴に浸漬し、・引き上げたのち水洗を行い、さらに乾
燥して引き出し電極を形成した。Next, a description will be given based on a specific example. An alumina substrate was used as the insulating substrate. 3% by weight of palladium was added to the areas on this alumina substrate where extraction electrodes were to be formed.
An activated paste containing ethyl cellulose resin diluted with a solvent was applied by screen printing, and then heat treatment was performed at each temperature shown in the table. Next, it was immersed in a nickel electroless plating bath, pulled out, washed with water, and further dried to form an extraction electrode.
得られた各引き出し電極について、目視により電極形成
状態を観察し、メッキ膜の表面に「むら」のあるものを
×印で示し、「むら」のない個所があるものの、概ね「
むら」の割合が多いものをΔ印で示し、「むら」のない
ものをO印で示した。For each lead-out electrode obtained, the electrode formation state was visually observed, and those with "unevenness" on the surface of the plating film were marked with an "X".
Those with a high proportion of "unevenness" are indicated by a Δ mark, and those with no "unevenness" are indicated by an O mark.
またメッキ膜の上にリード線を垂直に半田付けを行ない
、引張り試験を行つてメッキ膜の接着強度を測定した。
なお、引き出し電極の面積は2×3T1g1&である。
また熱処理温度が650Cを越えるものについては、効
果上大差がないか、熱処理温度を高くすることによるエ
ネルギーコストの点からメリットがないため熱処理温度
範囲から外した。上記した実施例により得られた可変抵
抗器によれば、引き出し電極が厚膜状の焼付け銀電極よ
りも薄い無電解メッキ被膜よりなるため、引き出し電極
そのものの抵抗値が低くなり、従来のように抵抗値の変
化過程におけるホップオフ現象が見られなくなる。Further, a lead wire was vertically soldered onto the plating film, and a tensile test was conducted to measure the adhesive strength of the plating film.
Note that the area of the extraction electrode is 2×3T1g1&.
In addition, cases where the heat treatment temperature exceeds 650C are excluded from the heat treatment temperature range because there is no significant difference in effectiveness or there is no advantage in terms of energy cost from increasing the heat treatment temperature. According to the variable resistor obtained in the above-described embodiment, the extraction electrode is made of an electroless plating film that is thinner than the thick baked silver electrode, so the resistance value of the extraction electrode itself is lowered, and the resistance value of the extraction electrode itself is lowered, unlike the conventional one. The hop-off phenomenon in the resistance value change process is no longer observed.
また、焼付け銀電極に代えて無電解メッキ被膜電極とす
る場合、従来の無電解メッキ法によれば、あらかじめ絶
縁基板に無電解メッキ被膜を形成したのち、レジスト膜
を付与し、さらにエッチング処理して必要な個所にのみ
引き出し電極を残しておく方法があるが、この発明によ
れば無電解メッキ被膜を形成する過程において、必要個
所にのみ形成できるため、引き出し電極の形成が容易と
なり、しかも任意の個所に形成することができる。In addition, when using an electroless plating film electrode instead of a baked silver electrode, according to the conventional electroless plating method, an electroless plating film is first formed on an insulating substrate, a resist film is applied, and then an etching process is performed. There is a method of leaving extraction electrodes only in the necessary locations, but according to the present invention, the extraction electrodes can be formed only in the necessary locations during the process of forming the electroless plating film, making it easy to form the extraction electrodes, and also leaving them in the desired locations. It can be formed at the following locations.
さらに、この発明により得られた無電解メッキ被膜より
なる引き出し電極は触媒金属が厚膜状であるため、従来
の無電解メッキ法にくらべてメッキ被膜の接着強度が大
きいとともに抵抗値も小さくすることができる。Furthermore, since the lead electrode made of the electroless plating film obtained by this invention has a thick catalytic metal, the adhesion strength of the plating film is higher and the resistance value is lower than that of the conventional electroless plating method. I can do it.
なお、上記した実施例に加えるに、活性化処理に先立つ
て、あらかじめ絶縁基板に脱脂、エッチング、あるいは
必要に応じて感受性化処理などの前処理を施しておけば
、より均一で良質なメッキ被膜が形成でき、接着強度も
向上させることができる。In addition to the above-mentioned examples, if the insulating substrate is subjected to pre-treatment such as degreasing, etching, or sensitization treatment as necessary before the activation treatment, a more uniform and high-quality plating film can be obtained. can be formed, and the adhesive strength can also be improved.
さらに、メッキ被膜形成後に、300〜800℃で熱処
理することにより、接着強度をよソー層大きくすること
ができる。以上この発明方法によれば、可変抵抗器の引
き出し電極を任意の個所に無電解メッキ法により形成す
ることができ、従来のようにメッキ被膜の除去というよ
うな面倒な工程が不要となる。Furthermore, by heat-treating at 300 to 800[deg.] C. after forming the plating film, the adhesive strength of the layer can be increased. As described above, according to the method of the present invention, the lead electrode of the variable resistor can be formed at any location by electroless plating, and the conventional troublesome process of removing the plating film is not necessary.
またニッケルペーストあるいは銅ペーストを用いた厚膜
状の焼付け電極では、焼付け銀電極にくらべて安価には
できるが、焼付け工程において非酸化雰囲気などの特別
な処理が必要になるのにくらべて、この発明では何らこ
のような処理がいらないばかりか、焼付け電極では解消
できない抵抗値のホップオフ現象をなくした可変抵抗器
を安価に提供することができるという利点を有する。Also, thick-film baked electrodes using nickel paste or copper paste are cheaper than baked silver electrodes, but they require special treatment such as a non-oxidizing atmosphere during the baking process. The present invention not only does not require any such treatment, but also has the advantage of being able to provide a variable resistor at a low cost that eliminates the resistance hop-off phenomenon that cannot be eliminated with baked electrodes.
第1図、第2図はこの発明方法を説明するための背景と
なる可変抵抗器の平面図および一部拡大側断面図、第3
図は回転角と抵抗値変化率との関係を示す図である。
1・・・・・・絶縁基板、2・・・・・・抵抗被膜、3
・・・・・・摺動子、4,5・・・・・・引き出し電極
。1 and 2 are a plan view and a partially enlarged side sectional view of a variable resistor, which serves as a background for explaining the method of this invention, and FIG.
The figure is a diagram showing the relationship between the rotation angle and the rate of change in resistance value. 1...Insulating substrate, 2...Resistive coating, 3
...Slider, 4,5...Extractor electrode.
Claims (1)
成され、一方この抵抗被膜の両側に引き出し電極が形成
されている可変抵抗器において、前記引き出し電極を形
成するに際し、絶縁基板の引き出し電極を形成すべき個
所に活性化ペーストを付与し、さらに550〜650℃
で焼付けをして活性化処理を行い、引き続き無電解メッ
キ被膜を施すことを特徴とする可変抵抗器の引き出し電
極形成法。1. In a variable resistor in which a resistance coating on which a slider slides is formed on an insulating substrate, and extraction electrodes are formed on both sides of this resistance coating, when forming the extraction electrodes, the extraction electrodes of the insulating substrate are Activation paste is applied to the area where the
A method for forming lead electrodes of a variable resistor, which is characterized by performing activation treatment by baking and subsequently applying an electroless plating film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8414780A JPS6057685B2 (en) | 1980-06-20 | 1980-06-20 | Variable resistor extraction electrode formation method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8414780A JPS6057685B2 (en) | 1980-06-20 | 1980-06-20 | Variable resistor extraction electrode formation method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5710209A JPS5710209A (en) | 1982-01-19 |
JPS6057685B2 true JPS6057685B2 (en) | 1985-12-16 |
Family
ID=13822381
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8414780A Expired JPS6057685B2 (en) | 1980-06-20 | 1980-06-20 | Variable resistor extraction electrode formation method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6057685B2 (en) |
-
1980
- 1980-06-20 JP JP8414780A patent/JPS6057685B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5710209A (en) | 1982-01-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS61121501A (en) | Dielectric resonator and its production | |
US4963389A (en) | Method for producing hybrid integrated circuit substrate | |
JPH0312789B2 (en) | ||
JPS6057685B2 (en) | Variable resistor extraction electrode formation method | |
JPH02110903A (en) | Manufacture of resistor | |
JPH0373503A (en) | Formation of circuit | |
JPS634327B2 (en) | ||
JPS5938693B2 (en) | Gas Hoden Panel No Denkiyokusei Sakuhou | |
JPH0680880B2 (en) | Manufacturing method of ceramic circuit board with resistor | |
JPS6025002B2 (en) | Porcelain substrate for forming glazed resistors | |
JPH07297006A (en) | Chip electronic part | |
JPH0465010A (en) | Copper conductive paste | |
JPS5858717A (en) | Electronic part | |
JPS59220901A (en) | Method of forming electrode of ceramic electronic part | |
JPH03141135A (en) | Formation of metallic film | |
JPS6019680B2 (en) | How to solder to an insulation board | |
JPH04105303A (en) | Electrode forming method of porcelain semiconductor element | |
JPH01262691A (en) | Manufacture of ceramic printed wiring board | |
JPH07226303A (en) | Electrode forming method for ptc thermistor | |
JPH03109793A (en) | Manufacture of wiring circuit board with resistor | |
JP2000077589A (en) | Lead wire | |
JPH03175690A (en) | Ceramic printed wiring board | |
JPS634330B2 (en) | ||
JPH029190A (en) | Manufacture of ceramic circuit board with resistor | |
JPH0151003B2 (en) |