JPS6057679A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6057679A JPS6057679A JP59055178A JP5517884A JPS6057679A JP S6057679 A JPS6057679 A JP S6057679A JP 59055178 A JP59055178 A JP 59055178A JP 5517884 A JP5517884 A JP 5517884A JP S6057679 A JPS6057679 A JP S6057679A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- single crystal
- semiconductor
- crystal semiconductor
- semiconductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 53
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 238000006243 chemical reaction Methods 0.000 claims abstract description 18
- 239000013078 crystal Substances 0.000 claims abstract description 15
- 239000001257 hydrogen Substances 0.000 claims abstract description 9
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 9
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 7
- 239000011521 glass Substances 0.000 claims abstract description 7
- 229910052736 halogen Inorganic materials 0.000 claims abstract description 4
- 150000002367 halogens Chemical class 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 abstract description 14
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 abstract description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 5
- 229910000077 silane Inorganic materials 0.000 abstract description 5
- 229910052710 silicon Inorganic materials 0.000 abstract description 5
- 239000010703 silicon Substances 0.000 abstract description 5
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 abstract description 5
- 229910010271 silicon carbide Inorganic materials 0.000 abstract description 5
- 239000012808 vapor phase Substances 0.000 abstract description 4
- 238000004544 sputter deposition Methods 0.000 abstract description 2
- 239000007789 gas Substances 0.000 description 18
- 239000010410 layer Substances 0.000 description 15
- 239000007795 chemical reaction product Substances 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 239000012159 carrier gas Substances 0.000 description 4
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 4
- 150000002431 hydrogen Chemical class 0.000 description 3
- 239000011261 inert gas Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000012071 phase Substances 0.000 description 3
- 229910021332 silicide Inorganic materials 0.000 description 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000001747 exhibiting effect Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 230000006698 induction Effects 0.000 description 2
- 238000010926 purge Methods 0.000 description 2
- VXEGSRKPIUDPQT-UHFFFAOYSA-N 4-[4-(4-methoxyphenyl)piperazin-1-yl]aniline Chemical compound C1=CC(OC)=CC=C1N1CCN(C=2C=CC(N)=CC=2)CC1 VXEGSRKPIUDPQT-UHFFFAOYSA-N 0.000 description 1
- 241000251468 Actinopterygii Species 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 1
- 125000003118 aryl group Chemical group 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 210000000988 bone and bone Anatomy 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- MROCJMGDEKINLD-UHFFFAOYSA-N dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229930195733 hydrocarbon Natural products 0.000 description 1
- 150000002430 hydrocarbons Chemical class 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000003472 neutralizing effect Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 239000001294 propane Substances 0.000 description 1
- -1 propane (CIH Chemical class 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 239000005049 silicon tetrachloride Substances 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- ZDHXKXAHOVTTAH-UHFFFAOYSA-N trichlorosilane Chemical compound Cl[SiH](Cl)Cl ZDHXKXAHOVTTAH-UHFFFAOYSA-N 0.000 description 1
- 239000005052 trichlorosilane Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/075—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/548—Amorphous silicon PV cells
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、基板上に層状に設りた半導体層中にPN接合
、PIN接合、ジョブ1−主接合を少なくともひとつ設
け、かかる接合を利用して光電変換装置(フカ1−セル
、太陽電池、また蛍光灯電池)を形成させることに関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention provides at least one PN junction, PIN junction, and job 1-main junction in a semiconductor layer provided in a layered manner on a substrate, and utilizes such junction to convert photoelectric conversion devices ( 1- cells, solar cells, also fluorescent lamp cells).
本発明は、皿、コツプ、カップなどの容器、電燈の傘、
ガラス窓または凹凸表面を有する屋根の一部であって、
任意の形状を有する基板上に形成することにより、民生
用または一般家庭用の発電設備の一部とするごとを目的
としている。The present invention is applicable to containers such as plates, cups, and cups, electric light umbrellas,
A part of a roof having a glass window or an uneven surface,
By forming it on a substrate having an arbitrary shape, it is intended to be used as part of power generation equipment for consumer use or general home use.
本発明は、特にかかる凹凸の程度をその高低差が10μ
以上特に1mm以上有していてもよ(、ざらには屋根の
一部構造をさせていてもよいことがIl、1徴である。In particular, the present invention can reduce the degree of such unevenness with a height difference of 10 μm.
In particular, it may have a thickness of 1 mm or more.
従来、凹凸の表面特に凹面のへこめの部分に幻して、半
導体表面層を均質な厚ざに設りるごとか不可能とされて
いた。しかしかかる不可能さは半導体被膜の製造方法に
大きく帰因していることがわかった。即ぢ、従来、常圧
の気相法で形成−已んとした場合は、キャリアガスを反
応性気体に比べ100〜10000倍の量流していた。Conventionally, it has been thought that it is impossible to provide a semiconductor surface layer with a uniform thickness due to the irregularities on the surface, especially the recessed portions of the concave surface. However, it has been found that this impossibility is largely attributable to the manufacturing method of the semiconductor film. That is, conventionally, when forming and completing by a gas phase method at normal pressure, the amount of carrier gas was flowed in an amount 100 to 10,000 times that of the reactive gas.
このためかかる不活性気体であるキャリアガスが反応生
成物の凹部での付着を逆に妨げていた。For this reason, the carrier gas, which is an inert gas, actually prevents the reaction products from adhering to the recesses.
かかる事実に基づき、キャリアカスをまったく用いぬ、
また実質的に用いぬ程度とした反応系を利用している。Based on this fact, we do not use carrier waste at all.
In addition, a reaction system that is virtually unused is utilized.
この代表的なものが減圧気相法である。しかし減圧気相
法は単に反応管内を減圧下としたことのみを特徴として
いる。このため減圧の程度を強< 1m+nHg程度と
すると、反応生成物の基板上への被膜化が著しく少なく
なる。本発明は反応容器内の圧力を0.01〜10to
rrとし、加えて容器内は実質的に反応性気体のみ、ま
たはそれと添加物のみとしたことを特徴としている。加
えて半導体被膜での半導体特性をさらに強くするため〜
水素またハロゲン元素を0.1〜200モル(原子)%
半導体被膜中に添加したことを第2の特徴としている。A typical example of this is the reduced pressure gas phase method. However, the reduced pressure gas phase method is characterized only by the fact that the inside of the reaction tube is kept under reduced pressure. For this reason, if the degree of pressure reduction is set to about strong<1 m+nHg, the formation of a film on the substrate by the reaction product will be significantly reduced. In the present invention, the pressure inside the reaction vessel is 0.01 to 10 to
rr, and in addition, the container is characterized by containing substantially only reactive gas or only reactive gas and additives. In addition, to further strengthen the semiconductor properties of the semiconductor film.
0.1 to 200 mol (atomic)% of hydrogen or halogen elements
The second feature is that it is added to the semiconductor film.
本発明における凹凸表面を持つ基板とは、いわゆる集積
回路エレクi−ロニクスに見られる1μ以下特に0.1
〜0.5μの高差即ち凹凸よりもむしろ少なくとも10
μ以上好ましくはl mmo上の凹凸を意味する。この
基板は皿、コツプ、カップなどの容器、電燈の傘、ガラ
ス窓、さらにまたは凹凸表面を有する屋根の一部のごと
き任意の形状を自する。本発明はかかる肉視て十分見分
りがフく程度の大きさの凹凸を設け、かかる固いまたは
弾力性を有する可曲性基板の内面または外表面に半導体
層を設けたものである。本発明は光電変換素子を非単結
晶半導体で作製することが可能であり、かつかかる非単
結晶半導体は多少の局部応力を加えても、信頼性上の異
常な低下またはストレス敏感性を有していないという実
験事実、および少なくとも本発明方法を用いる限りにお
いて、被形成面を有する基板は必ずしも平坦面である必
要をめられていないという事実に基づく。In the present invention, the substrate having an uneven surface is 1μ or less, especially 0.1μ or less, which is found in so-called integrated circuit electronics.
~0.5μ height difference, i.e. at least 10
It means irregularities of μ or more, preferably l mmo. This substrate can have any shape, such as a container such as a plate, a pot, a cup, an electric light umbrella, a glass window, or even a part of a roof with an uneven surface. The present invention provides such irregularities of such a size that they are sufficiently visible to the naked eye, and a semiconductor layer is provided on the inner or outer surface of such a hard or elastic flexible substrate. According to the present invention, it is possible to fabricate a photoelectric conversion element using a non-single crystal semiconductor, and even if such a non-single crystal semiconductor is subjected to some local stress, there is an abnormal decrease in reliability or stress sensitivity. This is based on the experimental fact that the method of the present invention is not necessarily flat, and the fact that the substrate having the surface to be formed does not necessarily have to be flat, at least as long as the method of the present invention is used.
以下にその実施例を図面に従って説明する。Examples thereof will be described below with reference to the drawings.
第1図はフォトセルまたは太陽電池に用いる場合の動作
原理を示したものである。FIG. 1 shows the principle of operation when used in a photocell or solar cell.
即ち第1図(A)は半導体層(1)の透光性基板例えば
ガラス、サファイア(3)上に導電性被膜(2)例えば
酸化スズ(SnOL)、ITOを形成し、さらにこの上
側に半導体層(1)を形成し、たものである。この半導
体層はMIN (金属−真性半導体−N型半導体)のシ
ョットキ接合の構造であっても、PIN <P型半導体
−真性半導体−N型半導体)接合構造またはPN接合で
あっても、さらにまたはこれらを多重にした接合であっ
てもよい。それは本発明の目的を満たし、かつ高い光−
電気変換効率(η)が得られ、また製造のしやすさとの
兼ね合いで決めればよい。That is, in FIG. 1(A), a conductive film (2) such as tin oxide (SnOL) or ITO is formed on a transparent substrate (3) of a semiconductor layer (1) such as glass or sapphire, and a semiconductor layer is further formed on top of this. Layer (1) was formed. This semiconductor layer may be a MIN (metal-intrinsic semiconductor-N-type semiconductor) Schottky junction structure, a PIN <P-type semiconductor-intrinsic semiconductor-N-type semiconductor) junction structure, or a PN junction structure, or It may be possible to connect these in multiple ways. It fulfills the purpose of the invention and has high light-
It may be determined based on the electrical conversion efficiency (η) obtained and the ease of manufacturing.
さらに第1図はこの半導体層(1)の上側に電極(4)
を設けている。光は(5)で左側より入射させている。Furthermore, in Figure 1, an electrode (4) is placed on the upper side of this semiconductor layer (1).
has been established. Light is incident from the left side in (5).
この図面は透光性基板を用いているが、本発明はかかる
フォトセル、太陽電池または螢光灯電池(白色の螢光灯
等の人工の光を電気に変換することによりラジオ、電子
時計その他の電子機器を動作せしめる電池)であっても
よい。Although this drawing uses a light-transmitting substrate, the present invention is capable of converting artificial light such as a photocell, solar cell, or fluorescent light battery (such as a white fluorescent light) into electricity to produce radios, electronic clocks, etc. It may also be a battery that operates other electronic devices.
・かかるセルまたは電池特に螢光灯電池にあっては、平
坦電池は必ずしも好ましい形であるとはいえず、第1図
(A)の構造を利用した本発明構造即ち第3図(A)が
その形状を考えた時きわめて効率がよいことがわかる。・For such cells or batteries, especially fluorescent lamp batteries, a flat battery is not necessarily a preferable form, and the structure of the present invention using the structure of FIG. 1(A), that is, FIG. 3(A) When you consider its shape, you can see that it is extremely efficient.
それはラジオ、電子時計等の外形ケースを作製した後、
機械的なストレスはケースである基板が保護し、かつ光
−電気変換はその容器の一部またはすべての面を受光面
とすることができるからである。After making the external case for radios, electronic watches, etc.
This is because the substrate, which is a case, protects against mechanical stress, and for photo-electrical conversion, part or all of the surface of the container can be used as a light-receiving surface.
第1図(B)は、基板(3)上に下側電極(2)、半導
体層(1)、上側電極(4)を設けている。上側電極は
クシ型、魚骨型等をさ・已ることにより光の吸収と電気
的導電率の向上を計った。In FIG. 1(B), a lower electrode (2), a semiconductor layer (1), and an upper electrode (4) are provided on a substrate (3). The upper electrode is shaped like a comb or a fish bone to improve light absorption and electrical conductivity.
第1図(B、 )は例えば電燈の傘等に用いることが可
能である。その−例を第3図(B、)に示しである。こ
れは電燈、螢光灯の保護ケースの−813に光電変換電
池を設けたもの、例えば電燈の上側ケースの内側に設け
たものである。かかる場合中火部に穴をあけてお(必要
がある。またかかる使用法により100Vとは異なった
電圧を簡単に引き出Jことができる。このためトランス
等を用いることなく低電圧を発生させ、ラジオ、カリキ
ュレイク等の充電器として利用することも可能であり、
またかかる電気を用いて連続光とは異なる光例えば赤、
緑等の特定波長の光を発光させる発光素子に電気的に連
結してもよい。The structure shown in FIG. 1 (B, ) can be used, for example, as an umbrella for an electric light. An example thereof is shown in FIG. 3(B). This is a case in which a photoelectric conversion battery is installed in the -813 protective case for an electric light or fluorescent lamp, for example, inside the upper case of the electric light. In such cases, it is necessary to make a hole in the medium heat part. Also, by using this method, it is possible to easily draw out a voltage different from 100V. Therefore, a low voltage can be generated without using a transformer etc. It can also be used as a charger for , radios, curriculum lakes, etc.
In addition, such electricity can be used to produce light different from continuous light, such as red,
It may be electrically connected to a light emitting element that emits light of a specific wavelength such as green.
第1図(A)および(B)の半導体層の構造は、不発門
人の出願による特願昭53−086867、特願昭53
−086868 (昭和53年7月17日出願)の「光
電変換半導体装置およびその作製方法」に記載されたも
のと同様である。The structure of the semiconductor layer in FIGS. 1(A) and 1(B) is disclosed in Japanese Patent Application No. 53-086867 filed by a fudo disciple.
-086868 (filed on July 17, 1978), "Photoelectric Conversion Semiconductor Device and Method for Manufacturing the Same".
第2図は本発明の少な(とも一部が凹凸状をした基板に
半導体層を設けた半導体装置の作製方法を実施するため
の装置である。図面に従ってその実施例を説明する。図
面において凹凸型をした基板(21)はホルダー(22
) J:に設置され、かつ不要部を(23)により遮蔽
している。この基板を反応炉(24)内に設置した。反
応性気体は(28)がシランのごとき珪化物気体、(2
9)はメタンの如き炭化物気体、(30)はジボランの
ごときP型の導電型を呈し得る不純物、(31)はフォ
スヒン、アルシンのごときN型の導電性を呈する不純物
を導入する。(35)は反応の前後に反応炉内をパージ
する不活性気体である。これらは入り口(27)よりマ
イクロ波を用いた励起系(エキサイタ)<26)を経て
反応炉(24)に導入される。マイクロ波は1〜10G
llz例えば2.46GIIzの周波数を用い、反応性
気体の化学的活性化、分解または反応させ、プラズマ状
態を呈している。珪素中に炭素が混入し炭化珪素5ix
C1−×(0≦X〈1)が形成された場合は、エネルギ
ギヤツブは1.5eVより太きく1.7〜3.5 eV
の間の任意の値をXの値を変えることにより得ることが
できる。反応性気体ばかがるエキサイタにて励起、分解
または反応するため、反応炉内では被形成面は必ずしも
平坦である必要がないことが実験的にわかった。さらに
このエキサイタ(26)、反応炉(24)は0.01〜
10torrに減圧され、活性状態の反応生成物は1〜
10MIIzの周波数の高周波エネルギ(25)により
さらに活性になって凹凸状の基板面に付着し被II¥化
する。減圧の程度は真空ポンプ(34)とその前段のニ
ー1−ルパルブ(33)により一定圧力に設定すること
は可能である。FIG. 2 shows an apparatus for carrying out the method of manufacturing a semiconductor device according to the present invention, in which a semiconductor layer is provided on a substrate having a partially uneven shape. The molded substrate (21) is attached to the holder (22).
) J:, and unnecessary parts are shielded by (23). This substrate was placed in a reactor (24). The reactive gases are (28) a silicide gas such as silane, (28) a silicide gas such as silane;
9) introduces a carbide gas such as methane, (30) introduces an impurity capable of exhibiting P type conductivity such as diborane, and (31) introduces an impurity exhibiting N type conductivity such as phosphine or arsine. (35) is an inert gas that is used to purge the inside of the reactor before and after the reaction. These are introduced into the reactor (24) from the entrance (27) through an excitation system (exciter) <26) using microwaves. Microwave is 1~10G
For example, a frequency of 2.46 GIIz is used to chemically activate, decompose, or react a reactive gas, resulting in a plasma state. Carbon is mixed into silicon, resulting in silicon carbide 5ix
When C1-x (0≦X<1) is formed, the energy gap is larger than 1.5 eV and is 1.7 to 3.5 eV.
Any value between can be obtained by changing the value of X. It has been experimentally found that the surface on which reactive gases are formed does not necessarily have to be flat in a reactor because only reactive gases are excited, decomposed, or reacted in an exciter. Furthermore, this exciter (26) and reactor (24) are 0.01~
The pressure is reduced to 10 torr, and the reaction product in the active state is 1 to
It is further activated by high frequency energy (25) with a frequency of 10 MIIz, adheres to the uneven substrate surface, and becomes II. The degree of pressure reduction can be set to a constant pressure using a vacuum pump (34) and a needle valve (33) in the preceding stage.
反応性気体は珪化物としてシランを用いたが、ジクロー
ルシラン(SiH,CI、)、トリクロールシラン(S
iHCll >、四塩化珪素(SiC1,)であっても
よく、炭化物としてメタン(C11,)のみではな(プ
ロパン(CIH,)等その他の炭化水素であってもよい
。Silane was used as the silicide for the reactive gas, but dichlorosilane (SiH, CI), trichlorosilane (S
iHCll>, silicon tetrachloride (SiC1,) may be used, and the carbide may be not only methane (C11,) but also other hydrocarbons such as propane (CIH,).
またこの炭化物を用いなくてもこのかわりに窒化物とし
てアンモニア(Nl+、 )、ヒドラジン(NLll、
)を用いてもよい。パージ用の不活性気体は一般に価格
面より安価な窒素を用いたが、半導体層を基板上に形成
してしまった後、さらにこの半導体中に活性水素を添加
することにより半導体層中の不対結合手を中和、除去す
るためにこの(35)より水素(IIよ)を導入しても
よい。かくのごとき水素の誘導アニールにより半導体層
中には10〜5o原子%の水素が添加できた。この水素
の代わりにハロゲン元素を添加しても不対結合手の中和
・除去に効果があった。この誘導ア三−ルは温度は珪素
にあっては250℃以下、炭化珪素にあっては350
℃以下であることが好ましく、これらの温度以上では添
加された水素が再放出され、5i−H結合、C−H結合
がとれてしまう傾向があった。Moreover, even if this carbide is not used, ammonia (Nl+, ), hydrazine (NLll,
) may be used. Nitrogen, which is generally inexpensive, is used as an inert gas for purging, but after the semiconductor layer has been formed on the substrate, active hydrogen can be added to the semiconductor to eliminate unpaired atoms in the semiconductor layer. Hydrogen (II) may be introduced from this (35) in order to neutralize and remove the bond. By such induction annealing of hydrogen, 10 to 50 atomic % of hydrogen could be added into the semiconductor layer. Adding a halogen element instead of hydrogen was effective in neutralizing and removing dangling bonds. The temperature of this induction aryl is below 250°C for silicon and 350°C for silicon carbide.
It is preferable that the temperature is below .degree. C.; above these temperatures, added hydrogen tends to be re-released and 5i-H bonds and C-H bonds are broken.
反応炉中の基板温度は室温〜350°Cを用いた。The substrate temperature in the reactor was room temperature to 350°C.
もちろん室温〜500°Cであってもよい。しかし基板
に対する温度制御が材料制限をもたらすため室温〜30
0℃が実用的に好ましかった。Of course, the temperature may be from room temperature to 500°C. However, since temperature control for the substrate brings about material limitations,
0°C was practically preferred.
反応生成物は反応炉内の圧力との関係で決められるが、
被膜の厚さはそれ以上の厚い層にまで均質に形成するこ
とができた。半導体被膜の成長速度は、10人/分〜1
μ/分であり、それは圧力が0.01〜1Qtorrと
変えることにより、またエキサイタのマイクロ波エネル
ギまたは反応炉の高周波エネルギを調節することにより
実施できノこ。The reaction products are determined in relation to the pressure inside the reactor, but
The film could be formed evenly thicker than that. The growth rate of the semiconductor film is 10 people/min to 1
μ/min, which can be carried out by changing the pressure from 0.01 to 1 Qtorr and by adjusting the microwave energy of the exciter or the high frequency energy of the reactor.
本発明の半導体装置は以下の大きなプリセス上の特徴を
見いだした故に成就できたものである。The semiconductor device of the present invention was achieved because the following major process characteristics were discovered.
即ち、第1に反応炉が減圧であるため、反応性気体また
は反応生成物の平均自由」二程が太き(、そのため凹部
の内部にまでも十分に飛翔し得ること、また反応炉に前
置してエキサイタを設けたため、反応性気体が互いに完
全に混合し、化学量論的に均質な反応生成物ができるこ
と。Firstly, because the reactor is under reduced pressure, the mean freedom of the reactive gas or reaction product is about 20% thick (therefore, it is possible to sufficiently fly into the interior of the recess, and there is Because an exciter is installed at the same time, the reactive gases mix completely with each other, resulting in stoichiometrically homogeneous reaction products.
第2にその反応性気体またはエネルギ的にきわめて高く
励起された状態であるため、基板の凹凸の高低差が0.
1〜1μのごとき細かいあらさのみならず、10μまた
はそれ以上特に容器状をしていてもあらゆる部分の表面
に均一に被膜化すること。Secondly, because the reactive gas or energy is extremely excited, the height difference between the unevenness of the substrate is 0.
Not only fine roughness such as 1 to 1μ, but also 10μ or more, especially even if the surface is shaped like a container, can be coated uniformly on the surface of all parts.
第3に基板そのものを抵抗加熱等で加熱させるため、基
板の表面の温度に対しての被膜化の温度は鈍感であり、
かつ基板の温度が室/l!!〜200℃または350″
Cであるため、基板の各部の表面の温度が不均一になり
にくく、その結果、被膜の膜厚の不均一さを助長しない
。Thirdly, since the substrate itself is heated by resistance heating etc., the coating temperature is insensitive to the temperature of the substrate surface.
And the temperature of the board is room/l! ! ~200℃ or 350″
C, the temperature of the surface of each part of the substrate is unlikely to become non-uniform, and as a result, non-uniformity in the film thickness of the film is not promoted.
第4に第2図は横型反応炉で示したが、これば縦型であ
っても、または基板を移動し得る可動式の連続炉であっ
ても作製可能であり、換言すれば反応性気体の入り口側
に被膜が多量に形成され、その裏面には少しも形成させ
ないことが可能である。Fourth, although Fig. 2 shows a horizontal reactor, it is also possible to create a vertical reactor or a movable continuous reactor in which the substrate can be moved.In other words, reactive gas It is possible to form a large amount of film on the inlet side, and not to form any film on the back side.
これらの多くの特長を実験的に得たために本発明構想の
半導体装置が発明されたものである。もちろん本発明で
いう均一度とは膜厚のばらつきが一般に±5%以内であ
り、電気的特性が被膜の不均一さを考慮しなくてよい程
度であることを意味する。The semiconductor device of the present invention was invented because many of these features were experimentally obtained. Of course, uniformity as used in the present invention means that the variation in film thickness is generally within ±5%, and that the electrical characteristics are such that it is not necessary to take into account the non-uniformity of the film.
以上のごと(、減圧気相法またはプラズマ気相法は反応
炉中の圧力により反応炉内にグロー放電が発生しグロー
放電法ということもできる。As described above, the reduced pressure vapor phase method or the plasma vapor phase method can also be called a glow discharge method in which glow discharge occurs in the reactor due to the pressure in the reactor.
第3図は本発明の半導体装置の実施例である。FIG. 3 shows an embodiment of the semiconductor device of the present invention.
(A)、(B)は第1図の(A >、(13>において
示した通りであり、(43)より光か照射されている。(A) and (B) are as shown in (A> and (13>) in FIG. 1, and are irradiated with light from (43).
第3図()3)は基板(41)の−主面の1(〕J低差
<44)が1μ以上例えば1.mm以上を有している。FIG. 3 () 3) shows that 1 (J height difference < 44) of the − main surface of the substrate (41) is 1 μ or more, for example, 1. mm or more.
この凹凸の表面に半導体1m (42)を形成さゼたも
のである。A semiconductor 1m (42) was formed on this uneven surface.
第3図(D)は容器状をしており、その一部には穴があ
いた構造である。室内の置き時計等がその一例である。FIG. 3(D) shows a container-like structure with a hole partially formed. An example is an indoor table clock.
以下に本発明の半導体装置の具体例を示し、本発明の内
容を補完する。Specific examples of the semiconductor device of the present invention will be shown below to supplement the content of the present invention.
具体例1
基板としてガラス(厚さ1.1mm )を用い、その上
面には1mmの高低差を有し、四部、凸rfl(の中は
1mmである。その縦断面図は第3図<B)に示され、
その拡大図を第4図に示す。Specific Example 1 Glass (thickness 1.1 mm) is used as a substrate, and its upper surface has a height difference of 1 mm, and there are four convex rfl (inside is 1 mm). Its vertical cross-sectional view is shown in Fig. 3<B. ) is shown in
An enlarged view is shown in FIG.
この上面にスパッタ法でITOを形成せしめ、さらに第
2図に示したプラズマ気相反応装置によりPIN接合を
有する水素が添加された非単結晶半導体を形成した。ITO was formed on the upper surface by sputtering, and a hydrogen-doped non-single crystal semiconductor having a PIN junction was formed using the plasma vapor phase reactor shown in FIG.
即ち、P型の非単結晶半導体は炭化珪素(厚さ150人
)を形成して、さらにその上面にI型珪素半導体をキャ
リアガスをまったく用いず100%の濃度のシランを用
いた。平均膜厚ば0.7μとした。That is, a P-type non-single-crystal semiconductor was formed of silicon carbide (thickness: 150 mm), and an I-type silicon semiconductor was formed on the upper surface thereof using 100% silane without using any carrier gas. The average film thickness was 0.7μ.
さらにN型の非単結晶半導体ばpH7/ Sil+4
= 1%として500への平均厚さに積層した。裏面電
極はアルミニュームとした。非単結晶半導体の形成にお
ける反応条件は、基板温度210 ℃、高周波出力3.
50MHz 、圧力0.1torr 、被膜成長速度9
0人/分である。f’fられた特性は、開放電圧0.6
V、短絡電流20μ八、曲線因子0.48、変換効率3
,7%であった。Furthermore, N-type non-single crystal semiconductor has a pH of 7/Sil+4.
= 1% and laminated to an average thickness of 500. The back electrode was made of aluminum. The reaction conditions for forming a non-single crystal semiconductor are a substrate temperature of 210°C and a high frequency output of 3.0°C.
50MHz, pressure 0.1torr, film growth rate 9
0 people/minute. f'f characteristic is open circuit voltage 0.6
V, short circuit current 20μ8, fill factor 0.48, conversion efficiency 3
,7%.
具体例2
第4図において、本発明構造の凹凸表面に形成される被
膜の均一度調査用のモニタ基j& (41)に対し、具
体例1のプロセス条件にて半導体膜を形成した。Concrete Example 2 In FIG. 4, a semiconductor film was formed under the process conditions of Concrete Example 1 on a monitor substrate j& (41) for investigating the uniformity of a film formed on the uneven surface of the structure of the present invention.
基板は凹凸の高低差(14)は1mm、凹部、凸部は全
て1mmとした。かかる基板上に前記した非単結晶珪素
を形成して被膜の均一性を調べた。その結果は以下の如
くである。The height difference (14) of the unevenness of the substrate was 1 mm, and the concave portions and convex portions were all 1 mm. The above-mentioned non-single crystal silicon was formed on such a substrate, and the uniformity of the film was examined. The results are as follows.
凸部の表面(11) 0.8μ
凹部の表面(13) O’、7μ
凹凸の側面(12) 0.6μ
この値は従来のキャリアガスを多量に用いた方法におい
ては
凸部の表面 1.0〜1.1 μ
四部の表面 0.6〜0.7μ
凹凸の側面 0.1〜0.5μ
と特に大きくばらついてしまったごとに較べると著しく
進歩特性を有する。そのため初めて具体例1に示した如
き光電変換装置の特性を得ることができた。Surface of convex part (11) 0.8μ Surface of concave part (13) O', 7μ Side surface of concavo-convex part (12) 0.6μ This value is the surface of convex part in the conventional method using a large amount of carrier gas. 0 to 1.1 μ Surface of four parts 0.6 to 0.7 μ Side surface of unevenness 0.1 to 0.5 μ Therefore, the characteristics of the photoelectric conversion device as shown in Example 1 could be obtained for the first time.
本発明において基板はガラス、セラζノクス、金属板等
の固い材料であるものがその代表的な例である。しかし
ポリイミド樹脂等の可曲性基板であってもよいことはい
うまでもない。また弾力性を有する基板であってもよい
。In the present invention, a typical example of the substrate is a hard material such as glass, ceramic ζnox, or a metal plate. However, it goes without saying that a flexible substrate such as polyimide resin may also be used. Alternatively, the substrate may have elasticity.
なお本発明で意味する非単結晶半導体材料は単に珪素、
炭化珪素のみではなく、その他の化合物半導体であって
もよい。Note that the non-single-crystal semiconductor material meant in the present invention simply refers to silicon,
Not only silicon carbide but also other compound semiconductors may be used.
本発明の特徴は凹凸の基板表面の一部または全部に非単
結晶半導体の層を設け、かかる層を用いて光電変換素子
または発光素子を設iJたもので、100vの商用電圧
源より1.5〜6vの所定の低電圧を1−ランスを用い
ずに発生させることができた。さらにそれを利用してラ
ジオ、カリキュレータの充電を行い、加衣てかかるラジ
オ、カリキュレータに
の表面または警部に例えば凹状のケースの内側に密着し
て光電変換素子を設りることを特徴としている。The feature of the present invention is that a layer of a non-single crystal semiconductor is provided on a part or all of the uneven substrate surface, and a photoelectric conversion element or a light emitting element is provided using this layer. A predetermined low voltage of 5 to 6 V could be generated without using a lance. Furthermore, the battery is used to charge the radio or calculator, and a photoelectric conversion element is provided on the surface of the radio or calculator on which the user rests or in close contact with the inside of a concave case, for example.
本発明のかかる凹凸の容器等に密着してフォトセル、太
陽電池、螢光灯電池を設けることは工業的にもきわめて
大きな応用を開(ものであると信じる。It is believed that the provision of a photocell, solar cell, or fluorescent lamp battery in close contact with such an uneven container according to the present invention will have extremely large industrial applications.
第1図は本発明を実施するための光電変換装置の実施例
である。
第2図は本発明の半導体装置の作製方法を示すである。
(A) (8ン
架1■
y2(2)FIG. 1 shows an embodiment of a photoelectric conversion device for carrying out the present invention. FIG. 2 shows a method for manufacturing a semiconductor device of the present invention. (A) (8-inch rack 1■ y2 (2)
Claims (1)
窓または凹凸表面を有する屋根の一部であって、任意の
形状の基板上に、水素またはハロゲン元素が添加された
非単結晶半導体層を形成することにより、光電変換を行
うことを特徴とする半導体装置。 2、特許請求の範囲第1項において、基板は固いまたは
弾力性を有するものであって、基板の内側または外面に
PN接合、I”IN接合またはショットキ接合を有する
非単結晶半導体層を設けたことを特徴とする半導体装置
。 3、特許請求の範囲第1項において、凹凸の程度が少な
くとも10μ以上を有することを特徴とする半導体装置
。[Claims] 1. Hydrogen or halogen elements are added onto a substrate of any shape, which is a container such as a plate, a pot, or a cup, an electric light umbrella, a glass window, or a part of a roof having an uneven surface. A semiconductor device characterized in that it performs photoelectric conversion by forming a non-single crystal semiconductor layer. 2. In claim 1, the substrate is hard or elastic, and a non-single crystal semiconductor layer having a PN junction, an I''IN junction, or a Schottky junction is provided on the inside or outside of the substrate. 3. A semiconductor device according to claim 1, characterized in that the degree of unevenness is at least 10 μm or more.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59055178A JPH0636432B2 (en) | 1984-03-21 | 1984-03-21 | Photoelectric conversion semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59055178A JPH0636432B2 (en) | 1984-03-21 | 1984-03-21 | Photoelectric conversion semiconductor device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2217479A Division JPS55115376A (en) | 1979-02-26 | 1979-02-26 | Semiconductor device and manufacturing thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6057679A true JPS6057679A (en) | 1985-04-03 |
JPH0636432B2 JPH0636432B2 (en) | 1994-05-11 |
Family
ID=12991466
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP59055178A Expired - Lifetime JPH0636432B2 (en) | 1984-03-21 | 1984-03-21 | Photoelectric conversion semiconductor device |
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Citations (9)
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---|---|---|---|---|
JPS5337718A (en) * | 1976-09-21 | 1978-04-07 | Asahi Glass Co Ltd | Laminated glass with heating wire incorporated therein |
JPS5342693A (en) * | 1976-09-29 | 1978-04-18 | Rca Corp | Semiconductor device including amorphous silicone layer |
JPS53143180A (en) * | 1977-05-18 | 1978-12-13 | Energy Conversion Devices Inc | Amorphous semiconductor structure and method of producing same |
JPS54242A (en) * | 1977-03-12 | 1979-01-05 | Kato Kaken Yuugen | Method of recovering solar energy |
JPS5413651A (en) * | 1977-07-02 | 1979-02-01 | Nippon Soken Inc | House ventilating device |
JPS5425187A (en) * | 1977-07-28 | 1979-02-24 | Rca Corp | Photoelectric semiconductor |
JPS5429990A (en) * | 1977-08-10 | 1979-03-06 | Nippon Soken | Automotive solar battery |
JPS55115376A (en) * | 1979-02-26 | 1980-09-05 | Shunpei Yamazaki | Semiconductor device and manufacturing thereof |
JPS56152276A (en) * | 1980-04-25 | 1981-11-25 | Teijin Ltd | Solar cell made of amorphous silicon thin film |
-
1984
- 1984-03-21 JP JP59055178A patent/JPH0636432B2/en not_active Expired - Lifetime
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5337718A (en) * | 1976-09-21 | 1978-04-07 | Asahi Glass Co Ltd | Laminated glass with heating wire incorporated therein |
JPS5342693A (en) * | 1976-09-29 | 1978-04-18 | Rca Corp | Semiconductor device including amorphous silicone layer |
JPS54242A (en) * | 1977-03-12 | 1979-01-05 | Kato Kaken Yuugen | Method of recovering solar energy |
JPS53143180A (en) * | 1977-05-18 | 1978-12-13 | Energy Conversion Devices Inc | Amorphous semiconductor structure and method of producing same |
JPS5413651A (en) * | 1977-07-02 | 1979-02-01 | Nippon Soken Inc | House ventilating device |
JPS5425187A (en) * | 1977-07-28 | 1979-02-24 | Rca Corp | Photoelectric semiconductor |
JPS5429990A (en) * | 1977-08-10 | 1979-03-06 | Nippon Soken | Automotive solar battery |
JPS55115376A (en) * | 1979-02-26 | 1980-09-05 | Shunpei Yamazaki | Semiconductor device and manufacturing thereof |
JPS56152276A (en) * | 1980-04-25 | 1981-11-25 | Teijin Ltd | Solar cell made of amorphous silicon thin film |
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Publication number | Publication date |
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JPH0636432B2 (en) | 1994-05-11 |
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