JPS6054773B2 - Impurity diffusion method into semiconductor wafers - Google Patents

Impurity diffusion method into semiconductor wafers

Info

Publication number
JPS6054773B2
JPS6054773B2 JP13003879A JP13003879A JPS6054773B2 JP S6054773 B2 JPS6054773 B2 JP S6054773B2 JP 13003879 A JP13003879 A JP 13003879A JP 13003879 A JP13003879 A JP 13003879A JP S6054773 B2 JPS6054773 B2 JP S6054773B2
Authority
JP
Japan
Prior art keywords
source
solid
diffusion
impurity
impurity diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13003879A
Other languages
Japanese (ja)
Other versions
JPS5655038A (en
Inventor
憲次 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13003879A priority Critical patent/JPS6054773B2/en
Publication of JPS5655038A publication Critical patent/JPS5655038A/en
Publication of JPS6054773B2 publication Critical patent/JPS6054773B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Description

【発明の詳細な説明】 本発明は、不純物源として固体ソース、特にボロンナイ
トライドを使用する半導体ウエハヘの不純物拡散法に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of impurity diffusion into semiconductor wafers using a solid state source, particularly boron nitride, as the impurity source.

従来、シリコン(Si)を使用した半導体素子製造にお
いて半導体に不純物を導入したり、接合を形成したりす
る際には拡散、エピタキシャル成長、合金法等が実施さ
れている。
Conventionally, in the manufacture of semiconductor devices using silicon (Si), diffusion, epitaxial growth, alloying methods, etc. have been used to introduce impurities into semiconductors or form junctions.

このうち拡散法による不純物導入や接合形成に使用され
るドーパントとしては、金属ガリウム(Ga)、ボロン
ナイトライド(BN)、赤りん等の固体ドーパント、あ
るいはオキシΞ塩化りん(P0C13)等の液体ドーパ
ントなどがよく使用されている。第1図および第2図は
、板状の固体BNを不純物ソースとした場合の半導体基
体への不純物導入法を説明するための図で、1は拡散管
、2はホルダー、3は固体BNソース、4はシリコンウ
ェハである。
Among these, dopants used for impurity introduction and bond formation by diffusion methods include solid dopants such as metallic gallium (Ga), boron nitride (BN), and red phosphorus, and liquid dopants such as phosphorus oxyΞ chloride (P0C13). etc. are often used. Figures 1 and 2 are diagrams for explaining the method of introducing impurities into a semiconductor substrate when plate-shaped solid BN is used as an impurity source, where 1 is a diffusion tube, 2 is a holder, and 3 is a solid BN source. , 4 are silicon wafers.

明らかなように、第1図の例では固体BNソース3とシ
リコンウェハ4とが交互にホルダー2上にセットされて
いるのに対し、第2図の例ではホルダー2にセットされ
たシリコンウェハ4を取囲むように固体BNソース3が
配置されている。
As is clear, in the example of FIG. 1, the solid BN source 3 and the silicon wafers 4 are set alternately on the holder 2, whereas in the example of FIG. A solid BN source 3 is arranged so as to surround the solid BN source 3.

これらの図に示す様に、拡散管(石英管、Si管、Si
C管等)1内に多数のシリコンウェハ4および、固体B
Nソース3をセットし、拡散管1内を不活性化ガス雰囲
気又は真空(減圧)状態にし、高温状態に保持してシリ
コンウェハ4に不純物(ボロン)をドーピングする訳で
ある。
As shown in these figures, diffusion tubes (quartz tube, Si tube, Si
C tube, etc.) 1 contains a large number of silicon wafers 4 and a solid B
The N source 3 is set, the inside of the diffusion tube 1 is brought into an inert gas atmosphere or a vacuum (reduced pressure) state, and the silicon wafer 4 is doped with an impurity (boron) while being maintained at a high temperature.

ここで使用される温度は8囲℃〜1300℃、不活性化
ガス圧は上記ドーピング温度で拡散管内が大気圧に等し
くなる圧力、真空(減圧)は10−”〜10−0tor
rが普通に使用される。このように、不純物ソースとし
て固体BNを使用する方法では拡散温度、時間及び雰囲
気を制御することにより所定の不純物表面濃度及び濃度
プロフィールを得ていた。
The temperature used here is 8°C to 1300°C, the inert gas pressure is the pressure that makes the inside of the diffusion tube equal to atmospheric pressure at the above doping temperature, and the vacuum (reduced pressure) is 10-" to 10-0 torr.
r is commonly used. As described above, in the method of using solid BN as an impurity source, a predetermined impurity surface concentration and concentration profile are obtained by controlling the diffusion temperature, time, and atmosphere.

しかしながら、このように特性(不純物濃度)の異なる
半導体素子を製造する毎に拡散温度を変化させていては
工数の増大’となつて作業が煩雑となるばかりでなく、
設備(拡散炉等)の回転(利用)率が低下するのて得策
ではない。又、拡散雰囲気を変えることも設備の共用性
をなくし、上記の炉温変化の時と同じ欠点が出てく・る
However, changing the diffusion temperature each time semiconductor elements with different characteristics (impurity concentrations) are manufactured not only increases the number of man-hours and makes the work complicated.
It is not a good idea to reduce the rotation (utilization) rate of equipment (diffusion furnace, etc.). Furthermore, changing the diffusion atmosphere also eliminates the commonality of equipment, resulting in the same drawbacks as the above-mentioned change in furnace temperature.

さらにまた、拡散条件の複雑な変更、制御は作業間違い
の原因ともなり易いという欠点がある。のみならず、最
近になつてさらに、ソースとしての固体BNの製造ロッ
ドが変わると、これから得られる不純物の表面濃度が変
化する現象が見られ、上記の温度、時間、雰囲気以外に
、固体BNソースの特性によつても不純物表面濃度が影
響を受けていることが判明して来た。本発明の目的は、
前述した従来技術の欠点を無くし、安定した不純物表面
濃度を得、ひいては安定した素子特性を得るような不純
物拡散法を提供するにある。
Furthermore, there is a drawback that complicated changes and control of diffusion conditions are likely to cause operational errors. In addition, recently, it has been observed that when the production rod of solid BN as a source changes, the surface concentration of impurities obtained from it changes. It has become clear that the impurity surface concentration is also influenced by the characteristics of The purpose of the present invention is to
It is an object of the present invention to provide an impurity diffusion method that eliminates the drawbacks of the prior art described above, obtains a stable impurity surface concentration, and, in turn, obtains stable device characteristics.

本発明は、半導体ウェハの表面における拡散不純物の濃
度が、ソースとしての固体BNの密度に依存するという
事象の発見に基づいてなされたものであり、半導体ウェ
ハ表面における不純物の濃度を安定化するにあたり、板
状固体BNソース表面の密度および酸化量に着目したも
のである。
The present invention was made based on the discovery that the concentration of diffused impurities on the surface of a semiconductor wafer depends on the density of solid BN as a source. , which focuses on the density and oxidation amount of the surface of a plate-shaped solid BN source.

すなわち本発明は、固体BNソースの密度をある特定値
に保持することによつて、温度、時間、雰囲気等の他の
拡散条件を変更することなしに、半導体ウェハ表面にお
ける不純物濃度を所望値に安定化しようとするものであ
る。本発明者は、固体BNソースの密度と拡散後のシリ
コン表面の不純物濃度との相関を確認する事より始めた
In other words, the present invention maintains the density of the solid BN source at a specific value, thereby increasing the impurity concentration on the semiconductor wafer surface to a desired value without changing other diffusion conditions such as temperature, time, atmosphere, etc. This is an attempt to stabilize the situation. The inventor started by confirming the correlation between the density of the solid BN source and the impurity concentration on the silicon surface after diffusion.

この結果が第3図に示すグラフである。このグラフは、
第1,2図に示した拡散炉を用いて、濃度11000C
f)N2ガス雰囲気中でドーピングを行つた後、約50
μmの拡散層を得る1150〜1300′C後で引伸し
拡散を実施した半導体素子について得られたものである
。なお、固体BNソースとしては、使用前に1150℃
の酸素ガス雰囲気中で数時間空焼処理を行つたものを使
用した。第3図から明らかなように、固@3Nソースの
密度が高いほど、シリコンウェハ表面の不純物濃度が低
く、逆に密度が低いほど表面不純物濃度が高いという結
果が得られた。
This result is the graph shown in FIG. This graph is
Using the diffusion furnace shown in Figures 1 and 2, the concentration was 11000C.
f) After doping in N2 gas atmosphere, about 50
This was obtained for a semiconductor device subjected to stretching diffusion after heating at 1150 to 1300'C to obtain a .mu.m diffusion layer. In addition, the solid BN source should be heated to 1150℃ before use.
The specimens were air-fired for several hours in an oxygen gas atmosphere. As is clear from FIG. 3, the higher the density of the solid @3N source, the lower the impurity concentration on the silicon wafer surface, and conversely, the lower the density, the higher the surface impurity concentration.

これは、固体BNソースがドーパントとして働一く際は
、ボロン単独又はBNとして作用するのではなく、他の
形態、すなわち使用前の酸素ガス処理によりBNソース
の表面が酸化されてボロンの酸化物(B2O3等)が形
成され、これがシリコンウェハにデポジットされている
ためであると考え−られる。
This is because when a solid BN source acts as a dopant, boron does not act alone or as BN, but in other forms, i.e., the surface of the BN source is oxidized by oxygen gas treatment before use, resulting in boron oxides. It is thought that this is because (B2O3, etc.) is formed and deposited on the silicon wafer.

つまり、固体BNソースの表面の酸化量が多いとシリコ
ンウェハ表面における不純物濃度が高くなり、逆に酸化
量が少いと不純物濃度が低くなるということになる。
In other words, if the amount of oxidation on the surface of the solid BN source is large, the impurity concentration on the silicon wafer surface will be high, and conversely, if the amount of oxidation is small, the impurity concentration will be low.

これを証明する事象として、予め酸化処理を行なわない
固体BNソースを使用すると、シリコンウェハの表面不
純物濃度が極端に低下することがあげられる。そこで何
故密度の低いBNの方が、表面の酸化量が多いかという
ことであるが、これは固体BNソースの表面の拡大観察
にて明らかにされた。
An event that proves this is that when a solid BN source without prior oxidation treatment is used, the surface impurity concentration of the silicon wafer is extremely reduced. The question is why BN with a lower density has a larger amount of oxidation on its surface, and this was clarified by magnified observation of the surface of a solid BN source.

本発明者の観察によれば、密度の低い固体BNソースで
は、その表面が粗く、すなわち表面積が大き″く、密度
の高いものは表面が滑らかで表面積は小さいことが分つ
た。表面積の大きいものは、酸化処理時における酸素ガ
スの取込み量が多く、従つて、シリコンウェハにデポジ
ットされる酸化ホウ素の量が多くなり、ひいては不純物
濃度が高くなるということになる。以上に詳述した事実
に基づき、本発明は、不純物ソースとして用いる固体B
Nの密度と、ある特定の拡散条件(温度、雰囲気、ドー
パント種など)の下で得られるシリコンウェハ表面の不
純物濃度との関係(第3図に示したような)を予め求め
ておき、これに準処して、その密度を所望の表面不純物
濃度が得られる値に予め調整もしくは選定された固体B
Nを不純物ソースとして用い、前記特定の条件下で拡散
を行なうものてある。
According to the inventor's observations, it was found that solid BN sources with low density have a rough surface, that is, have a large surface area, while those with high density have a smooth surface and a small surface area.Those with a large surface area In this case, a large amount of oxygen gas is taken in during the oxidation process, and therefore a large amount of boron oxide is deposited on the silicon wafer, which results in a high impurity concentration.Based on the facts detailed above. , the present invention provides solid B used as an impurity source.
The relationship (as shown in Figure 3) between the density of N and the impurity concentration on the silicon wafer surface obtained under certain diffusion conditions (temperature, atmosphere, dopant species, etc.) is determined in advance, and this relationship is determined in advance. Solid B whose density is adjusted or selected in advance to a value that provides a desired surface impurity concentration in accordance with
There is a method in which N is used as an impurity source and diffusion is performed under the above-mentioned specific conditions.

このようにすることにより、希望の表面不純物濃度が再
現性よく得られるようになり、素子特性のばらつきを最
小限に抑える事が可能となつた。なお、本発明の実施に
あたつては、密度の低い(約1.80以下の)固体BN
を用いた場合には高不純物濃度が得られる反面、シリコ
ンウェハやホルダーとの反応性が強くなるので、予めB
NソースのN2ガス雰囲気での空焼(800〜1100
スC)を行つてその反応性を弱めて使用したり、BNソ
ースとホルダーとの接触面積を極力少くしたり、あるい
は安価な使い捨て冶具を使用する等の考慮が必要である
。尚、第2図の実施例に示すように、シリコンウェハ4
を取囲むように固体BNソース3を配置すると、ホルダ
ー2へのシリコンウェハ4の同時セット枚数を多くする
ことができる。
By doing so, it became possible to obtain a desired surface impurity concentration with good reproducibility, and it became possible to minimize variations in device characteristics. In carrying out the present invention, solid BN with low density (approximately 1.80 or less) is used.
When using B, a high impurity concentration can be obtained, but the reactivity with the silicon wafer and holder becomes strong, so B
Air firing in N2 gas atmosphere using N source (800~1100
It is necessary to consider such things as conducting step C) to weaken the reactivity, minimizing the contact area between the BN source and the holder, or using an inexpensive disposable jig. Incidentally, as shown in the embodiment of FIG.
By arranging the solid BN source 3 so as to surround the holder 2, the number of silicon wafers 4 set simultaneously on the holder 2 can be increased.

以上の説明から明らかなように本発明によれば、温度、
雰囲気等の、他の特性に大きな影響を与える拡散条件を
変えることなく、安定した表面不純物量を得ることがで
きる。
As is clear from the above description, according to the present invention, temperature,
A stable amount of surface impurities can be obtained without changing the diffusion conditions, such as the atmosphere, which greatly affect other characteristics.

のみならず、以上のように、不純物の所要表面濃度の異
なる半導体ウェハを製造する際にも、拡散条件(温度、
時間、雰囲気等)を変更する必要がないので、現場での
作業が簡略化されて拡散炉の利用率が向上し、誤操作等
のおそれもなくなる。
In addition, as mentioned above, when manufacturing semiconductor wafers with different required surface concentrations of impurities, diffusion conditions (temperature,
Since there is no need to change the time, atmosphere, etc.), on-site work is simplified, the utilization rate of the diffusion furnace is improved, and there is no risk of erroneous operation.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図は固体不純物ソースを用いる拡散炉
の概略図、第3図はソースとしての固体BNの密度とシ
リコンウェハ表面の不純物濃度との関係例を示す図であ
る。 1・・・・・・拡散管、2・・・・・・ホルダー、3・
・・・・・固体BNX/iス、4II●●●◆シリコン
ウェハ。
1 and 2 are schematic diagrams of a diffusion furnace using a solid impurity source, and FIG. 3 is a diagram showing an example of the relationship between the density of solid BN as a source and the impurity concentration on the surface of a silicon wafer. 1...Diffusion tube, 2...Holder, 3.
...Solid BNX/iS, 4II●●●◆Silicon wafer.

Claims (1)

【特許請求の範囲】[Claims] 1 固体ボロンナイトライドをソースとする半導体ウエ
ハへの不純物拡散法において、密度を選択し酸化処理を
施した固体ボロンナイトライドを用いることにより所望
のウェハ表面不純物濃度を得ることを特徴とする半導体
ウエハへの不純物拡散法。
1. A semiconductor wafer characterized in that a desired wafer surface impurity concentration is obtained by using solid boron nitride that has been subjected to oxidation treatment with a selected density in a method of impurity diffusion into a semiconductor wafer using solid boron nitride as a source. impurity diffusion method.
JP13003879A 1979-10-11 1979-10-11 Impurity diffusion method into semiconductor wafers Expired JPS6054773B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13003879A JPS6054773B2 (en) 1979-10-11 1979-10-11 Impurity diffusion method into semiconductor wafers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13003879A JPS6054773B2 (en) 1979-10-11 1979-10-11 Impurity diffusion method into semiconductor wafers

Publications (2)

Publication Number Publication Date
JPS5655038A JPS5655038A (en) 1981-05-15
JPS6054773B2 true JPS6054773B2 (en) 1985-12-02

Family

ID=15024593

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13003879A Expired JPS6054773B2 (en) 1979-10-11 1979-10-11 Impurity diffusion method into semiconductor wafers

Country Status (1)

Country Link
JP (1) JPS6054773B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4661177A (en) * 1985-10-08 1987-04-28 Varian Associates, Inc. Method for doping semiconductor wafers by rapid thermal processing of solid planar diffusion sources
JPH02222136A (en) * 1989-02-23 1990-09-04 Shin Etsu Chem Co Ltd Boron diffusing agent

Also Published As

Publication number Publication date
JPS5655038A (en) 1981-05-15

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