JPS6054456A - Forming method of bump electrode - Google Patents

Abstract

PURPOSE:To increase the bonding strength of a bump electrode and to reduce the contacting resistance by providing a primary metal on a bonding pad and a bump electrode forming portion of a semiconductor substrate, and covering metal by using a mask which has a small area on the pad and a mask which has a large area on the electrode when covering the metals. CONSTITUTION:An SiO2 film 22 is covered on a semiconductor substrate 21, a primary metal 23 to become a bonding pad and a primary metal 24 to become a bump electrode are formed thereon, an SiO2 film 25 is covered on the overall surface, and holes are opened corresponding to the metals 23, 24. Then, a bonding aluminum layer 26 is covered while burying the holes, and a laminated film which is formed of a Ti film 28 and a Pt film 29 are formed corresponding to the metals 23, 24. A thick photoresist film 212 is coated on the overall surface, and a mask 213 which has a hole 214 smaller than the metal 23 and a hole 216 larger than the metal 24 is formed thereon. Then, a hole is formed at the film 212 by exposing and developing, and a pad metal 217 and an electrode metal 218 are buried thereat.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a method for forming bump electrodes to be formed in bonding pad regions necessary for mounting semiconductor devices.

(Prior art) There are two methods for mounting semiconductor devices: bonding thin gold or aluminum wires to bonding pads of semiconductor devices using a wire bonding device, and bonding techniques for hybrid integrated circuits (
In terms of mounting technology for hybrid ICs, packages with multiple pin structures, and multi-chip, there are two bonding methods, which differ from conventional products in that bump electrodes are formed on the bonding pads and do not use thin wires like the former. .

Next, a conventional manufacturing method for forming the latter bump electrode will be explained.

Photolithography, which is a general semiconductor device manufacturing process, is a mark (hereinafter referred to as alignment mark) used for mask alignment when aligning a mask substrate to a silicon substrate.
is made so that the alignment marks on the mask substrate are sequentially aligned with the alignment marks (base alignment marks) formed on the silicon substrate by photolithography, and the alignment marks are aligned in sequence, horizontally, and next to each other according to the process order. Align with the alignment mark.

However, in the manufacturing process of the bump electrode, the photolithographic alignment marks are sequentially overlapped and aligned with the base alignment marks of the silicon substrate of the semiconductor device according to the process order.

In other words, one alignment mark (base) is aligned with the alignment mark of the mask substrate in the next process in terms of size, and the same alignment mark is overlapped in the next process as well. The relationship is such that the size of the base alignment mark is large and the size of the alignment mark on the side to be matched (mask substrate) is small, and in this case, the size gradually becomes smaller in the process order.

The relationship between the large size and the small size is called a margin, which is 3 to 5 μm in the bump electrode manufacturing process.

FIG. 1(a) shows a cross-sectional view of a bump electrode manufactured by such a manufacturing method. In FIG. 1(a), 1 is a substrate (wafer) of a semiconductor device, 2 is a silicon oxide film, and 3 is a metal of a bonding pad portion 100, which is a bump electrode forming region.

Further, 4 is a mask alignment area on which a pattern 11-1 is formed with the metal of the mask alignment mark portion 200, and is used as an alignment mark for the mask substrate in photolithography in the bump electrode manufacturing process. The metal in both cases is aluminum.

A surface protection film 5 is formed on the silicon oxide film 2. The surface preservation film 5 is formed of an Si02 film and a PSG film.

Said bump electrode formation area 3'': and mask alignment area 4
Bonding metals 6 and 6' are formed on top, respectively. These joining metals 6.6' are aluminum;
It is 0.8 μm to 1.0 μm.

Joint metal a, 6'-, K It'J: respectively i
A diffusion prevention metal 7.7' of the '1 bump electric metal is formed.

This diffusion prevention metal 7.7' has a two-layer structure.

Metal materials are generally Ti 0.1-0.2 μm 1PL
O, 1 to 0.3 μm.

8.8' is a bump electrode made of Au or solder. In addition,
Reference numeral 9 denotes a gap formed between the bump electrodes [8, 8' and the diffusion prevention metal 7°7'.

The Gump electrode manufactured with the materials and structure described above is
There is a problem with the mask alignment area.

As described above, there are various reasons why it is not possible to align the bump electrodes 8, 8 in sequence with one alignment mark.
During the manufacturing process, metal material remains on the substrate as alignment marks (patterns).

Alignment marks are placed around each chip,
In order to prevent this remaining metal material from peeling off, stack it up and press it down1.However, the alignment marks should be made by matching the large and small parts.When the bump electrodes 8 and 8' have been formed, A matching mark (pattern) smaller than the matching mark (pattern) created is completed.

The reason why there were so many problems if small alignment marks were not used is that when the bump electrode is formed on the top of the surface protection film 5, the pressure (load) from the top side causes the surface protection film to be damaged during the mounting stage. This was due to cracks appearing in 5.

In particular, since the mask alignment area 4 is located around the chip, cracks are likely to occur, and organic solvents and H,0 used in the mounting stage can enter through the cracks, and the underlying metal (aluminum) is likely to corrode.

Because of these disadvantages, attempts were made to prevent cracks in the surface protection film 5 by using small alignment marks. However,
As can be seen in Fig. 1(a), the gap 9 is formed by the thickness of the photorenost, which is 3 to 4 μm, and because of that thickness,
The upper surfaces of the bump electrodes 8, 8' are not concave.

This requires strong lead bonding conditions in order to obtain welding strength during the mounting stage.

Cracks in the surface protection film 5 are largely influenced by this lead pounding.

Like the gap 9 in FIG. 1(a), the bump electrodes 8, 81
A gap 9 (like the eaves of the bump electrode) is created under the
As shown in the enlarged view of FIG. 1 (1), this gap 9 is created when the alignment mark is relative to the alignment mark (pattern) on the board.
The small size results in a small photoresist pattern.

This gap 9 is easy to peel off due to fold-like peeling of the metal 7, 7' and the small bonding area of the bump electrode.

If the bump electrode of the alignment mark installed around each chip peels off, or the metal peels off in the form of folds, the peeled metal will come into contact with other electrodes, resulting in electrical short circuits, poor appearance, and quality problems. This results in deterioration of the product and a decrease in yield. .

(Object of the Invention) The present invention was made in order to eliminate these drawbacks, and an object of the present invention is to provide a method for forming a bump electrode that can cover the base metal and prevent the bump electrode from peeling off. shall be.

(Structure of the Invention) A method for forming a bump electrode according to the present invention includes forming an oxide film on a substrate, forming a first metal in the bump electrode formation region and an alignment mark portion of a mask substrate, and forming the first metal After the formation, a protective film is formed, a window is formed at a location corresponding to the first metal, a second metal is formed on the entire surface and bonded to the first metal, and after the formation of this second metal, a second metal is formed. Apply photoresist 1 and bump 1! Holes are opened in the electrode formation area and the alignment mark portion to form a metal for preventing diffusion of the bump electrode metal, and the first photoresist is removed 1-1 After forming this metal for preventing diffusion, the second photoresist is removed.
A second photoresist is applied thickly to the bump electrode forming area and the alignment mark portion, and a second photoresist is exposed through a mask substrate having a pattern larger than the alignment mark on the substrate, and is placed on the metal for preventing diffusion. A bump electrode is formed.

(Example) Hereinafter, an example of the method for forming a bump electrode of the present invention will be described with reference to the drawings. FIG. 2(a) to FIG. 2(g) are process explanatory diagrams of one embodiment.

As shown in FIG. 2(a), the silicon oxide film 22 is formed on the semiconductor substrate 21, and then the pump electrode forming area and the mask substrate are deposited on the metal 23 and 24 of the pond pad butt part. Form the alignment mark part. The metal 24 of the joint mark portion of this mask substrate is patterned from aluminum.

Next, as shown in FIG. 2(b), a surface protective film (5in2 film or PSG film) 25 is formed on the semiconductor substrate 21, and windows 25' are formed in the required portions by photolithography. This window 25' corresponds to the metal 23 of the bump electrode forming area and the metal 24 of the alignment mark portion.

Next, as shown in FIG. 2(c), an aluminum vapor deposition film 26 is formed on the upper surface of the surface protection film 25. This aluminum vapor-deposited film 26 is called a bonding metal. Aluminum vapor deposited film 26
By forming the metal 23 in the bump electrode forming area and the metal 24 in the alignment mark part through the window 25',
electrically connected to.

A photoresist 27 (positive type AZ 1350 J) for photolithography is applied on the aluminum vapor deposited film 26.

Next, as shown in FIG. 2(d), a pattern is formed on the photoresist 27 by photolithography. This pattern 27 corresponds to the metal 23 in the bump electrode formation area shown in -.
Then, the alignment mark portion is patterned to have a hole in a portion corresponding to the metal 24.

Next, metal (Ti) 28 and metal (Pt) 29 are deposited on this patterned photoresist 27. The metal 28 is a metal for preventing diffusion of the bump electrode metal.

Next, as shown in FIG. 2(e), a photoresist 27 is applied.
After removing metal 28. with an organic solvent (acetone).
29 patterns remain. 210 is a bump electrode forming area;
211 is an alignment mark area.

Next, the process moves to the step shown in FIG. 2(f). The process shown in FIG. 2(f) is a characteristic feature of this invention.
After forming the bump electrode forming area 210 and alignment mark area 211 shown in FIG. 2(,), a photoresist 212 is applied to the entire surface. The thickness of this photoresist 212 is 8~
Coat to a thickness of 10 μm. Another feature of this process is that the film thickness of the photoresist 212 is made thicker.
It is formed along the developed pattern.

Next, the mask substrate 213 for photolithography will be explained. 214 is a Cr film on one mask substrate 213, 215 is a bump pattern, 216 is a pattern for mask alignment, and these patterns 215. 216
In both cases, light during exposure passes through the transparent portion, and the photoresist 212 is exposed.

In the figure, portions 215' and 216' indicate exposed areas where the photoresist 212 is exposed through the patterns 215 and 216, respectively.

Here, if the pattern 216 is B, it is larger in size than the alignment mark (base) A on the substrate of the semiconductor device. By using BAA in this manner, the photosensitive portion 216' of the positive type source becomes larger than the alignment mark (pattern) A on the base.

In the next process of forming bump electrodes, the patterned photoresist 212 is used as a protective film, and the bump electrodes are formed in an electrolytic gold plating device or a solder plating device. The bump electrode d2 is formed with an optimum plating line rl' (flowing a current of 5 to 10 mA in steps) with a flat upper surface and a height of 10 to 15 .mu.m.

Next, the state after removing the l/sost 212 with an organic solvent is shown in Figure 2 (gJ).
The metal 217 of the mask alignment mark portion 400 forms the bump electrode 4i11< formation area, and the metal 218 of the mask alignment mark portion 400 forms the mask alignment area/9 bump electrode, and there is no gap between the bump electrode and the diffusion prevention metals 28 and 29. .

Also, unlike conventional methods, there is no interference from photoresist, and the bump electrode has two flat surfaces. The bump phi pole covers the metal for diffusion prevention and is bonded over a wide area.

As explained above, in the first embodiment, since the alignment mark of the mask alignment mark portion is larger than the alignment mark (pattern) on the semiconductor substrate 21 of the semiconductor device, the no. The bump electrode is larger than the original metal and is bent, and is formed in close contact with the metal over a wide area, leaving no gaps, so metal peeling and bump electrodes tend to peel off easily. and no electrical short circuit will occur. Also, metal peeling,
Defects in appearance due to peeling of bump electrodes are eliminated.

Furthermore, since the bump electrode is placed on a flat top surface, bonding can be carried out effectively without any problem in mounting the leads, resulting in improved quality.

In the first embodiment, the formation of bump electrodes was explained in which the mask alignment mark on the mask substrate was larger than the alignment mark on the semiconductor substrate of the semiconductor device. Since the bonding is large in size and in a wide area, the bonding strength is increased and the peeling size is small. By applying this invention to the entire bump electrode formation area (ponding pad part), as shown in Figure 3. (d is the bonding area of the conventional bump electrode and D is the bonding area of the bump electrode of the present invention) The bonding strength of the bump electrode is approximately doubled.

FIG. 3(a) is a sectional view of a bump electrode obtained by the forming method of the present invention, and the third figure 10)) shows the bump electrode obtained by the conventional forming method and the forming method of the present invention. FIG.

In FIG. 3(b), d represents the area (36×10=iJ) of the bump electrode formed by the conventional forming method, and D represents the area (36×10=iJ) of the bump electrode formed by the forming method of the present invention. 96X] (V'rml).

As is clear from this Figure 3 (h), the bonding area is 2
．． 7 times, and the junction resistance is reduced to about 1/3.

In semiconductor devices with bump electrodes, especially for FAX
Like driver ICs, the current value on the output side is large (3
0 to 40 mA), the output low level voltage value (vor) can be lowered due to the decrease in junction resistance,
This leads to improved characteristics, leading to improved quality and yield.

(Effects of the Invention) As described above, according to the method for forming a bump electrode of the present invention, the bump electrode formed by making the size of the mask alignment mark on the mask substrate larger than the alignment mark on the base can be formed on the base. Since it is closely attached to the metal and bonded over a wide area, the metal does not peel off and the bump electrode does not peel off.

Therefore, it will be more effective if this method is applied to the bump electrode of the ponder pad.

The bonding strength between the bump '1 and the pole is increased, the bonding resistance is reduced, and the characteristics are improved, and the upper surface of the bump electrode becomes flat, making lead bonding easier.

[Brief explanation of drawings]

FIG. 1(a) shows a bump electrode formed using the conventional bump electrode formation method. 1-7t Cross-sectional view of bump electrode, Figure 1(b)
I''i An enlarged view of the mask matching portion of the bump electrode in FIG. 1(a), and FIGS. 2(a) to 2(g) each show an example of the method for forming the bump M'j electrode of the present invention. FIG. 3(a) is a cross-sectional view of a bump electrode formed by the bump electrode forming method of the present invention, FIG. 3(b) is a process explanatory diagram of
FIG. 2 is a schematic plan view showing a comparison of the bonding area of bump electrodes between the conventional bump electrode shape/715 method and the bump electrode forming method of the present invention. 21... Substrate of semiconductor device, 22... Silicon oxide film, 23, 24, 27, 28... Metal, 25... Protective film, 25'... Window, 26... Aluminum vapor deposited film, 27
...Photoresist, 210,300...Panda electrode formation area, 211,400...Alignment mark area. Patent Applicant: Oki Electric Industry Co., Ltd. Figure 3 Procedural Amendment January 18, 1980 Japan Patent Office - Mr. Kazuo Wakasugi, Commissioner Formation method 3, relationship with the case of the person making the amendment Patent Applicant (029) Oki Electric Industry Co., Ltd. 4, Agent 5, Amendment order dated ``1, Showa year, month, day (self-motivated) 6
, Detailed explanation of the invention in the specification subject to amendment, Drawing 7, Contents of amendment as shown in Attachment 7 Contents of amendment 1) Description] Page 0, line 9, "28 wa" is corrected to "r28, 29 wa" . 2) In Figure 3(a) of the drawing, the code r218J is corrected to the code r217J as shown in red on the attached sheet. 3rd tri Procedural amendment (method) February 21, 1932 Kazuo Wakasugi, Commissioner of the Patent Office 1. Indication of the case 1982 Patent Application No. 161894 2. Name of the invention Method for forming a pan-f electrode 3. What is the relationship between the person making the amendment and the case? Patent Applicant (029) Oki Electric 21: Gyo Co., Ltd. 4, Agent 5, Amendment Order No. 1] 1982, IU 31
I+ (Delivery date) 6, column 7 for a brief explanation of drawings in the specification subject to amendment, content of amendment as per attached sheet 7 Contents of amendment 1) Specification 15 Di Lines 16 to 18 [Figure 3 (
a) is...... Figure 3 α]) is a conventional ``[Figure 3 is a cross-sectional view of a bump 'FjL pole formed by the bump electrode forming method of the present invention and conventional,'' is corrected to 1. .

Claims (1)

[Claims] forming a first metal on the substrate of the semiconductor device through an oxide film in the bump electrode formation region and the alignment mark portion of the mask substrate, and forming a protective film after forming the first metal; A window is formed at a location corresponding to the first metal, and a second metal is formed on the entire surface.
After forming the second metal, a first photoresist is applied and holes are formed in the bump electrode forming areas and alignment mark portions to form a metal for preventing diffusion of the bump electrode metal. and removing the first photoresist at the same time, and after forming the metal for diffusion prevention, a second photoresist is thickly applied to form the bump electrode formation area and the alignment mark part, and the size is larger than the alignment mark on the substrate. A method for forming bump electrodes that is different from the step of forming bump electrodes on the diffusion prevention metal by exposing a second photoresist through a mask substrate having a pattern of .