JPS6053338B2 - information processing equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a microprogram control type information processing device, and particularly to a retry function of arithmetic processing.

Conventionally, in a microprogram-controlled information processing device that implements Sakura machine instructions using microprograms, an unretry microinstruction is inserted at the beginning of the first non-retryable area of the microprogram for each machine instruction.

When the microprogram runs to the unretry microinstruction, the retry impossible flag is set by that microinstruction. After that, retrying of the microprogram is completely prohibited until the end even if it is in an area where retrying is possible. As a result, the area where retry is not possible increases unduly, which becomes a bottleneck in improving the retry rate. Accordingly, one object of the present invention is to be able to finely manage the display of retry status, which indicates whether a microprogram is running in a retryable area or in an impossible area, and to enable microprograms to An object of the present invention is to provide an information processing device configured to dynamically change retry status.

Furthermore, each machine instruction microprogram often includes a loop portion.

For example, it is often impossible to retry within a loop, or retry is possible after exiting the loop. It would be extremely effective if such switching of the retry status upon exiting the loop could be performed without overhead. Therefore, another object of the present invention is to provide an information processing apparatus having a configuration that allows changing the retry status when exiting a loop portion of a microprogram without any overhead.

Therefore, the information processing device according to the present invention has a state signal group (signal under test) to be tested in the microinstruction test.
Of these, 1 is specified by the test field of the microinstruction.
at least one test matrix that selects and outputs one signal under test, a decoder that decodes other specific fields of the microinstruction, and creates a retry status based on the output of the decoder and the output of the test matrix. , and a retry status determination circuit that transfers it to a retry status display latch.

When a machine check occurs during arithmetic processing, the retry control device in the information processing device activates the retry operation if the retry state display latch indicates that retry is possible, but otherwise suppresses the retry operation. . Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

Note that only the parts directly related to the present invention are shown in the figure. In the figure, 1 is a microinstruction register.

In this embodiment, the microinstruction has two test fields Tl as fields related to the microinstruction test.
, T2, and test function field TF. The other specific field is called field A for convenience, but it generally includes a group of fields with various functions. Microinstruction register 1
are connected to a control storage device (not shown) via a signal line 9, and further connected to a decoder 5, a test matrix 2, and a test matrix 3 via signal lines 10, 11, 12, and 13, respectively.
, are connected to the arithmetic unit 4.

The test matrix 2 is connected to the T1 field of the microinstruction register 1 via the signal line 11, and the signal line group 2
0 (signals under test A, b . . . , n), and further connected to the inputs of the arithmetic unit 4 and the retry status determination circuit 6 via the signal line 14 . test matrix 3
is connected to the T2 field of the microinstruction register 1 via the signal line 12, and is connected to the signal line 21 (signal under test a″
, b'' . The input of the arithmetic unit 4 is the signal lines 13 and 14
, 15 of microinstruction register 1, respectively.
The output signal line 17 is connected to the outputs of the test matrix 12 and the test matrix 23, and the output signal line 17 is connected to the input of the retry status determination circuit 6.

The input of the decoder 5 is connected to the A field of the microinstruction register 1 via the signal line 10, and the output is connected to the signal line group 1
6 to the retry status determination circuit 6.

The input of the retry status determination circuit 6 is the signal line 14,1
5, 16, and 17 to the outputs of the matrix 2, test matrix 3, decoder 5, and arithmetic unit 4, respectively, and the output is further connected to the input of the retry status display latch 7 via a signal line 18.

The output of the retry status display latch 7 is connected to the input of the retry control device 8 via a signal line 19. Next, the operation will be explained.

Predetermined microinstructions are sequentially sent to the microinstruction register 1 via the signal line 9 in each microinstruction cycle and are latched.

The test matrix 2 is connected to the signal line group 20 according to the pattern of the Tl field sent via the signal line 11.
One of the signals A, b, . . . , n to be tested given by is selected and sent to the signal line 14.

Further, the test matrix 3 is connected to the signal line group 2 according to the pattern of the T2 field sent via the signal line 12.
Select one of the signals under test a'', b'', ... n'' given by 1 and send it to the signal line 15. Arithmetic unit 4
performs the logical operation specified by the TF field of the microinstruction register 1 sent via the signal line 13, and the test matrix 2 sent via the signal lines 14 and 15.
and 3, and sends the result to the signal line 17.

The decoder 5 receives the A field of the microinstruction register 1 via the signal line 10 and sends the decoding result of the pattern to the signal line group 16.

The retry status determination circuit 6 receives a signal based on the decoding result of the decoder 5 sent via the signal line group 16 and the establishment/non-establishment of the signal line 14, the establishment/non-establishment of the signal line 15, or the establishment/non-establishment of the signal line 17. A retry status is generated via line 18 and transferred via signal line 18 to the retry status display latch. The following eight types of retry statuses are possible in this embodiment.

(1) Unconditional retry possible status (Ii) T1 test successful retry possible status Yu T2
Test established, retry possible status Co., Ltd. test (signal line 11 status) established, retry possible status (v) Unconditional retry impossible status (Vi) T1 test established, retry impossible status (V
ii) T2 test established retry impossible status - Test (signal line 17 status) established retry impossible status To briefly explain each retry status above, (
i) and (v) are statuses that are unconditionally retryable and retryable, respectively, regardless of whether the signal lines 14, 15, and 17 are established or not.

In other words, this retry status can be forcibly created using the A field of the microinstruction. (Ii)～(
(2) is a status in which retry is possible only when the condition indicated by the Tl, T2, or TF field is satisfied (when the signal line 14, 15, or 17 is established). (Vi) ~ (goods) is (11) ~ (1V
), it is a status in which retry is not possible only when the conditions indicated by the Tl, T2, or π field are satisfied. Now, the retry control device 8 activates or inhibits the retry operation depending on whether the retry status display latch 6 indicates that retry is possible or that retry is not possible at the time of a machine check that occurs during arithmetic processing. . Since the information processing device according to the present invention has the configuration described above, the following effects can be obtained.

Since the retry state can be dynamically changed using microinstructions, it is possible to finely manage the retryable area and increase the retryable area of the microprogram as much as possible, improving the retry rate and ultimately improving system reliability. can. If you want to change the retry state at the exit or entrance of a loop part of a microprogram, you can use the branch test microinstruction at the loop entrance and exit to change the retry state at the same time without inserting a special microinstruction for that purpose. It is possible to avoid an increase in overhead.

[Brief explanation of the drawing]

The figure is a block diagram showing only the main parts of an embodiment of an information processing apparatus according to the present invention. DESCRIPTION OF SYMBOLS 1... Micro instruction register, 2... Test matrix 1, 3... Test matrix 2, 4... Arithmetic unit, 5... Decoder, 6... Retry status determination circuit, 7... Retry status display latch, 8...
・Retry control device.

Claims (1)

[Claims] 1 In a microprogram-controlled information processing device that has an arithmetic processing retry function, one of the signals under test specified in the test field of the microinstruction
at least one test matrix that selects and outputs one signal under test, a decoder that decodes other specific fields of the microinstruction, and creates a retry status based on the output of the decoder and the output of the test matrix. 1. An information processing apparatus, comprising: a circuit for transferring data to a latch, and controlling a retry operation according to a retry status indicated by the latch.