JPS6053057A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6053057A
JPS6053057A JP16215583A JP16215583A JPS6053057A JP S6053057 A JPS6053057 A JP S6053057A JP 16215583 A JP16215583 A JP 16215583A JP 16215583 A JP16215583 A JP 16215583A JP S6053057 A JPS6053057 A JP S6053057A
Authority
JP
Japan
Prior art keywords
guide ring
semiconductor device
semiconductor element
gate
aluminum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16215583A
Other languages
Japanese (ja)
Other versions
JPH0155577B2 (en
Inventor
Takeshi Ito
武志 伊藤
Futoshi Tokuno
徳能 太
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16215583A priority Critical patent/JPS6053057A/en
Publication of JPS6053057A publication Critical patent/JPS6053057A/en
Publication of JPH0155577B2 publication Critical patent/JPH0155577B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/051Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thyristors (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To manufacture a semiconductor device fitted for large power by improving the semiconductor device so as to bond an aluminum wire with a guide ring. CONSTITUTION:A guide ring 3 consists of an insulator such as ceramics, and a silver solder material 14 is brazed onto the guide ring 3. Gate aluminum electrodes 6 on the semiconductor element 5 side and the silver solder materials 14 on the guide ring 3 are wired alternately by the bonding of aluminum wires 7. Consequently, a semiconductor element 5 is fixed more positively than conventional devices. An insulating tube 10 as seen in conventional devices is unnecessitated because the electrodes are taken out directly to the outside by gate pipes 11. Since the silver solder material 14 sections and the gate pipes 11 are connected by silver lead wires 18, currents which can be flowed are made larger than conventional devices, and trouble on an assembly is reduced.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、半導体装置に係り、特に、大?「カキ導体
装置のパッケージに関するものである。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a semiconductor device, and particularly to a semiconductor device. ``It concerns the package of the Oyster conductor device.

〔従来技術〕[Prior art]

従来、この種の半導体装置として第1[821に示すも
のがあった。第1図において、1はセラミックシール、
2は陰極フランジ、3は半導体素子をバンクージ内に固
定するガイドリングで、主にシリコンゴム、パイトンゴ
ム、セラミック等を使用−1−る。4は半導体素子のバ
ンゾペーションのための絶縁ゴム、5はサイリスタやト
ランジスタなどの半導体素子、6は前記半導体素子5の
主電流を制御するための補助電極であるゲートフルミ′
LI℃極、7はアルミ線、8は前記アルミ線7を超省波
ボンダーで接着したホンディング部、9はモリブデン板
等のカソード電極、10は前記アルミ線1を外部eC取
り出す1こめの絶縁チューブ、11はゲートパイプであ
る。
Conventionally, there has been a semiconductor device of this type as shown in No. 1 [821]. In Fig. 1, 1 is a ceramic seal;
2 is a cathode flange, and 3 is a guide ring for fixing the semiconductor element in the bankage, which is mainly made of silicone rubber, pyton rubber, ceramic, etc. 4 is an insulating rubber for banzopation of the semiconductor device, 5 is a semiconductor device such as a thyristor or a transistor, and 6 is a gate fluoride which is an auxiliary electrode for controlling the main current of the semiconductor device 5.
LI℃ pole, 7 is an aluminum wire, 8 is a honding part where the aluminum wire 7 is bonded with an ultra-wave saving bonder, 9 is a cathode electrode such as a molybdenum plate, 10 is an insulation for taking out the aluminum wire 1 to the outside eC The tube 11 is a gate pipe.

従来の7ソセンブリは、ガイドリング3をセラミックシ
ール1に装着したのち、さらしζ半導体$子5を挿入す
る。その後、半導体素子5のゲートアルミ電極6上に/
ルミ勝7を超音波ボンダーにズボンディングする。この
アルミ線7は第1図匠示すように半導体素子5の外周を
等間隔(2〜3mm)で−周するまでホンディングさす
1、端部な絶縁チューブ10に通し、ゲートパイプ11
に導き、さらにゲートパイプ11の先端部なアーク溶接
で溶接する。
In the conventional 7 assembly, after the guide ring 3 is attached to the ceramic seal 1, the exposed ζ semiconductor $5 is inserted. After that, on the gate aluminum electrode 6 of the semiconductor element 5 /
Bond Rumi Katsu 7 to the ultrasonic bonder. As shown in the first figure, this aluminum wire 7 is honed 1 until it goes around the outer periphery of the semiconductor element 5 at equal intervals (2 to 3 mm), then passed through the insulating tube 10 at the end, and then passed through the gate pipe 11.
Then, the tip of the gate pipe 11 is welded by arc welding.

第2図は上記のようにしてJIL立てな行った半導体素
子5の外観側面図である。この図゛ひ、12は銅ブロッ
ク、13は電極銅ブロックC,−表わ−り一0従来の半
導体装置は以上のように1.“?成さr1゛〔いるので
、次のような欠点があっに0 ■ 絶縁チューブ10とアルミ艇7の挿入端部に仮組立
工程で外部から引っ張りなどのイ=ij重が加わると切
断される危険性があった。このアルミ線7はφ03〜0
5程度のもので1ニールしたものを使用するため引っ張
りには杼めて弱い。アルミ線Tの断線が生じfこ場合、
ゲート、カソード間がオープンになるため半導体素子5
は使用できなくなる。
FIG. 2 is an external side view of the semiconductor device 5 subjected to JIL stand-up as described above. In this figure, 12 is a copper block, 13 is an electrode copper block C, and the conventional semiconductor device is as follows: 1. Because of the structure, the following drawbacks can easily occur: ■ If a load such as tension is applied from the outside to the insertion end of the insulating tube 10 and the aluminum boat 7 during the temporary assembly process, it will break. This aluminum wire 7 had a diameter of φ03~0.
Since it is made of a material of about 50% and has been kneaded once, it is quite weak against tension. If the aluminum wire T breaks,
Since the gate and cathode are open, the semiconductor element 5
becomes unusable.

■ このアルミ線7はゲートパイプ11の1M部でアー
ク溶接する際、融点が660℃と高温であるため溶接に
は大変技術と熟練な要する。
(2) When arc welding the aluminum wire 7 at the 1M section of the gate pipe 11, the melting point is as high as 660° C., so welding requires great skill and skill.

〔発明の概要〕[Summary of the invention]

この発明は、上記のような従来のものの欠点を除去し、
さらに特性上、信頼度の高いものを得るためになされた
もので、ガイドリングにアルE ad乞ホンディングで
きるよりに改良することにより大電力用vc適した半導
体装置を提供することを目的としている。
This invention eliminates the drawbacks of the conventional ones as mentioned above,
Furthermore, this was done in order to obtain highly reliable characteristics, and the aim is to provide a semiconductor device suitable for high power VC by improving the guide ring so that it can be attached to the guide ring. .

〔発明の実施例〕[Embodiments of the invention]

第3図、第4図、第5図はこの発明の一実施例を示″′
f図である。これらの図において、14は銀ρつ材、1
5はセラミックなどの絶縁板であり、B部の16はバネ
、11は前記ノくネ1Gをt61定し、銀リード線18
を接着させるためのスペーサである。
Figures 3, 4 and 5 show an embodiment of the present invention.
It is a f diagram. In these figures, 14 is a silver material, 1
5 is an insulating plate made of ceramic or the like, 16 in the B part is a spring, 11 is the above-mentioned screw 1G fixed at t61, and a silver lead wire 18
This is a spacer for adhering.

なお、第5図のA部とB部はこの図ではまとめて同時に
示し1こか、実際に使用する場合はこのうちのどちらか
一方を使用するものでJi)る。
It should be noted that portions A and B in FIG. 5 are shown together in this figure at the same time, or in actual use, one or the other is used.

この発明の特徴は、ガイドリング3にアルミ線7をボン
ディングするところにある1、このソjイドリング3は
セラミック等の絶縁体からプぷり、このガイドリング3
上に銀ロウ材14をロウ付し1こものである。このロワ
材14の厚みは約500μm程度である。
The feature of this invention is that the aluminum wire 7 is bonded to the guide ring 3.1, this solid ring 3 is made of an insulator such as ceramic;
A silver solder material 14 is soldered onto the top. The thickness of this lower material 14 is approximately 500 μm.

アルミ線Iのボンディングは第3図および第4図に示し
たよ’5K、半導体素子5例のゲートアルミ′11L極
6とガイドリング3の銀ロワ羽14とを交互にボンディ
ングにより配線される。このことにより、半導体素子5
の固定が従来のものより確実にj(る、。
As shown in FIGS. 3 and 4, the aluminum wires I are wired by bonding alternately between the gate aluminum 11L poles 6 of the five semiconductor devices and the lower silver blades 14 of the guide ring 3, as shown in FIGS. As a result, the semiconductor element 5
can be fixed more reliably than conventional ones.

まfこ、外部への電極の取出しは第3図、第5図に示し
kようにゲートパイプ11で直接取り出すので、従来の
ように絶縁チューブ10は不姿である。
Furthermore, since the electrodes are directly taken out to the outside through the gate pipe 11 as shown in FIGS. 3 and 5, the insulating tube 10 is not visible as in the conventional case.

さらに、銀ロワ材14部分とゲートバイブプ11を結ぶ
配線を銀リード約18VC¥ろことによってゲートパイ
プ11の先端部のアーク溶接は従来のものとは比較にな
らぬほど容易になる。fた、絶縁チューブ10が不要に
なったことから従来懸念さハていたアルミ線7の断線は
皆無となった。
Furthermore, by using a silver lead of about 18 VC to connect the silver lower material 14 and the gate pipe 11, arc welding of the tip of the gate pipe 11 becomes much easier than in the conventional method. Furthermore, since the insulating tube 10 is no longer necessary, there is no longer any breakage of the aluminum wire 7, which was a concern in the past.

さらに、第5図に示す実施例のよ5VCA部のような構
造、あるいはB部のような圧接木η造も可能となった。
Furthermore, a structure like the 5VCA part of the embodiment shown in FIG. 5, or a pressure-jointed wood structure like the B part is also possible.

A部のh′4造は銀ロウ付14に銀リード腺18をセラ
ソルザーか超音波ボンディング方式で接着を行い、ゲー
トパイプ11に取り出丁ものである。
The h'4 construction in part A is made by bonding the silver lead gland 18 to the silver solder 14 using Cerasolzer or ultrasonic bonding, and then attaching it to the gate pipe 11.

この銀リード線18はアルミ線7の直径φ03〜0.5
に比べると直径をφ1,4〜17程度にまで大きくでき
る。そのTこめ、ゲート電流が200A〜300A程度
流ハるGTOサイリスクなどには特に電流密度の軽減や
インピーダンスのi匠減などに多大な効果がある。
This silver lead wire 18 has a diameter of φ03 to 0.5 of the aluminum wire 7.
Compared to this, the diameter can be increased to about 1.4 to 17 mm. It is particularly effective in reducing current density and impedance in GTO cylisks, which have a gate current of about 200 to 300 A.

B部の構造では、さらに、圧接構造によりゲートリード
線を外部に取り出丁ことを目的として実施したものであ
る。この方法では、ボンディングのように点接触から面
接触にすることができるので、前記したGTOサイリス
タなどには特に有利である。
The structure of part B is further implemented for the purpose of taking out the gate lead wire to the outside by using the press-contact structure. This method is particularly advantageous for the above-mentioned GTO thyristor, etc., since it is possible to change from a point contact like bonding to a surface contact.

絶縁板15の材質はセラミックが望ましい。ま1こ、形
状はリング形がより簡単確実である。ガイトリソゲ3の
材質はセラミックがよい。また、この実施例のよ5に半
導体素子5をボンディングしたあと交互に配線さjたア
ルミ線7の上にRTVなどのゴムで絶縁すると、特に半
導体素子5の固定。
The material of the insulating plate 15 is preferably ceramic. First, the ring shape is simpler and more reliable. The material of the guide lithography 3 is preferably ceramic. Moreover, if the semiconductor elements 5 are bonded as in this embodiment and then insulated with rubber such as RTV on the aluminum wires 7 which are alternately wired, the semiconductor elements 5 are particularly fixed.

ゲート、カソード間の絶縁等に効果がある。Effective for insulation between gate and cathode.

さらに、半導体素子5側から言えば、アルミ電極と等1
図位になる電極の面積が銀ロク旧14の分だけ増加する
ことからゲートアルミ電極6に集中する4K aの密度
を軽減できる。このようにこの発明ヲーr、圧接構造を
有する平型のサイリスタ、特にGToサイリスタや平型
のトランジスタなどに41効に作用する。
Furthermore, from the side of the semiconductor element 5, aluminum electrodes, etc.
Since the area of the electrode in the figure increases by the amount of the silver electrode 14, the density of 4K a concentrated on the gate aluminum electrode 6 can be reduced. As described above, the present invention is effective for flat thyristors having a press-contact structure, particularly GTo thyristors and flat transistors.

なお、上記実施例では圧接平型サイリスクについて説明
したが、圧接平型トランジスタVC適用しても上記実施
例と同様の効果を奏する。−1:た、半導体装置の外部
容器と半導体素子5との位置決めをガイドリング3によ
り行うようにしてもよい。
In the above embodiment, a pressure-connected flat type transistor VC is used, but the same effects as in the above embodiment can be obtained even if a pressure-connected flat type transistor VC is applied. -1: Alternatively, the guide ring 3 may be used to position the semiconductor element 5 and the external container of the semiconductor device.

〔発明の効果〕〔Effect of the invention〕

以上説明したようVにの発明は、ガイドリングに銀ロワ
材をロワ付けしてアルミ配線を行うようKするとともに
、外部電極取り出し用に銀リード線を用いたので、この
銀リード線に流し得る電流が従来のものに比べ増加し、
また、組立上のトラグルがない牛導体装置が得られる利
点がある。
As explained above, the invention in V involves attaching a silver lowering material to the guide ring and performing aluminum wiring, and also uses a silver lead wire for taking out the external electrode, so that it can be flowed onto this silver lead wire. The current increases compared to the conventional one,
Further, there is an advantage that a cow conductor device without assembly tangles can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の半導体装置な示す平面図、第2図は圧接
平型構造のサイリスタの側面図、第3図。 第4図およびm5図はこの発明の一実施例を示す平面図
、断面図および要部の構成例を同時傾表示した実施例を
示す拡大断面図である。 図中、1はセラミックシール、2は陰極フランジ−3は
ガイドリング、4は絶縁ゴム、5は半導体素子、6はゲ
ートアルミ電極、7は゛rルミカッ、8はボンディング
部、9はカソード’1ii(ji、11 k′iゲート
パイプ、12は銅ブロック、13は電極胴グロック、1
4は銀ロワ材、15は絶縁板、16はバネ、17はスペ
ーサ、18は銀リード線である。。 なお、図中の同一符号は同−fたは相当部分?示す。 代理人 大岩増雄 (外2名) 第1図 第3図 第4図
FIG. 1 is a plan view of a conventional semiconductor device, FIG. 2 is a side view of a thyristor with a pressure-welded flat structure, and FIG. FIGS. 4 and 5 are an enlarged sectional view showing an embodiment of the present invention, in which a plan view, a sectional view, and an example of the configuration of essential parts are simultaneously displayed in a tilted manner. In the figure, 1 is a ceramic seal, 2 is a cathode flange, 3 is a guide ring, 4 is an insulating rubber, 5 is a semiconductor element, 6 is a gate aluminum electrode, 7 is a luminaire, 8 is a bonding part, and 9 is a cathode '1ii ( ji, 11 k'i gate pipe, 12 is copper block, 13 is electrode body Glock, 1
4 is a silver lower material, 15 is an insulating plate, 16 is a spring, 17 is a spacer, and 18 is a silver lead wire. . In addition, are the same symbols in the figures the same -f or corresponding parts? show. Agent Masuo Oiwa (2 others) Figure 1 Figure 3 Figure 4

Claims (4)

【特許請求の範囲】[Claims] (1)少なくとも主電流な流丁ための2つの電極と前記
主電流を制御するための補助電極を有する半導体素子と
、この半導体素子の外周部を支持てる絶縁体のガイドリ
ングを有し、前記ガイドリングの一部VCは導電性の環
状部分を有し、この環状部分を中継して前記半導体素子
の補助電極を外部に取り1fJT才、゛・;成としたこ
とを特徴とする半導体装1i’(、。
(1) A semiconductor element having at least two electrodes for directing the main current and an auxiliary electrode for controlling the main current, and an insulating guide ring supporting the outer periphery of the semiconductor element; A semiconductor device 1i characterized in that a part of the guide ring VC has a conductive annular part, and the auxiliary electrode of the semiconductor element is connected to the outside by relaying this annular part to form a 1fJT. '(,.
(2)半導体素子の補助電極と、ガイドリング上に設け
らt″した導電性の環状部分とは、ワイヤボンデインダ
により電気的に接続されていることを特徴とする特許請
求の範囲第(1)項記載の半導体装置。
(2) The auxiliary electrode of the semiconductor element and the conductive annular portion provided on the guide ring are electrically connected by a wire bonder. ) The semiconductor device described in item 2.
(3) ガイドリング上に設けられた導′dL性の環状
部分と外部?fn極とは、リード量によって電気的に接
続さtていることを特徴とする特I「請求の範囲第+1
j項記載の半導体装置。
(3) The conductive annular part provided on the guide ring and the outside? The fn pole is characterized in that it is electrically connected by a lead amount.
The semiconductor device according to item j.
(4)ガイドリング上に設げらハた導電性の環状部分と
外部電極とは、リード量を圧接することによって電気的
に接触されていることを特徴とする特許請求の範囲第(
1)項記載の半導体装置。
(4) The conductive annular portion provided on the guide ring and the external electrode are electrically contacted by pressing the lead amount.
1) The semiconductor device described in item 1).
JP16215583A 1983-09-02 1983-09-02 Semiconductor device Granted JPS6053057A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16215583A JPS6053057A (en) 1983-09-02 1983-09-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16215583A JPS6053057A (en) 1983-09-02 1983-09-02 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS6053057A true JPS6053057A (en) 1985-03-26
JPH0155577B2 JPH0155577B2 (en) 1989-11-27

Family

ID=15749076

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16215583A Granted JPS6053057A (en) 1983-09-02 1983-09-02 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6053057A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56144413A (en) * 1980-04-14 1981-11-10 Shin Etsu Chem Co Ltd Convering method for frame of spectacles with tubular molding made of silicone rubber
US6707144B2 (en) 2002-03-28 2004-03-16 Mitsubishi Denki Kabushiki Kaisha Insulated high speed semiconductor switching device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56144413A (en) * 1980-04-14 1981-11-10 Shin Etsu Chem Co Ltd Convering method for frame of spectacles with tubular molding made of silicone rubber
JPS6154206B2 (en) * 1980-04-14 1986-11-21 Shinetsu Chem Ind Co
US6707144B2 (en) 2002-03-28 2004-03-16 Mitsubishi Denki Kabushiki Kaisha Insulated high speed semiconductor switching device

Also Published As

Publication number Publication date
JPH0155577B2 (en) 1989-11-27

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