JPS6051736B2 - information processing equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an information processing device that is controlled by microinstructions.

In information processing devices that have a control memory device, there is a tendency for the control memory to have a larger capacity in order to meet the demands for expanded functionality from device users, programmers, maintenance personnel, etc. The problem of the rising cost of devices and the increasing proportion of physical devices in all information processing devices has become serious.

To solve this problem, the capacity of the control memory can be reduced by making the control memory rewritable, dynamically rewriting it (hereinafter referred to as overlay), and controlling with the rewritten microinstructions. Alternatively, it becomes possible to prevent an increase in capacity. Conventionally, the following method has been adopted as a means for rewriting the aforementioned control memory.

(1) Method using operator intervention (2) Method using special commands for dynamic rewriting In method (1), the operator intervenes, making it difficult to perform rewriting quickly; When using information stored in main memory, special instructions for dynamic rewriting must be executed, and control memory management in software is required, making handling complicated. .

SUMMARY OF THE INVENTION An object of the present invention is to provide an information processing device that stores infrequently used instructions in main memory and dynamically rewrites them in control memory as needed.

The device of the present invention includes a first J storage means for storing an address and rewriting designation information in a storage location specified by an instruction, and a microinstruction for storing a microinstruction at an address corresponding to the address given from the first storage means. a second micro-instruction storage means for storing a micro-instruction for rewriting the microphone/mouth command stored in the micro-instruction storage means at a designated address corresponding to the address given from the first storage means; The micro-instruction stored in the micro-instruction storage means is executed based on the rewriting designation information given from the storage means and the first storage means, or the micro-instruction stored in the second storage means is executed. and means for determining whether to execute the rewritten microinstruction after rewriting the rewritten microinstruction.

A feature of the present invention is that memory means for converting instruction codes into control storage addresses is used more effectively to perform dynamic rewriting.

Next, the present invention will be explained with reference to the drawings.

FIG. 1 shows the relationship between the microprogram area 40 on the main memory and the allocation of the area 40 onto the control memory 50. In other words, the microprogram area 40 on the main memory
is broadly classified into two parts depending on the frequency of use when assembling a microprogram. One is the frequently used part 41, which consists of general instructions, a control core part, a microprogrammed operating system, etc., and is a resident part 5 of the control memory 50, which will be described later.
It is initially stored at 1. The other part is a less frequently used part 42, which consists of special instructions for maintenance, special instructions for debugging, special instructions for users, etc. It is executed after being stored in the non-resident part 51 of the control memory 50 or by using the control memory write circuit. Furthermore, this infrequently used part 42 is divided into several parts.
It is divided according to the type of command, frequency of use, etc., and a storage area in the non-resident part 52 of the control memory 50 is determined for each of these parts. Control memory is also broadly divided into two parts.

One is a resident section 51 into which frequently used portions of the microprogram area on the main memory are loaded, and the other is a non-resident section 52 into which less frequently used sections are loaded. Resident department. 51 always exists in the control memory, and the non-resident part 52 is rewritten as necessary. moreover,
The non-resident area 52 is divided into several parts, each of which corresponds to some less frequently used parts 42 of the main memory microprogram area, as described above. FIG. 2 is a diagram showing an embodiment of the present invention.

The apparatus of the invention shown in FIG.
, a gate 3 for selecting control, a decoder 4 for specifying the write address of the control memory, a write address register 5 for the control memory, a counter 6 for incrementing the contents of this address register 5 by 1, a main memory address control circuit 7, Main memory address register 8, control memory address register 9, switch 10 for selecting the input of this address register 9, counter 11 for adding 1 to the contents of address register 9, main memory 1
2, a control memory write circuit 13, a control memory 1, a control memory data register 15, and a decoder 16 for converting the output of the data register 15 into a control signal. Next, the operation will be explained using FIG. 2.

First, the following operation is divided into two cases depending on the value of the control selection bit of the word read from the storage location of the memory means 2 specified by the instruction code of the instruction prepared in the instruction register 1. (1) When the value 21 of the control selection bit is logic “0” In this case, the word information read out from the memory means 2 by the instruction 31 of the gate 3 is transferred to the control storage address register 9 via the switch 10. A microinstruction read from the control memory 14 using the address of the control storage address register 9 is stored in the control storage data register 15, and converted by the decoder 16 into a control signal, a control storage address 161, etc. are executed in sequence, the contents of the control storage address register 9 are incremented by 1 by the counter 11, and when a branch is executed by a microinstruction, the contents of the decoder 1 are incremented by 1.
Control memory address 161 to be executed next decoded in step 6
is stored in the control storage address register 9, and the microinstruction at this address is executed. In this way, microinstructions are executed one after another. (2) When the value 21 of the control selection bit is logic "1" When the value 21 of the control selection bit of the word information given from the memory means 2 is logic "1", according to the instruction 32 of the gate 3, A part of this word information is given to the decoder 4 and a part to the main memory address register 8.

The information 22 given to the decoder 4 is converted from a microprogram area on the main memory 12, which will be described later, to a specified address on the control memory 14 to be rewritten. As shown in FIG. 1, the storage area of this address in the control memory 12 is determined in advance for each instruction group according to the type and frequency of use of the instruction. The address converted by the decoder 4 is applied to the control storage write address register 5 and also to the control storage address register 9 via the switch 10. On the other hand, the information given to the main memory address register 8 is converted by the main memory address control circuit 7 into the start address of the area of the main memory 12 where the microprogram is stored. Starting from this address, the main memory information 121 is read out by the control memory write circuit 13 and written onto the control memory 14 addressed by the control memory write address register 5. Then, the contents of the control memory write address register 5 are incremented by 1 by the counter 6, and further main memory information is written onto the control memory 14. By repeating this process, the microprogram in the main memory 12 is written into the control memory 14. When writing of a uniformly specified amount of control memory is completed, a microinstruction is read from the control memory 14 addressed by the control memory address register 9, and the same control as in case (1) described above is performed. In this way, a microprogram with instructions that are used infrequently is stored in the main memory 12, and can be rewritten on the control memory 14 and executed as necessary depending on the value 21 of the control selection bit.

By adding such a dynamic rewrite function, it becomes possible to expand the functionality or reduce the capacity of the control memory without increasing the capacity of the control memory. The present invention has the advantage that dynamic rewriting can be performed by effectively utilizing the memory means for converting instruction codes into control storage addresses.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the relationship between storage areas of a control memory and a main memory according to the present invention, and FIG. 2 is a diagram showing an embodiment of the present invention. In FIG. 2, 1...instruction register, 2...
Memory means, 3...gate, 4...decoder, 5...control storage write address register, 6...
... Counter, 7 ... Main memory address control circuit, 8 ... Main memory address register, 9.
...Control storage address register, 10...
Switch, 11...Counter, 12...Main memory, 13...Control memory writing circuit, 14...
...Control memory, 15...Control memory data register, 16...Decoder.

Claims (1)

[Claims] 1. A first storage means for storing an address and rewriting designation information in a storage location specified by an instruction, and a microinstruction storage means for storing a microinstruction at an address corresponding to the address given from the first storage means. a second storage means for storing a microinstruction for rewriting the microinstruction stored in the microinstruction storage means at an address corresponding to the address given from the first storage means; and the first storage means. The microinstruction stored in the microinstruction storage means is executed based on the rewriting designation information given from the means, or the microinstruction stored in the second storage means is rewritten into the microinstruction storage means and then the rewritten microinstruction is executed. 1. An information processing device comprising means for determining whether to execute an instruction.