JPS6051259B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for forming an N-type conductive region with few crystal defects.

Conventionally, when semiconductor devices are formed by adding impurities of the opposite conductivity type to a silicon single crystal substrate, the silicon crystal lattice is strained due to the difference between the atomic radius of the silicon and the atomic radius of the impurity atoms, resulting in stress due to the strain. In order to alleviate this, crystal defects such as dislocations and point defects are generated in the crystal, and heavy metals are captured in these crystal defects and become recombination centers in the depletion layer, or prevent the expansion of the depletion layer. This causes an increase in junction leakage current. For example, in an N-channel MOS field effect transistor, phosphorus is diffused into a P-type silicon substrate doped with boron to form a source region and a drain region, but since the bond radius of boron and phosphorus is smaller than the bond radius of silicon, , the silicon crystal lattice, which has been strained due to boron doping, becomes even more strained due to the diffusion of phosphorus. Semiconductor crystals that are highly strained in this way generate lattice defects, which trap heavy metals and other substances, increasing leakage current at the junction. In order to solve these drawbacks, N-type impurity diffusion using a combination of an element with a large atomic radius and an element with a small atomic radius, such as a combination of phosphorus and antimony, has been carried out.

However, such combined impurity diffusion has a drawback in that it is difficult to control the formation of the Q-type conductive region because the impurity diffusion rates are different. In order to improve these shortcomings of P-type silicon substrates, the present invention provides boron (preferably 2.8 x 10"4 to 1.2 x 10" 8/
cTl) together with arsenic (preferably 10'0-10'')
A semiconductor device is manufactured using a substrate doped with /d). Using this substrate prevents the generation of dislocations and crystal defects during diffusion of phosphorus, etc., and reduces junction leakage current. Admitted.

The reason for this is that arsenic, which is doped with boron in advance, has a larger crystal radius than silicon.
It is thought that boron, phosphorus, etc., whose crystal radius is smaller than that of silicon, alleviate the strain exerted on the silicon crystal lattice, thereby preventing the generation of dislocations and crystal defects. The present invention also provides P containing arsenic atoms at a concentration of 10'0 to 10'° atoms/d.
Another feature is that an N-type conductive region with few crystal defects is formed by using a type silicon substrate and selecting phosphorus as the substrate. In this way, if a P-type silicon substrate is doped with arsenic in advance and phosphorus is diffused to form an N-type conductive region, the atomic radius of arsenic is larger than the atomic radius of silicon, and the atomic radius of phosphorus is equal to the atomic radius of silicon. Because it is smaller than the lattice strain of the silicon crystal, the occurrence of crystal defects can be suppressed, and since the silicon substrate is doped with arsenic in advance, there is no difficulty in controlling diffusion due to differences in diffusion rates.

The present invention will be explained in detail below using examples.

FIGS. 1 to 5 show an N-channel MO according to an embodiment of the present invention.
FIG. 3 is a cross-sectional view illustrating the manufacturing process of an S field effect transistor. A silicon dioxide film 2 is provided on the surface of a P-type silicon substrate 1 doped with arsenic and boron and having a resistivity of 0.06 to 5 a (FIG. 1).

Next, the silicon dioxide film that will become the source and drain regions is selectively removed, phosphorus is diffused at 700°C to 1100°C, and oxidation is pushed in an oxidizing atmosphere at 8000°C to 1200°C to form the source region. 3 and a drain region 4 are formed (FIG. 2).

Next, the silicon dioxide film in the region 5 that will become the gate between the source region 3 and the drain region 4 is selectively removed (third
figure).

Next, a gate oxide film 6 is grown by thermal oxidation at 7000C to 1100C (FIG. 4).

Next, a gate electrode 7, a source electrode 8, and a drain electrode 9 are formed (FIG. 5).

Using this manufacturing method, N-channel MOS field effect transistors were manufactured by varying the boron and arsenic concentrations of the silicon substrate, and the leakage current at the junction was measured. At 1018 atoms/d, a P-type silicon substrate containing an arsenic concentration of 1.times.10.sup.13 to 1.times.10.sup.17 atoms/Cll was used, and the leakage current at the junction was extremely small, giving good results.

As described in detail above, the present invention has extremely significant effects in this field because it is possible to easily obtain a semiconductor device having an N-type conductivity region with few lattice defects and a low junction leakage current.

[Brief explanation of drawings]

1 to 5 are N-channel MOSs according to embodiments of the present invention.
1 is a cross-sectional view illustrating a manufacturing process of a field effect transistor. 1...P-type silicon substrate, 2...Silicon dioxide film, 3...Source region, 4...
Drain region, 5...Region to become gate, 6...
...Gate oxide film, 7...Gate electrode, 8...
...Source electrode, 9...Drain electrode.

Claims (1)

[Claims] 1 2.8 x 10^1^4~1.2 x 10^ in advance
1^8 atoms/cm^3 of boron and 1 x 10^1^3~1
P doped with ×10^1^7 atoms/cm^3 of arsenic
1. A method of manufacturing a semiconductor device, comprising: preparing a type silicon substrate; and then selectively diffusing phosphorus into the P-type silicon substrate to form an N-type conductivity type region.