JPS6049681A - Semiconductor photodetector device - Google Patents

Semiconductor photodetector device

Info

Publication number
JPS6049681A
JPS6049681A JP58157366A JP15736683A JPS6049681A JP S6049681 A JPS6049681 A JP S6049681A JP 58157366 A JP58157366 A JP 58157366A JP 15736683 A JP15736683 A JP 15736683A JP S6049681 A JPS6049681 A JP S6049681A
Authority
JP
Japan
Prior art keywords
superlattice structure
semiconductor
type
layer
layer superlattice
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58157366A
Other languages
Japanese (ja)
Other versions
JPH051629B2 (en
Inventor
Kunihiko Kodama
邦彦 児玉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58157366A priority Critical patent/JPS6049681A/en
Publication of JPS6049681A publication Critical patent/JPS6049681A/en
Publication of JPH051629B2 publication Critical patent/JPH051629B2/ja
Granted legal-status Critical Current

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Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00Nanooptics, e.g. quantum optics or photonic crystals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H01L31/035236Superlattices; Multiple quantum well structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/107Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes
    • H01L31/1075Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes in which the active layers, e.g. absorption or multiplication layers, form an heterostructure, e.g. SAM structure

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biophysics (AREA)
  • Optics & Photonics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To increase ionization rate, and to reduce noises by making the discontinuous width of a conduction band between semiconductor layers constituting strain layer superlattice structure larger than that of a valence band. CONSTITUTION:An avalanche multiplication region 12 having strain layer superlattice structure in which N<-> type GaAs layers 12a and N<-> type InGaAs layers 12b are laminated alternately is formed on a P<+> type InP substrate 11. An N<-> type InGaAs optical absorption layer 13 and an N<+> type InP cap layer 14 are formed brought into contact with the strain layer superlattice structure 12. A semiconductor photodetector device is obtained by shaping an antireflection coating film 15, a surface protective film 16, an N type electrode 17 and a P type electrode 18. The discontinuous width of conduction bands among the layers 12a, 12b constituting the strain layer superlattice structure is made larger than that of a valence band at that time.

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明は半導体受光装置、特になだれ増倍領域を歪層超
格子構造として低雑音化を更に進めたアバランシフォト
ダイオードに関する○。
DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a semiconductor light receiving device, and particularly to an avalanche photodiode in which an avalanche multiplication region has a strained layer superlattice structure to further reduce noise.

(b) 技術の背景 光を情報信号の媒体とする光通信その他のシステムにお
いて、光信号を電気信号に変換する半導体受光装置は重
要で基本的な構成要素の−っであり、既に多数実用化さ
れている。これらの半導体受光装置のうち、光電流がな
だれ降伏によって増倍されて感度が高められるアバラン
シフォトダイオード(以下APDと略称する)は光検知
器の信号対雑音比を改善する効果が大きい。
(b) Technical background In optical communications and other systems that use light as a medium for information signals, semiconductor photodetectors that convert optical signals into electrical signals are important and fundamental components, and many have already been put into practical use. has been done. Among these semiconductor light receiving devices, an avalanche photodiode (hereinafter abbreviated as APD), whose sensitivity is increased by multiplying the photocurrent by avalanche breakdown, is highly effective in improving the signal-to-noise ratio of a photodetector.

半導体受光装置応用の代表例として光フアイバ通信にお
いては、光伝送に用いられる石英(SiO2)系光ファ
イバの材料分散(屈折率の波長依存性に基づく)は波長
1.3〔μm〕付近において非常に小さくなシ材料分散
と構造分散(伝搬定数の波長依存性に基づく)との和す
なわちモード内分散は波長163乃至1.55 Cμm
〕において小さくなる。
In optical fiber communication, which is a typical example of semiconductor photodetector applications, the material dispersion (based on the wavelength dependence of the refractive index) of quartz (SiO2)-based optical fibers used for optical transmission is extremely large at wavelengths around 1.3 [μm]. The sum of the material dispersion and the structural dispersion (based on the wavelength dependence of the propagation constant), that is, the intra-mode dispersion, is small at wavelengths of 163 to 1.55 Cμm.
).

従って光通信用の半導体受光装置として波長1〔μm〕
以上の帯域特に1.3〔μm〕乃至1.65[μm]程
度の帯域において優れた特性を有するAPDが要求され
ている。
Therefore, as a semiconductor photodetector for optical communication, the wavelength is 1 [μm].
There is a demand for an APD having excellent characteristics in the above band, particularly in the band of about 1.3 [μm] to 1.65 [μm].

(c) 従来技術と問題点 波長1〔μm〕以上の帯域を対象とするAPDとしては
、既にゲルマニウム(Ge )又は■−■族化合物半導
体を用いて多くの提案がなされている。
(c) Prior Art and Problems Many proposals have already been made using germanium (Ge) or ■-■ group compound semiconductors as APDs targeting a wavelength band of 1 [μm] or more.

■−■族化合物半導体のうち、インジウム・燐(InP
 )結晶に格子整合するインジウム・ガリウム・砒素(
InGaAs)もしくはインジウム・ガリウム台砒素・
燐(InGaAsP )混晶を用いたAPDは、この波
長帯域において良好な受光感度をもち、かつ現在実用化
されているGeに比較して低雑音。
Among ■-■ group compound semiconductors, indium phosphorus (InP)
) Indium, gallium, arsenic (
InGaAs) or indium gallium arsenide
APDs using phosphorus (InGaAsP) mixed crystals have good light-receiving sensitivity in this wavelength band and have lower noise than Ge, which is currently in practical use.

低暗電流となる物性をもつために、この波長帯域に対応
する受光装置として重要な位置を占めている0 第1図はInP −InGaAs系APDの代表的構造
を示す断面図である。図において、1はn++InP基
板、2はn型InPバッファ層、3はn型InGaAs
光吸収層、4はn型InPウィンド層、5はInPウィ
ンド層4に形成されたp+型領領域6はガードリングを
構成するp型領域、7は保護絶縁膜、8は反射防止膜、
9はp側電極、10はn側電極を示す0 このA P D Vcn側電極10を正、p側電極9を
負の極性とする逆バイアス電圧を印加するととてより、
pn接合すなわちp+型領領域5n型InPウィンド層
4との界面を挾んで空乏層が形成され、これがn型In
GaAs光吸収層3までひろがり、この光吸収層3内で
入力信号光によって電子が伝導帯に励起されることによ
って、電子正孔対が発生し、電子はn側電極10、正孔
はp側電極9に向ってドリフトし、n型InPウィンド
層4においてはこの正孔を一部キャリアとするなだれ増
倍が行なわれる。このためにn型InPウィンド層4は
また増倍層もしくは増倍領域とも呼ばれる。
Because it has the physical property of low dark current, it occupies an important position as a light receiving device corresponding to this wavelength band. FIG. 1 is a cross-sectional view showing a typical structure of an InP-InGaAs-based APD. In the figure, 1 is an n++InP substrate, 2 is an n-type InP buffer layer, and 3 is an n-type InGaAs substrate.
A light absorption layer, 4 is an n-type InP window layer, 5 is a p+ type region 6 formed in the InP window layer 4, is a p-type region forming a guard ring, 7 is a protective insulating film, 8 is an antireflection film,
9 indicates a p-side electrode, and 10 indicates an n-side electrode.
A depletion layer is formed between the pn junction, that is, the interface between the p+ type region 5 and the n type InP window layer 4, and this is the n type InP region.
It spreads to the GaAs light absorption layer 3, and in this light absorption layer 3, the input signal light excites electrons to the conduction band, thereby generating electron-hole pairs, with the electrons being transferred to the n-side electrode 10 and the holes being transferred to the p-side electrode 10. The holes drift toward the electrode 9, and in the n-type InP window layer 4, avalanche multiplication is performed using some of these holes as carriers. For this reason, the n-type InP window layer 4 is also called a multiplication layer or a multiplication region.

なだれ増倍の過程においてはキャリアと結晶格子を構成
する原子との衝突回数に統計的なゆらぎが存在して、こ
れによって固有のショット雑音が現われる。この雑音は
通常増倍雑音と呼ばれる。
In the process of avalanche multiplication, there is statistical fluctuation in the number of collisions between carriers and atoms constituting the crystal lattice, which causes inherent shot noise. This noise is usually called multiplication noise.

3− なだれ増倍の過程において、電子が単位長当たり衝突電
離を起す回数すなわち電子のイオン化率をα、正孔のイ
オン化率をβとするとき、イオン化率比k(β/αもし
くはα/β)が1に近いときに増倍雑音が大きく、イオ
ン化率比が大きいときに増倍雑音は減少する。
3- In the process of avalanche multiplication, when the number of times electrons undergo impact ionization per unit length, that is, the ionization rate of electrons is α, and the ionization rate of holes is β, then the ionization rate ratio k (β/α or α/β ) is close to 1, the multiplication noise is large, and when the ionization rate ratio is large, the multiplication noise decreases.

先に説明したInP −InGaAs系APDの従来例
においてはイオン化率比に=α/βは2乃至3程度と小
さく、その増倍雑音には物性的制約がある。
In the conventional example of the InP--InGaAs-based APD described above, the ionization rate ratio = α/β is as small as about 2 to 3, and there are physical restrictions on the multiplication noise.

他方、種々の半導体装置に関して超格子構造の導入が提
案されてお、り、APDに関しても増倍層をガリウム・
砒素(GaAs )とガリウム・アルミニウム・砒素(
GaAIAs)とが交互に積層された超格子構造として
、GaAs層とGaAlAs層とのへテロ接合界面に生
ずるエネルギーバンドの不連続性によって、キャリアの
見掛上のイオン化エネルギーを増減させ、電子と正孔と
のイオン化率比を拡大して増倍雑音を低減する構造が先
に知られている。
On the other hand, the introduction of superlattice structures has been proposed for various semiconductor devices, and for APDs, the multiplication layer is made of gallium.
Arsenic (GaAs) and gallium aluminum arsenic (
As a superlattice structure in which GaAIAs) are alternately stacked, the apparent ionization energy of carriers increases or decreases due to the discontinuity in the energy band that occurs at the heterojunction interface between the GaAs layer and the GaAlAs layer, and electrons and positive A structure that reduces multiplication noise by increasing the ionization rate ratio with holes has previously been known.

しかしながらGaAs −GaAlAs系半導体材料に
よっては、波長帯域1.0〔μm〕以上に対応する受光
4− 装置を構成することは不可能であって、この波長帯域に
対応し得るInP−InGaAsもしくはInGaAs
P系半導体材料によって超格子構造の増倍層が形成され
たAPDを本件出願人は先に特願昭58−第38519
号によって提供している。
However, depending on the GaAs-GaAlAs semiconductor material, it is impossible to construct a light receiving device that can handle a wavelength band of 1.0 [μm] or more.
The present applicant previously filed Japanese Patent Application No. 38519-1985 for an APD in which a superlattice structure multiplication layer is formed using a P-based semiconductor material.
It is provided by the number.

第2図は該発明により、工nPとこれに格子整合するI
n O,53Ga O,47As とによって形成され
る超格子構造のエネルギーダイヤグラムの一部を示す図
である。本構造に用いる半導体層の禁制帯幅はInPが
約1.35(eV) 、Ino53Qao、uABが約
0.75(eV)であって、両層のへテロ接合界面にお
ける伝導帯の不連続性△Ec * 0.2 (eV) 
、価電子帯の不連続性△Ev中0.4 (eV)である
FIG. 2 shows a nP and an I lattice-matched to it according to the invention.
FIG. 3 is a diagram showing a part of the energy diagram of a superlattice structure formed by n O, 53 Ga 2 O, and 47 As. The forbidden band width of the semiconductor layers used in this structure is approximately 1.35 (eV) for InP and approximately 0.75 (eV) for Ino53Qao and uAB, and there is a discontinuity in the conduction band at the heterojunction interface between both layers. △Ec * 0.2 (eV)
, the valence band discontinuity ΔEv is 0.4 (eV).

正孔がInP層よりInGaAs層に入るときには価電
子帯のエネルギー差△Evだけ見掛上余分のエネルギー
を得た状態となシイオン化率が増大する。
When a hole enters the InGaAs layer from the InP layer, it apparently gains extra energy by the energy difference ΔEv in the valence band, and the ionization rate increases.

電子については伝導帯のエネルギー差が小さいためにこ
の効果が殆んどなく、両者のイオン化率比に一β/αが
拡大されて増倍雑音が低減される。
For electrons, this effect is almost absent because the energy difference in the conduction band is small, and the ratio of ionization rates between the two is expanded by 1 β/α, thereby reducing multiplication noise.

しかしながら該発明のInP −InGaAs又はIn
−GaAsPの組合わせによる超格子構造においては、
エネルギーの不連続性の効果が正孔のイオン化率増大と
して現われるために電子のイオン化率増大の場合よりイ
オン化率比拡大の効果が少々く、イオン化率比は8〜1
7程度に止1っている。増倍雑音を更に減少させるため
にエネルギーの不連続性によって電子のイオン化率が増
大される超格子構造を備えたAPDが要望されている。
However, the InP-InGaAs or InP of the invention
- In the superlattice structure formed by the combination of GaAsP,
Since the effect of energy discontinuity appears as an increase in the ionization rate of holes, the effect of expanding the ionization rate ratio is slightly smaller than that of increasing the ionization rate of electrons, and the ionization rate ratio is 8 to 1.
It has stopped at around 7. There is a need for an APD with a superlattice structure in which the ionization rate of electrons is increased by energy discontinuities to further reduce multiplication noise.

(d) 発明の目的 本発明は半導体受光装置、特に超格子構造を有するなだ
れ増倍領域を備えたアバランシフォトダイオードに関し
て、従来の物性による制約を超えてイオン化率比を拡大
して低雑音の半導体受光装置を提供することを目的とす
る。
(d) Purpose of the Invention The present invention relates to a semiconductor photodetector, particularly an avalanche photodiode equipped with an avalanche multiplication region having a superlattice structure, by expanding the ionization rate ratio beyond the limitations of conventional physical properties and achieving low noise. The purpose of this invention is to provide a semiconductor photodetector.

(e) 発明の構成 本発明の前記目的は、半導体基板上に、半導体光吸収領
域と、歪層超格子構造を有する半導体なだれ増倍領域と
を備えて、該歪層超格子構造を構成する半導体層相互間
の伝導帯の不連続幅が価電子帯の不連続幅より犬である
半導体受光装置により達成される。
(e) Structure of the Invention The object of the present invention is to provide a semiconductor light absorption region and a semiconductor avalanche multiplication region having a strained layer superlattice structure on a semiconductor substrate, thereby configuring the strained layer superlattice structure. This is achieved by a semiconductor photodetector in which the discontinuity width of the conduction band between semiconductor layers is smaller than the discontinuity width of the valence band.

すなわち、なだれ増倍領域の超格子構造を構成する半導
体層を従来は基板結晶に格、不整合する半導体材料の組
合わせに限定しているのに対して、本発明においては格
子定数に差のある半導体材料を用いても超格子構造では
高品質の結晶が得られる事実を応用し、格子定数は相互
に整合しないが各層は単結晶となる歪層超格子(5tr
ained −1ayersuperlattice 
)構造でなだれ増倍領域を形成することにより、伝導帯
の不連続幅が大きく電子のイオン化率の増大によってキ
ャリアのイオン化率比が大きく拡大されるなだれ増倍領
域を実現して、半導体受光装置の低雑音化を達成するも
のである。
In other words, while conventionally the semiconductor layer constituting the superlattice structure of the avalanche multiplication region is limited to a combination of semiconductor materials that are mismatched to the substrate crystal, in the present invention Applying the fact that high-quality crystals can be obtained in a superlattice structure even when using a certain semiconductor material, we have developed a strained layer superlattice (5tr
ained -1 ayer super lattice
) By forming an avalanche multiplication region with a structure, it is possible to realize an avalanche multiplication region in which the discontinuity width of the conduction band is large and the carrier ionization rate ratio is greatly expanded by increasing the electron ionization rate. This achieves low noise.

なお前記歪層超格子構造を構成する半導体層相互間の格
子不整合は、超構子全形成した状態で4XIO”未満に
止めることが実際的であり、また格子不整合が1×10
 未満である組合わせによっては従来構造とさほどの差
を生じない。
Note that it is practical to keep the lattice mismatch between the semiconductor layers constituting the strained layer superlattice structure to less than 4XIO'' when the superstructure is fully formed, and the lattice mismatch is 1×10
Depending on the combination of less than 100%, there will not be much difference from the conventional structure.

(f) 発明の実施例 以下本発明を実施例により図面を参照して具体7− 的に説明する。(f) Examples of the invention Hereinafter, the present invention will be explained in detail by way of examples and with reference to the drawings. Explain in detail.

第3図(a)及び(b)は本発明の実施例をその主要製
造工程について示す断面図である。
FIGS. 3(a) and 3(b) are cross-sectional views showing the main manufacturing steps of an embodiment of the present invention.

第3図(a)参照 不純物濃度が1×1018〔σ−3〕程度以上のp1型
InP基板11上に1何れも不純物濃度が1刈015〔
cIrL−3〕程度以下であるn−型GaAs層12a
と、n″′型InxGa、−xAs層12bとを交互に
積層した歪層超格子構造12を例えば気相成長方法によ
って形成する。
FIG. 3(a) On a p1-type InP substrate 11 with a reference impurity concentration of about 1×1018 [σ-3] or more, each impurity concentration is 1×015
cIrL-3] or less
A strained layer superlattice structure 12 in which n″′-type InxGa and -xAs layers 12b are alternately laminated is formed by, for example, a vapor phase growth method.

前記Inx Ga1−xAa層12bはx :0.53
であるときにInP基板11と格子定数が一致するが、
必らずしも格子定数を一致させる必要はなく、また前記
GaAs層12aの格子定数はInP基板11より小さ
く、GaAsバルク結晶よりは拡大されるが格子定数が
一致するには到らない。
The Inx Ga1-xAa layer 12b has x: 0.53
When the lattice constant matches that of the InP substrate 11,
It is not necessary to match the lattice constants, and the lattice constant of the GaAs layer 12a is smaller than that of the InP substrate 11, and is expanded compared to the GaAs bulk crystal, but the lattice constants do not match.

本実施例においてはGaA s層12a及びInGaA
s層12bの厚さは30乃至40 (nm)程度とし、
歪層超格子構造12全体の厚さを例えば1〔/1f′n
〕強としている。
In this embodiment, a GaAs layer 12a and an InGaA layer 12a are used.
The thickness of the s layer 12b is about 30 to 40 (nm),
For example, the total thickness of the strained layer superlattice structure 12 is 1[/1f'n
] Strong.

=8− 更に歪層超格子構造12に接して不純物濃度が1×10
15〔crn−3〕程度以下のn−型b+ 0.53 
Ga O,47As層13を厚さ例えば2〔μm〕程度
に、次いで不純物濃度が1×1018〔cIn−3〕程
度以上(D n”型InP層14を厚さ例えば0.4〔
μm〕程度に成長する。
=8− Furthermore, the impurity concentration is 1×10 in contact with the strained layer superlattice structure 12.
N-type b+ of about 15 [crn-3] or less 0.53
The GaO, 47As layer 13 is formed to a thickness of, for example, about 2 [μm], and then the impurity concentration is about 1×10 18 [cIn-3] or more (D n” type InP layer 14 is formed to a thickness of, for example, 0.4 [μm]).
micrometer].

第3図(b)参照 前記半導体基体を図に示す如く、p+型InP基板11
に達する深さにメサ型にエツチングし、n+型InP層
14面上に無反射コート膜15、メサエッチング面に表
面保護膜16をそれぞれ例えば窒化シリコン(Si3N
4)等によって形成し、n+型InP層14に接するn
側電極17を例えば金・ゲルマニウム(AuGe )を
用いて、p+型InP基板11に接するp側電極18を
例えば金・亜鉛(AuZn )を用いて形成する。
Refer to FIG. 3(b) As shown in the figure, the semiconductor substrate is a p+ type InP substrate 11.
A non-reflection coating film 15 is formed on the surface of the n+ type InP layer 14, and a surface protection film 16 is formed on the mesa etched surface using silicon nitride (Si3N).
4) etc., and is in contact with the n+ type InP layer 14.
The side electrode 17 is formed using, for example, gold/germanium (AuGe), and the p-side electrode 18 in contact with the p+ type InP substrate 11 is formed using, for example, gold/zinc (AuZn).

以上説明した本実施例に逆バイアス電圧を印加したとき
のエネルギーダイヤグラムを第4図に示す。なお第4図
において第3図(a)及び(b)と同一符号によって対
応する半導体層を示す。禁制帯幅はGaAsが約1.4
2(eV) 、InGaAsが約0.75(eV)であ
って、GaAs層12aとInGaAs層12bとのへ
テロ接合界面におけるエネルギーの不連続性は、伝導帯
が△Ecキ0.47(eV)、価電子帯が△Ev中0.
20(eV)である。
FIG. 4 shows an energy diagram when a reverse bias voltage is applied to this embodiment described above. In FIG. 4, corresponding semiconductor layers are indicated by the same reference numerals as in FIGS. 3(a) and 3(b). The forbidden band width for GaAs is approximately 1.4
2 (eV) and about 0.75 (eV) for InGaAs, and the energy discontinuity at the heterojunction interface between the GaAs layer 12a and the InGaAs layer 12b means that the conduction band is ΔEc 0.47 (eV). ), the valence band is 0. in ΔEv.
20 (eV).

本実施例のAPDにおいては、n−型InGaAa光吸
収層13において光エネルギーによって励起された電子
が歪層超格子構造12に進入し、GaAs層12aから
InGaAs層12bに入る際に前記の伝導帯の不連続
幅△Ec:0.47CeV)だけ見掛上余分にエネルギ
ーを得た状態となって、電子のイオン化率が増大する。
In the APD of this embodiment, electrons excited by optical energy in the n-type InGaAa light absorption layer 13 enter the strained layer superlattice structure 12, and when entering the InGaAs layer 12b from the GaAs layer 12a, the electrons enter the conduction band. Apparently, extra energy is obtained by the discontinuity width ΔEc: 0.47 CeV), and the ionization rate of electrons increases.

正孔については価電子帯の不連続幅が小さく、両者のイ
オン化率比に=α/βが拡大される。
As for holes, the width of discontinuity in the valence band is small, and the ratio of ionization rates between the two is expanded by =α/β.

以上説明した実施例においては、例えば電界が1〜2×
105〔v/α〕となるような動作状態においてイオン
化率比に一α/βは80程度が得られて、先に述べたI
nP −InGaAs系超格子による増倍領域を備える
APDのイオン化率比にキ8〜17程度に比較して大幅
な拡大が達成されている。
In the embodiments described above, for example, the electric field is 1 to 2×
105 [v/α], the ionization rate ratio -α/β is approximately 80, and the above-mentioned I
The ionization rate ratio of an APD having a multiplication region formed by an nP-InGaAs superlattice has been significantly increased compared to about Ki8 to Ki17.

以上の説明及び実施例は波長帯域1乃至1.65〔μm
〕程度のAPD’に対象としているが、各半導体材料を
本発明の方法によって選択することにより、他の波長帯
域のAPDについても同様の効果を得ることができる。
The above explanation and examples are based on the wavelength band 1 to 1.65 [μm].
], but by selecting each semiconductor material according to the method of the present invention, similar effects can be obtained for APD's in other wavelength bands.

(g) 発明の詳細 な説明した如く本発明においては、半導体受光装置のな
だれ増倍領域とする超格子構造を、これを構成する半導
体層相互間の格子整合が行なわれない歪層超格子構造と
して伝導帯の不連続幅の大きい組合わせ全採用すること
により電子のイオン化率全増大し従来以上の雑音低減全
達成するものであって、例えば光フアイバ通信の中継間
隔の拡大など光を情報伝送の媒体とするシステムの進歩
に優れた効果を及ぼす。
(g) As described in detail, in the present invention, the superlattice structure serving as the avalanche multiplication region of the semiconductor photodetector is replaced by a strained layer superlattice structure in which lattice matching is not performed between the semiconductor layers constituting the superlattice structure. By employing all combinations of large discontinuity widths in the conduction band, the ionization rate of electrons is increased and noise is reduced more than ever before, which is useful for optical information transmission, for example by increasing the relay spacing in optical fiber communications. It has an excellent effect on the advancement of the system as a medium.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はAPDの従来例を示す断面図、第2図は従来の
格子整合する超格子増倍領域のエネルギーダイヤグラム
の例を示す図、第3図(a)及び(b)は本発明の実施
例を示す断面図、第4図は前記実施例のエネルギーダイ
ヤグラムである。 11− 図において、11はp生型1nP基板、12は歪層超格
子構造のなだれ増倍領域、12aはn−型GaAs層、
12bll’jn−型InGaAs層、13はn−型I
 nGaAs光吸収層、14はn+型InPキャップ層
、15は無反射コート膜、16は表面保護膜、17ばn
側電極、18はp側電極を示す。 12− 竿1 図 第2図 第3 図 第4 @
FIG. 1 is a cross-sectional view showing a conventional example of an APD, FIG. 2 is a diagram showing an example of an energy diagram of a conventional lattice-matched superlattice multiplication region, and FIGS. A sectional view showing the embodiment, and FIG. 4 is an energy diagram of the embodiment. 11- In the figure, 11 is a p-type 1nP substrate, 12 is an avalanche multiplication region with a strained layer superlattice structure, 12a is an n-type GaAs layer,
12 bll'j n-type InGaAs layer, 13 n-type I
nGaAs light absorption layer, 14 is n + type InP cap layer, 15 is anti-reflection coating film, 16 is surface protection film, 17ban
18 indicates a p-side electrode. 12- Rod 1 Figure 2 Figure 3 Figure 4 @

Claims (3)

【特許請求の範囲】[Claims] (1)半導体基板上に、半導体光吸収領域と、歪層超格
子構造を有する半導体なだれ増倍領域とを備えて、該歪
層超格子構造を構成する半導体層相互間の伝導帯の不連
続幅が価電子帯の不連続幅より大なることを特徴とする
半導体受光装置。
(1) A semiconductor substrate is provided with a semiconductor light absorption region and a semiconductor avalanche multiplication region having a strained layer superlattice structure, and conduction band discontinuity between semiconductor layers constituting the strained layer superlattice structure. A semiconductor light receiving device characterized in that the width is greater than the discontinuity width of a valence band.
(2)前記歪層超格子構造を構成する半導体層相互間の
格子定数不整合が1×10−3以上でかつ4×10−2
未満であることを特徴とする特許請求の範囲第1項記載
の半導体受光装置。
(2) The lattice constant mismatch between the semiconductor layers constituting the strained layer superlattice structure is 1×10−3 or more and 4×10−2
2. The semiconductor light receiving device according to claim 1, wherein the semiconductor light receiving device is less than 10%.
(3)前記半導体基板が燐化インジウムによシ構成され
、前記歪層超格子構造が砒化ガリウムと砒化インジウム
・ガリウムとによって構成されてなることを特徴とする
特許請求の範囲第2項記載の半導体受光装置。
(3) The semiconductor substrate is made of indium phosphide, and the strained layer superlattice structure is made of gallium arsenide and indium-gallium arsenide. Semiconductor photodetector.
JP58157366A 1983-08-29 1983-08-29 Semiconductor photodetector device Granted JPS6049681A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58157366A JPS6049681A (en) 1983-08-29 1983-08-29 Semiconductor photodetector device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58157366A JPS6049681A (en) 1983-08-29 1983-08-29 Semiconductor photodetector device

Publications (2)

Publication Number Publication Date
JPS6049681A true JPS6049681A (en) 1985-03-18
JPH051629B2 JPH051629B2 (en) 1993-01-08

Family

ID=15648080

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58157366A Granted JPS6049681A (en) 1983-08-29 1983-08-29 Semiconductor photodetector device

Country Status (1)

Country Link
JP (1) JPS6049681A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS639162A (en) * 1986-06-27 1988-01-14 アメリカン テレフォン アンド テレグラフ カムパニー Semiconductor device containing super-lattice structure and control of the same
JPH0290575A (en) * 1988-09-28 1990-03-30 Hitachi Ltd Semiconductor photodetecting element
EP0437633A1 (en) * 1989-08-04 1991-07-24 Canon Kabushiki Kaisha Photo-electric converter
US5471068A (en) * 1991-03-28 1995-11-28 Nec Corporation Semiconductor photodetector using avalanche multiplication and strained layers
US6326650B1 (en) 1995-08-03 2001-12-04 Jeremy Allam Method of forming a semiconductor structure
EP1435666A3 (en) * 2002-12-10 2008-12-31 General Electric Company Avalanche photodiode for use in harsh environments

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5580375A (en) * 1978-12-13 1980-06-17 Nippon Telegr & Teleph Corp <Ntt> Compound semiconductor photoreceptor
JPS6016474A (en) * 1983-07-08 1985-01-28 Nec Corp Hetero multiple junction type photo detector

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5580375A (en) * 1978-12-13 1980-06-17 Nippon Telegr & Teleph Corp <Ntt> Compound semiconductor photoreceptor
JPS6016474A (en) * 1983-07-08 1985-01-28 Nec Corp Hetero multiple junction type photo detector

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS639162A (en) * 1986-06-27 1988-01-14 アメリカン テレフォン アンド テレグラフ カムパニー Semiconductor device containing super-lattice structure and control of the same
JPH0290575A (en) * 1988-09-28 1990-03-30 Hitachi Ltd Semiconductor photodetecting element
EP0437633A1 (en) * 1989-08-04 1991-07-24 Canon Kabushiki Kaisha Photo-electric converter
EP0437633B1 (en) * 1989-08-04 2000-11-02 Canon Kabushiki Kaisha Photo-electric converter
US5471068A (en) * 1991-03-28 1995-11-28 Nec Corporation Semiconductor photodetector using avalanche multiplication and strained layers
US6326650B1 (en) 1995-08-03 2001-12-04 Jeremy Allam Method of forming a semiconductor structure
US6436784B1 (en) 1995-08-03 2002-08-20 Hitachi Europe Limited Method of forming semiconductor structure
EP1435666A3 (en) * 2002-12-10 2008-12-31 General Electric Company Avalanche photodiode for use in harsh environments
KR101025186B1 (en) 2002-12-10 2011-03-31 제너럴 일렉트릭 캄파니 Avalanche photodiode for use in harsh environments

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