WO2011083657A1 - Avalanche photodiode and receiver using same - Google Patents

Avalanche photodiode and receiver using same Download PDF

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Publication number
WO2011083657A1
WO2011083657A1 PCT/JP2010/072087 JP2010072087W WO2011083657A1 WO 2011083657 A1 WO2011083657 A1 WO 2011083657A1 JP 2010072087 W JP2010072087 W JP 2010072087W WO 2011083657 A1 WO2011083657 A1 WO 2011083657A1
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avalanche photodiode
layer
substrate
light absorption
absorption layer
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PCT/JP2010/072087
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French (fr)
Japanese (ja)
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英根 李
斎藤 慎一
杉井 信之
康信 松岡
俊樹 菅原
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株式会社日立製作所
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier
    • H01L31/107Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode
    • H01L31/1075Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode in which the active layers, e.g. absorption or multiplication layers, form an heterostructure, e.g. SAM structure

Definitions

  • the present invention relates to an avalanche photodiode for optical communication and a receiver using the same.
  • the transmission capacity of optical fiber communication is explodingly increasing at an annual rate of 1.5 times with the spread of the Internet as well as trunk line communication between large cities.
  • the optical communication system has the following basic configuration. On the transmission side, electrical signals such as sound and images are converted into optical signals using a light source such as a semiconductor laser. After this optical signal is transmitted using an optical fiber as a transmission medium, the optical signal transmitted by the receiving element on the receiving side is converted back to an electric signal and returned to a desired signal by necessary signal processing.
  • the performance of the light receiving element that converts an optical signal into an electrical signal is very important for the optical communication system.
  • the light receiving elements for optical communication are roughly classified into PIN photodiodes and avalanche photodiodes made of semiconductors.
  • the PIN photodiode is composed of a p-type semiconductor, an undoped semiconductor, and an n-type semiconductor. When input light is incident, it is absorbed by an undoped semiconductor layer to which a bias electric field is applied, and then converted into electrons and holes and detected as an electric signal.
  • the avalanche photodiode includes an avalanche amplification layer in addition to the PIN photodiode, has an optical amplification function, and is used as a light receiving element for a long-distance transmission system.
  • the avalanche photodiode and the signal amplification function use a semiconductor avalanche breakdown phenomenon. The mechanism of signal amplification in the avalanche breakdown phenomenon is as follows.
  • Electrons or holes traveling in the semiconductor collide with the crystal lattice and are scattered.
  • a large electric field is applied to a semiconductor, electrons and holes (hereinafter, carriers) in the semiconductor are accelerated by the electric field. If the movement speed in the semiconductor increases and its kinetic energy exceeds the energy band gap, the probability of breaking bond bonds in the crystal lattice increases when carriers collide with the crystal lattice. Generate hole pairs.
  • This phenomenon is called impact ionization or impact ionization because the atoms that have been broken the bond bond have insufficient charge and appear to be ionized.
  • the number of electron / hole pairs generated by impact ionization when an electron or hole travels a unit distance is called the ionization rate.
  • the ratio of the ionization rate by electrons and the ionization rate by holes is called the ionization rate ratio.
  • the velocity of electrons and holes newly generated by the collision ionization is also accelerated by the applied electric field, and new electron / hole pairs are generated by further collision ionization.
  • avalanche phenomenon a sudden increase in the number of carriers occurs and a large current flows (avalanche phenomenon). That is, even when a small signal (minority carrier) is input, the signal can be amplified by such an avalanche phenomenon.
  • an ionization rate ratio is an important parameter in terms of the high speed and structure magnification of an avalanche photodiode.
  • the ionization rate ratio is larger than 1 or smaller than 1, that is, the larger the difference between the ionization rate due to electrons and the ionization rate due to holes, the higher the speed and the higher multiplication factor are possible.
  • ionization rate ratio is larger than 1 or smaller than 1, that is, the larger the difference between the ionization rate due to electrons and the ionization rate due to holes, the higher the speed and the higher multiplication factor are possible.
  • the ionization rate is close to 1, ionization caused by both electrons and holes continuously occurs in the multiplication layer for a long time, which makes it particularly difficult to increase the speed. Recognize.
  • the avalanche photodiodes used so far for optical communication have a wavelength of 1.3 ⁇ m band or 1.55 ⁇ m band (infrared region) for light used for optical communication, and therefore, an InP or InGaAs compound semiconductor is used as a material.
  • the ionization ratio of InP is about 0.5, which is relatively close to 1. Even in InAlAs, it is 0.25 to 0.5 at most.
  • the band of an avalanche photodiode using an InP semiconductor is up to 10 GHz (assuming that the multiplication factor is about 10), and a high-speed avalanche photodiode of, for example, 25 GHz or 40 GHz has not been realized yet. is the current situation.
  • the ionization rate ratio of Si has an extremely small value of 0.1 to 0.01, and a high-speed and high-sensitivity avalanche photodiode can be realized.
  • Si cannot absorb the infrared light in the 1.3 ⁇ m band or 1.55 ⁇ m band used for optical communication, it cannot be used for optical communication.
  • an avalanche photodiode is manufactured by bonding an Si multiplication layer to an InGaAs layer epitaxially grown on an InP substrate by direct bonding using a wafer bonding technique (see Non-Patent Document 1).
  • the multiplication factor is 30 in the operation band of 10 GHz.
  • the product of the band width and the gain (Gain), the so-called GB product, is 300, which is an improvement over the conventional GB products 150 to 200 when using an InP-based compound semiconductor.
  • a technique for crystal growth of high-quality Ge on Si has been developed, and an avalanche photodiode is manufactured using this technique (see Non-Patent Document 2).
  • the performance of the avalanche photodiode in this case is also about the same as that of an element manufactured by the wafer bonding technique so far.
  • the performance of an avalanche photodiode manufactured using a wafer bonding technique has an operating band of 10 GHz and a multiplication factor of 30.
  • a conventional InP-based avalanche photodiode is used. It showed better properties.
  • the bandwidth is 10 GHz, which is about the same as a conventional InP avalanche photodiode. This is because, during wafer bonding, internal diffusion of each material occurs at the interface between the InGaAs or InP layer of the light absorption layer and the Si layer, and the interface is not steep.
  • InGaAs or InP diffuses in the Si layer, the Si ionization rate ratio may be close to 1.
  • Non-Patent Document 1 Although the GB product has been improved to 300, the above is considered as the reason why the bandwidth is not improved.
  • Non-Patent Document 2 shows characteristics superior to those of conventional InP avalanche photodiodes (in this case, the GB product is about 300), but the bandwidth is 10 GHz. This is comparable to a conventional InP avalanche photodiode.
  • the GB product when Ge is stacked on Si, the density of dislocation defects due to strain caused by the difference in lattice constant between Si and Ge is reduced by repeating high-temperature annealing. Internal diffusion occurs during this high temperature annealing, and Ge diffuses into the Si layer.
  • Non-patent Document 2 Due to this internal diffusion, when the Si layer is thinned, the low ionization rate ratio peculiar to Si is not maintained, and the speed-up of the avalanche photodiode is not realized. Regarding this Si / Ge avalanche photodiode, it has also been reported that dark current increases due to dislocation defects in the Ge layer (Non-patent Document 2).
  • An object of the present invention is to provide an avalanche photodiode for optical communication with low dark current, high speed and high gain, and a receiver using the avalanche photodiode.
  • the light absorption layer and the multiplication layer constitute each layer in a first region and a second region on the substrate.
  • the avalanche is characterized in that the light absorption layer and the multiplication layer are electrically connected by a conductive wiring, and are arranged apart from each other in a direction parallel to the crystal plane of the crystal. A photodiode is used.
  • the receiver includes the avalanche photodiode and an electronic circuit formed on the substrate on which the avalanche photodiode is formed and having a function of amplifying an electric signal.
  • FIG. 1 is a schematic bird's-eye view of an avalanche photodiode having a Ge light absorption layer and a Si multiplication layer according to a first embodiment. It is a schematic sectional drawing of the avalanche photodiode which has Ge light absorption layer and Si multiplication layer based on a 1st Example. It is a figure which shows the result of having calculated the relationship between the multiplication factor with respect to the avalanche photodiode which concerns on a 1st Example, and 3 dB zone
  • Non-Patent Documents 1 and 2 internal multiplication of other materials into the Si amplifying layer may reduce the multiplication layer required for speeding up the avalanche photodiode. Have difficulty. Therefore, as a method for solving this problem, in this embodiment, in the avalanche photodiode having the light absorption layer and the multiplication layer, the light absorption layer and the multiplication layer are separated in a direction parallel to the crystal plane. An avalanche photodiode is proposed in which the light absorption layer and the multiplication layer are electrically connected by a conductive wiring. In this structure, since the light absorption layer (mesa portion) and the multiplication layer (mesa portion) are spatially separated, the multiplication layer can be easily thinned and the speed of the avalanche photodiode can be increased. .
  • a GeOI (Germanium on Insulator) substrate is used for dark current increase due to dislocation defects in the Ge layer in the Si / Ge avalanche photodiode.
  • the GeOI substrate is manufactured by attaching a high-quality Ge layer to a SiO 2 layer formed on a Si substrate, and it is considered that the dislocation defect density is lower than when Ge is epitaxially grown on Si. Further, since the Ge layer is laminated on the SiO 2, compared with a case where Ge on Si are stacked, is on SiO 2 easy to move dislocation defects, when annealed, dislocation defects decreases (disappearance) It becomes easy to do.
  • the avalanche photodiode has a mesa structure, and the top crystal plane of this mesa structure is the (100) plane and the side crystal plane is (110).
  • the mesa structure is a mesa structure in which the crystal face on the top surface of the mesa structure is the (110) plane, the two faces facing the inside are the (110) faces, and the other two faces are the (110) faces. Similar to the effect of forming a mesa structure on Ge rather than on Si, dislocation density can be lowered by moving the dislocations and releasing them from the side surfaces of the film.
  • top surface or side surface is set to (110), a free end perpendicular to the dislocation line in the ⁇ 110> direction is formed, which is effective in reducing the dislocation density. In this way, dark current can be reduced by reducing dislocation defects.
  • FIG. 1A is a schematic bird's-eye view of a photodiode having a Ge light absorption layer and a Si multiplication layer
  • FIG. 1B is a schematic cross-sectional view thereof.
  • the avalanche photodiode according to this example includes an SiO 2 layer 2, a p + -Ge contact layer 3, an undoped Ge light absorption layer 4, an n + -Ge contact layer 5, and an n + on a Si substrate 1.
  • This is a light receiving element comprising a —Si contact layer 6, an n ⁇ —Si multiplication layer 7, an n + —Si contact layer 8, a dielectric layer 9, a protective film 10, and an electrode 11.
  • the light absorption layer 4 and the multiplication layer 7 are spaced apart from each other in the direction parallel to the crystal plane (the horizontal direction above the substrate 1). Are electrically connected by a conductive wiring (electrode) 11.
  • Reference numeral 12 denotes input light.
  • the following two types of substrates are used.
  • a SOI substrate Silicon on Insulator: a substrate having a structure in which a SiO 2 layer is sandwiched between a Si substrate and a surface Si thin film layer
  • a Ge layer is formed thickly by epitaxial growth.
  • the concentrate oxidation method first, the SiGe layer is grown in a molecular beam epitaxy at a substrate temperature of about 500 ° C.
  • the Si originally on the SOI becomes SiO 2 and is deposited on the Ge.
  • the substrate structure is a Si substrate, a SiO 2 layer, and a Ge layer from the bottom.
  • the Ge layer may contain a trace amount of Si of less than about 1% due to the characteristics of the oxidation concentration method. In the present specification, the case where such a trace amount of Si is contained is also referred to as a Ge layer. .
  • Another substrate is a GeOI substrate (Germanium on Insulator: a substrate having a structure in which a SiO 2 layer is sandwiched between a Si substrate and a surface Ge thin film layer).
  • This substrate has a structure in which a high-quality Ge substrate is bonded onto a Si substrate / SiO 2 by wafer bonding.
  • a dark current value comparable to that of a Ge photodiode using a conventional Ge substrate can be expected.
  • the dark current value of a commercially available Ge photodiode is, for example, 0.5 ⁇ A or less at a light receiving diameter of 0.25 mm 2 .
  • the dark current of a light receiving diameter of 20 ⁇ m PD produced by stacking Ge on a Si substrate is 1 ⁇ A or more.
  • a Ge layer having a thickness necessary for forming an avalanche photodiode is formed by epitaxial growth on a high-quality Ge thin film layer.
  • Impurity doping of the Ge layer necessary for forming the contact layer may be performed during epitaxial growth, or may be performed by ion doping after the Ge layer is formed.
  • a mesa structure is formed. Further, the Ge layer in the region forming the mesa structure including the amplification layer is removed by etching, and the Si layer is epitaxially grown. After the contact layer is doped with impurities, a mesa structure is formed. Further, after filling and planarizing with a dielectric such as polyimide between the Ge mesa structure portion and the Si mesa structure portion, a protective film 10 made of, for example, SiO 2 and SiN film is formed as a protective film. Thereafter, the electrode 11 is formed using Au / Ti or Al material.
  • the SiN film is a compressive strain film, tensile strain is applied to the Ge light absorption layer 4 and the energy band gap is reduced. That is, it is possible to absorb light having a long wavelength in the 1.55 ⁇ m band.
  • the thickness of the SiO 2 layer 2 suitably, it is possible to greatly reflecting mirror structure the reflection at the interface of the contact layer 3 and the SiO 2 layer 2 , Quantum efficiency (light absorption efficiency) can be improved.
  • the element resistance Rs was calculated by changing from 25 ⁇ to 100 ⁇ . From the above results, it can be seen that when the element resistance Rs is 50 ⁇ or less, a high-speed and high-amplification avalanche photodiode having a 3 dB band of 40 GHz or more and a multiplication factor of 10 or more can be realized.
  • the above configuration can provide an avalanche photodiode for optical communication with low dark current and high speed and high gain.
  • the avalanche photodiode can be used for a receiver.
  • the second embodiment will be described with reference to FIG. In addition, it describes in the form for inventing or Example 1, and the matter which is not described in a present Example is applicable also to a present Example.
  • FIG. 3 is a cross-sectional view of an avalanche photodiode having an InGaAs light absorption layer and a Si multiplication layer.
  • the avalanche photodiode includes an SiO 2 layer 2, a p + -InP contact layer 13, an undoped InGaAs light absorption layer 14, an n + -InP contact layer 15, and an n + -Si contact on an Si substrate 1.
  • This is a light receiving element including a layer 6, an n ⁇ -Si multiplication layer 7, an n + -Si contact layer 8, a dielectric layer 9, a protective film 10, and an electrode 11.
  • the light absorption layer 14 and the multiplication layer 7 are arranged in a direction parallel to the crystal plane (horizontal direction above the substrate 1), and the light absorption layer 14 and the multiplication layer 7 are separated from each other. They are electrically connected by a conductive wiring (electrode) 11.
  • the p + -InP contact layer 13 may be p + -InGaAsP or p + -InGaAlAs.
  • the n + -InP contact layer 15 may be n + -InGaAsP or n + -InGaAlAs.
  • the substrate used in this example is a III-V OI substrate (III-V on Insulator: a substrate having a structure in which an SiO 2 layer is sandwiched between a Si substrate and a surface III-V compound semiconductor thin film layer).
  • This substrate has a structure in which a high-quality III-V crystal substrate is bonded onto a Si substrate / SiO 2 by wafer bonding.
  • the avalanche photodiode in this example is manufactured by the method described in Example 1.
  • the same effect as in the first embodiment can be obtained. Further, since InP is used, a wavelength of 1.5 ⁇ m is possible, and it can be used for a long distance.
  • the third embodiment will be described with reference to FIGS.
  • it describes in the form or Example 1 or 2 for inventing, and the matter which is not described in a present Example is applicable also to a present Example.
  • FIG. 4 is a sectional view of a two-terminal avalanche photodiode according to the present embodiment
  • FIG. 5 is a sectional view of a three-terminal avalanche photodiode.
  • symbol shows the same structure.
  • the light absorption layer 17 and the multiplication layer 7 are arranged in a direction parallel to the crystal plane (horizontal direction above the substrate 1), and the light absorption layer 17 and the multiplication layer 7 are separated from each other. They are electrically connected by a conductive wiring (electrode) 11.
  • Reference numeral 16 denotes a voltage power source. The element operation method will be described below.
  • Reference numeral 18 denotes a voltage power supply for applying a light absorption layer electric field
  • reference numeral 19 denotes a voltage power supply for applying a multiplication layer electric field.
  • the same effect as in the first embodiment can be obtained. Further, by using three terminals, it is possible to provide a light receiving element capable of accurately controlling the image magnification in the multiplication layer and capable of switching between an avalanche photodiode and a normal PIN photodiode.
  • FIG. 6 is a bird's-eye view of an avalanche photodiode having a (100) crystal plane on the top surface of the mesa structure
  • FIG. 7 is a bird's-eye view of the avalanche photodiode having a (110) crystal plane.
  • symbol shows the same structure.
  • the light absorption layer 17 and the multiplication layer are spaced apart from each other in the direction parallel to the crystal plane (the horizontal direction above the substrate 1), and the light absorption layer and the multiplication layer are electrically conductive. Are electrically connected by a conductive wiring. The following will be described with respect to the crystal plane of the mesa structure.
  • the crystal planes constituting the mesa structure may be as follows.
  • the crystal plane 20 on the top surface of the mesa structure is the (100) plane
  • the crystal planes 21, 22, 23, and 24 on the side surfaces of the mesa structure are the (110) plane.
  • the crystal face 25 on the top surface of the mesa structure is the (110) plane
  • the two crystal faces 26 and 27 facing the inside of the side face of the mesa structure are the (100) face
  • the crystal faces 28 and 29 on the two side faces are defined as (110) faces.
  • the same effect as in the first embodiment can be obtained.
  • the defect density can be reduced and a further reduction in dark current can be achieved.
  • FIG. 8 shows a cross-sectional view of a back-illuminated avalanche photodiode with an integrated lens.
  • the light absorption layer 4 and the multiplication layer 7 are arranged apart from each other in the direction parallel to the crystal plane (horizontal direction above the substrate 1), and the space between the light absorption layer and the multiplication layer is They are electrically connected by conductive wiring (electrode) 11.
  • conductive wiring electrode
  • Avalanche photodiodes with the present embodiment on the Si substrate 1, SiO 2 layer 2, p + -Ge contact layer 3, the light-absorbing layer of undoped Ge 4, n + -Ge contact layer 5, n + - This is a light receiving element comprising a Si contact layer 6, an n ⁇ -Si multiplication layer 7, an n + -Si contact layer 8, a dielectric layer 9, a protective film 10, an electrode 11, and an integrated lens 30.
  • the contact layer 3 is p + -InP, any one of p + -InGaAsP and p + -InGaAlAs, the light absorption layer 4 is undoped InGaAs, and the contact layer 5 is Any one of n + -InP, n + -InGaAsP, and n + -InGaAlAs may be used.
  • Reference numeral 31 denotes input light.
  • the integrated lens 30 can reduce the beam spot size when incident on the light receiving portion, and can greatly improve the optical coupling tolerance.
  • the thickness of the SiO 2 layer 2 suitably, it is reduced and reflection on the interface of the Si substrate 1 and the SiO 2 layer 2, a reflection at the interface of the contact layer 3 and the SiO 2 layer 2 is necessary.
  • the same effect as in the first embodiment can be obtained.
  • the coupling tolerance can be improved by providing the integrated lens.
  • FIG. 9 is a cross-sectional view of a waveguide type avalanche photodiode in which light is incident from the end face of the substrate.
  • the absorption layer can be made thin without impairing the photoelectric conversion efficiency, and high-speed operation becomes possible.
  • the light absorption layer 17 and the multiplication layer 7 are arranged in a direction parallel to the crystal plane (horizontal direction above the substrate 1), and the light absorption layer 17 and the multiplication layer 7 are separated from each other. They are electrically connected by a conductive wiring (electrode) 11.
  • the avalanche photodiode according to the present embodiment has a SiO 2 layer 2, a contact layer 3, a light absorption layer 17, a cladding layer 32, a contact layer 5, a contact layer 6, a multiplication layer 7, a contact layer 8, on a Si substrate 1.
  • This is a light receiving element including a dielectric layer 9, a protective film 10 and an electrode 11.
  • Light (input light) 33 incident from the end face of the substrate is confined in the vicinity of the light absorption layer 17 by the SiO 2 layer 2 and the cladding layer 32 and propagates in the avalanche photodiode.
  • FIG. 10 is a cross-sectional view of an avalanche photodiode in which a Si multiplication layer is formed on a Si substrate.
  • the light absorption layer 4 and the multiplication layer 7 are arranged in a direction parallel to the crystal plane (horizontal direction above the substrate 1), and the light absorption layer 4 and the multiplication layer 7 are separated from each other. They are electrically connected by a conductive wiring (electrode) 11.
  • Avalanche photodiodes with the present embodiment on the Si substrate 1, SiO 2 layer 2, p + -Ge contact layer 3, the light-absorbing layer of undoped Ge 4, n + -Ge contact layer 5, n + -
  • This is a light receiving element comprising a Si contact layer 6, an n ⁇ -Si multiplication layer 7, an n + -Si contact layer 8, a dielectric layer 9, a protective film 10, and an electrode 11.
  • n + -Si contact layer 6, n -- Si multiplication layer 7 and n + -Si contact layer 8 are epitaxially grown on a Si substrate by high-quality Si. Is to form. Dark current can be reduced by high-quality Si.
  • the same effect as in the first embodiment can be obtained. Further, since the contact layer and the multiplication layer are epitaxial layers, the dark current is further reduced.
  • FIG. 11 is a cross-sectional view of a receiver in which an avalanche photodiode and an electronic circuit having a function of amplifying an electric signal are integrated.
  • the light absorption layer 4 and the multiplication layer 7 are arranged in parallel to the crystal plane (in the horizontal direction above the substrate 1), and the light absorption layer 4 and the multiplication layer 7 are separated from each other. They are electrically connected by a conductive wiring (electrode) 11.
  • Avalanche photodiodes with the present embodiment on the Si substrate 1, SiO 2 layer 2, p + -Ge contact layer 3, the light-absorbing layer of undoped Ge 4, n + -Ge contact layer 5, n + - This is a light receiving element comprising a Si contact layer 6, an n ⁇ -Si multiplication layer 7, an n + -Si contact layer 8, a dielectric layer 9, a protective film 10, and an electrode 11. Further, here, an electrical signal based on a CMOS circuit composed of the Si layer 34, the highly doped Si layer 35, the insulating film 36, the source electrode 37, the gate electrode 38, and the drain electrode 39 is passed through the dielectric layer 9.
  • An electronic circuit having a function of amplifying is formed and constitutes a receiver.
  • the high-temperature annealing necessary for manufacturing the electronic circuit is performed by laser annealing after masking the avalanche photodiode portion with a SiO 2 layer and metal (Al, Cu, etc.).
  • An avalanche photodiode for optical communication exceeding a bandwidth of 10 GHz and a multiplication factor of 10 has not yet been developed, and a PIN photodiode and a semiconductor optical amplifier are used for long-distance transmission over a bandwidth of 10 GHz.
  • the PIN photodiode and the semiconductor optical amplifier consume large power, and the operating wavelength band is limited by the band (about 50 nm) of the semiconductor optical amplifier. Therefore, if an avalanche photodiode for optical communication exceeding a bandwidth of 10 GHz and a multiplication factor of 10 can be realized, the technology can replace a PIN photodiode and a semiconductor optical amplifier as a receiver in high-speed long-distance transmission because of low power consumption and wide bandwidth. It is thought that it becomes.

Abstract

Disclosed is an avalanche photodiode for optical communication, which has a low dark current, a high speed, and a high gain. Also disclosed is a receiver using the avalanche photodiode. In the avalanche photodiode having a light absorbing layer (4) and a multiplying layer (7), the light absorbing layer (4) and the multiplying layer (7) are spatially and electrically separately disposed in the parallel direction (horizontal direction above a substrate (1)) to the crystal plane, and the light absorbing layer (4) and the multiplying layer (7) are electrically connected to each other with a conductive wiring line. Thus, since the multiplying layer (7) is thinned, and the light absorbing layer (4) and the multiplying layer (7) are formed of a high quality crystal, the low dark current, the high speed, and the high gain can be achieved in the avalanche photodiode.

Description

アバランシェフォトダイオード及びそれを用いた受信機Avalanche photodiode and receiver using the same
 本発明は、光通信用のアバランシェフォトダイオード及びそれを用いた受信機に関する。 The present invention relates to an avalanche photodiode for optical communication and a receiver using the same.
 光ファイバ通信の伝送容量は、大都市間を結ぶ幹線系の通信のみならず、インターネットの普及に伴い、年率1.5倍の割合で爆発的に増加している。光通信システムは、次のような基本構成からなる。送信側において音声・画像などの電気信号を半導体レーザなどの光源を用いて光信号に変換する。この光信号を伝送媒体である光ファイバを用いて伝送した後、受信側の受信素子により伝送してきた光信号を再び電気信号に変換し、必要な信号処理により所望の信号に戻す。この通信システムでは、発光素子や光ファイバのみならず、光信号を電気信号に変換する受光素子の性能は光通信システムを左右する非常に重要なものである。 The transmission capacity of optical fiber communication is explodingly increasing at an annual rate of 1.5 times with the spread of the Internet as well as trunk line communication between large cities. The optical communication system has the following basic configuration. On the transmission side, electrical signals such as sound and images are converted into optical signals using a light source such as a semiconductor laser. After this optical signal is transmitted using an optical fiber as a transmission medium, the optical signal transmitted by the receiving element on the receiving side is converted back to an electric signal and returned to a desired signal by necessary signal processing. In this communication system, not only the light emitting element and the optical fiber, but also the performance of the light receiving element that converts an optical signal into an electrical signal is very important for the optical communication system.
 光通信用受光素子には、大きく分けて半導体を材料としたPINフォトダイオードとアバランシェフォトダイオードがある。PINフォトダイオードは、p型半導体、アンドープ半導体、n型半導体から構成される。入力光が入射されると、バイアス電界のかかったアンドープの半導体層で吸収された後、電子と正孔に変換され、電気信号として検出される。アバランシェフォトダイオードは、PINフォトダイオードに加えて、なだれ増幅層が含まれており、光の増幅機能を有し、長距離伝送システム用受光素子として用いられている。アバランシェフォトダイオード及び信号増幅機能は、半導体のアバランシェ降伏現象を用いている。アバランシェ降伏現象における信号増幅が発生するメカニズムは次にようになる。 The light receiving elements for optical communication are roughly classified into PIN photodiodes and avalanche photodiodes made of semiconductors. The PIN photodiode is composed of a p-type semiconductor, an undoped semiconductor, and an n-type semiconductor. When input light is incident, it is absorbed by an undoped semiconductor layer to which a bias electric field is applied, and then converted into electrons and holes and detected as an electric signal. The avalanche photodiode includes an avalanche amplification layer in addition to the PIN photodiode, has an optical amplification function, and is used as a light receiving element for a long-distance transmission system. The avalanche photodiode and the signal amplification function use a semiconductor avalanche breakdown phenomenon. The mechanism of signal amplification in the avalanche breakdown phenomenon is as follows.
 半導体内を走行する電子あるいは正孔は結晶格子に衝突して散乱される。半導体に大きな電界を印加すると、半導体内の電子ならびに正孔(以下、キャリア)は電界によって加速される。半導体内での移動速度が大きくなり、その運動エネルギーがエネルギーバンドギャップより大きくなると、結晶格子にキャリア衝突したときに、結晶格子の結合ボンドを切る確率が高くなり、新たに自由に移動できる電子・正孔対を生成する。 Electrons or holes traveling in the semiconductor collide with the crystal lattice and are scattered. When a large electric field is applied to a semiconductor, electrons and holes (hereinafter, carriers) in the semiconductor are accelerated by the electric field. If the movement speed in the semiconductor increases and its kinetic energy exceeds the energy band gap, the probability of breaking bond bonds in the crystal lattice increases when carriers collide with the crystal lattice. Generate hole pairs.
 結合ボンドを切られた原子は電荷が不足し、イオン化したように見えるため、この現象は衝突電離あるいは衝突イオン化と呼ばれている。電子または正孔が単位距離進んだときに衝突電離によってどれほどの電子・正孔対が発生したかをイオン化率という。また、電子によるイオン化率と正孔によるイオン化率の比をイオン化率比と呼ぶ。この衝突イオン化によって新たに生成された電子、正孔の速度も印加電界によって加速され、さらなる衝突イオン化によって新たな電子・正孔対を生成する。このように、衝突電離が繰り返されると、急激なキャリア数の増加が生じ、大きな電流が流れることになる(アバランシェ現象)。すなわち、小さな信号(少数キャリア)が入力した場合でも、このようなアバランシェ現象により信号を増幅することが可能となる。 This phenomenon is called impact ionization or impact ionization because the atoms that have been broken the bond bond have insufficient charge and appear to be ionized. The number of electron / hole pairs generated by impact ionization when an electron or hole travels a unit distance is called the ionization rate. Moreover, the ratio of the ionization rate by electrons and the ionization rate by holes is called the ionization rate ratio. The velocity of electrons and holes newly generated by the collision ionization is also accelerated by the applied electric field, and new electron / hole pairs are generated by further collision ionization. Thus, when impact ionization is repeated, a sudden increase in the number of carriers occurs and a large current flows (avalanche phenomenon). That is, even when a small signal (minority carrier) is input, the signal can be amplified by such an avalanche phenomenon.
 広く知られているように、アバランシェフォトダイオードの高速・構造倍率の点で重要になるパラメーターとしてイオン化率比がある。イオン化率比が、1より大きければ大きいほど、または1より小さければ小さいほど、すなわち電子によるイオン化率と正孔によるイオン化率に大きな差があればあるほど、高速化と高増倍率化が可能になる。このことは、直感的に、イオン化率が1に近い場合、電子と正孔の両方で生じたイオン化が増倍層内で長時間継続して生じることで、特に高速化が困難になることからわかる。 As widely known, an ionization rate ratio is an important parameter in terms of the high speed and structure magnification of an avalanche photodiode. As the ionization rate ratio is larger than 1 or smaller than 1, that is, the larger the difference between the ionization rate due to electrons and the ionization rate due to holes, the higher the speed and the higher multiplication factor are possible. Become. Intuitively, when the ionization rate is close to 1, ionization caused by both electrons and holes continuously occurs in the multiplication layer for a long time, which makes it particularly difficult to increase the speed. Recognize.
 これまで光通信用として用いられてきたアバランシェフォトダイオードは、光通信に用いる光の波長が1.3μm帯または1.55μm帯(赤外線領域)であるため、材料としてInPまたはInGaAsの化合物半導体が用いられてきた。しかし、InPのイオン化率比はおよそ0.5程度と比較的1に近い値である。InAlAsでもせいぜい0.25から0.5である。このため、InP系半導体を用いたアバランシェフォトダイオードの帯域はせいぜい10GHzまでであり(増倍率を10程度と仮定)、それを超える、例えば25GHz,40GHzの高速のアバランシェフォトダイオードは未だに実現されていないのが現状である。 The avalanche photodiodes used so far for optical communication have a wavelength of 1.3 μm band or 1.55 μm band (infrared region) for light used for optical communication, and therefore, an InP or InGaAs compound semiconductor is used as a material. Has been. However, the ionization ratio of InP is about 0.5, which is relatively close to 1. Even in InAlAs, it is 0.25 to 0.5 at most. For this reason, the band of an avalanche photodiode using an InP semiconductor is up to 10 GHz (assuming that the multiplication factor is about 10), and a high-speed avalanche photodiode of, for example, 25 GHz or 40 GHz has not been realized yet. is the current situation.
 これに対して、Siのイオン化率比は0.1から0.01と極めて小さな値を持ち、高速かつ高感度のアバランシェフォトダイオードを実現できる。しかし、Siは光通信に用いられる1.3μm帯または1.55μm帯の赤外線領域光を吸収できないため、光通信には用いることができなかった。 On the other hand, the ionization rate ratio of Si has an extremely small value of 0.1 to 0.01, and a high-speed and high-sensitivity avalanche photodiode can be realized. However, since Si cannot absorb the infrared light in the 1.3 μm band or 1.55 μm band used for optical communication, it cannot be used for optical communication.
 このようなSiを用いたアバランシェフォトダイオードの欠点を克服するため、これまで赤外線領域の光に感度を有する化合物半導体とSiを組合せる試みがなされてきた。すなわち、これまで、光の吸収層を赤外線領域の光を吸収できる半導体で、増倍率層をSiで形成したアバランシェフォトダイオードを作製する試みがなされてきた。たとえば、Si上に化合物半導体をエピタキシャル成長させる試みが長い間行われてきたが、未だに高品質な結晶が得られていない。その他の方法として、InP基板上にエピタキシャル成長したInGaAs層に直接ウエハボンディング技術によりSi増倍層を融着により接合させて、アバランシェフォトダイオードを作製している(非特許文献1参照)。アバランシェフォトダイオードの性能としては、動作帯域10GHzで増倍率が30である。帯域(Bandwidth)と増倍率(Gain)の積、いわゆるGB積は300であり、従来のInP系化合物半導体を用いた場合のGB積150~200と比べて改善されている。さらに、近年、Si上に高品質のGeを結晶成長する技術が開発されてきており、この技術を用いてアバランシェフォトダイオードを作製している(非特許文献2参照)。この場合のアバランシェフォトダイオードの性能も、今のところ、ウエハボンディング技術で作製した素子と同程度である。 In order to overcome the disadvantages of such avalanche photodiodes using Si, attempts have been made so far to combine Si with a compound semiconductor having sensitivity to light in the infrared region. That is, until now, attempts have been made to fabricate avalanche photodiodes in which the light absorption layer is a semiconductor capable of absorbing light in the infrared region and the multiplication layer is formed of Si. For example, attempts to epitaxially grow compound semiconductors on Si have been made for a long time, but high-quality crystals have not yet been obtained. As another method, an avalanche photodiode is manufactured by bonding an Si multiplication layer to an InGaAs layer epitaxially grown on an InP substrate by direct bonding using a wafer bonding technique (see Non-Patent Document 1). As the performance of the avalanche photodiode, the multiplication factor is 30 in the operation band of 10 GHz. The product of the band width and the gain (Gain), the so-called GB product, is 300, which is an improvement over the conventional GB products 150 to 200 when using an InP-based compound semiconductor. Furthermore, in recent years, a technique for crystal growth of high-quality Ge on Si has been developed, and an avalanche photodiode is manufactured using this technique (see Non-Patent Document 2). The performance of the avalanche photodiode in this case is also about the same as that of an element manufactured by the wafer bonding technique so far.
 「背景技術」で述べたように、ウエハボンディング技術を用いて作製したアバランシェフォトダイオードの性能は、動作帯域10GHzで増倍率が30であり、GB積で比較した場合、従来のInP系アバランシェフォトダイオードより優れた特性を示した。しかし、帯域は10GHzと従来のInP系アバランシェフォトダイオードと同程度である。この理由として、ウエハボンディングの際に、光吸収層のInGaAsまたはInP層とSi層との界面でそれぞれの材料の内部拡散がおこり、界面が急峻でないことが挙げられる。Si層内にInGaAsまたはInPが拡散するとSiのイオン化率比が1に近くなることが考えられる。比較的低速なアバランシェフォトダイオードの場合は、Siの増幅層を厚くできるため、この内部拡散の影響は小さいと考えられる。ところが、より高速化を図るため、増倍層の厚さを薄くすると(0.1μm程度)、この内部拡散の影響は無視できなくなる。非特許文献1において、GB積が300と改善されたにも関わらず、帯域が改善されていない原因として、以上のことが考えられる。 As described in “Background Art”, the performance of an avalanche photodiode manufactured using a wafer bonding technique has an operating band of 10 GHz and a multiplication factor of 30. When compared with a GB product, a conventional InP-based avalanche photodiode is used. It showed better properties. However, the bandwidth is 10 GHz, which is about the same as a conventional InP avalanche photodiode. This is because, during wafer bonding, internal diffusion of each material occurs at the interface between the InGaAs or InP layer of the light absorption layer and the Si layer, and the interface is not steep. When InGaAs or InP diffuses in the Si layer, the Si ionization rate ratio may be close to 1. In the case of a relatively low-speed avalanche photodiode, the Si amplification layer can be made thick, so that the influence of this internal diffusion is considered to be small. However, if the multiplication layer is made thinner (about 0.1 μm) for higher speed, the influence of this internal diffusion cannot be ignored. In Non-Patent Document 1, although the GB product has been improved to 300, the above is considered as the reason why the bandwidth is not improved.
 非特許文献2においても、非特許文献1と同様、GB積に関しては、従来のInP系アバランシェフォトダイオードより優れた特性(この場合もGB積は300程度)を示しているが、帯域は10GHzと従来のInP系アバランシェフォトダイオードと同程度である。この場合は、Si上にGeを積層した際、SiとGeの格子定数の差から生じる歪による転位欠陥密度を、高温アニールを繰り返すことにより減少させている。この高温アニールの際に内部拡散が起こり、Si層へのGeの拡散が生じる。この内部拡散により、Si層を薄くした場合、Si特有の低いイオン化率比が保持されず、アバランシェフォトダイオードの高速化が実現されていない。このSi/Geアバランシェフォトダイオードに関しては、Ge層の転位欠陥により暗電流が大きくなることも報告されている(非特許文献2)。 Also in Non-Patent Document 2, as with Non-Patent Document 1, the GB product shows characteristics superior to those of conventional InP avalanche photodiodes (in this case, the GB product is about 300), but the bandwidth is 10 GHz. This is comparable to a conventional InP avalanche photodiode. In this case, when Ge is stacked on Si, the density of dislocation defects due to strain caused by the difference in lattice constant between Si and Ge is reduced by repeating high-temperature annealing. Internal diffusion occurs during this high temperature annealing, and Ge diffuses into the Si layer. Due to this internal diffusion, when the Si layer is thinned, the low ionization rate ratio peculiar to Si is not maintained, and the speed-up of the avalanche photodiode is not realized. Regarding this Si / Ge avalanche photodiode, it has also been reported that dark current increases due to dislocation defects in the Ge layer (Non-patent Document 2).
 本発明の目的は、低暗電流で、高速かつ高利得な光通信用のアバランシェフォトダイオード及びそれを用いた受信機を提供することにある。 An object of the present invention is to provide an avalanche photodiode for optical communication with low dark current, high speed and high gain, and a receiver using the avalanche photodiode.
 上記目的を達成するための一実施形態として、光吸収層と増倍層を有するアバランシェフォトダイオードにおいて、当該光吸収層と増倍層は基板上の第1領域と第2領域に、各層を構成する結晶の結晶面に対して平行方向にそれぞれ互いに離間して配置されており、当該光吸収層と増倍層との間は導電性配線により電気的に接続されていることを特徴とするアバランシェフォトダイオードとする。 As an embodiment for achieving the above object, in an avalanche photodiode having a light absorption layer and a multiplication layer, the light absorption layer and the multiplication layer constitute each layer in a first region and a second region on the substrate. The avalanche is characterized in that the light absorption layer and the multiplication layer are electrically connected by a conductive wiring, and are arranged apart from each other in a direction parallel to the crystal plane of the crystal. A photodiode is used.
 また、前記アバランシェフォトダイオードと、前記アバランシェフォトダイオードが形成されている前記基板上に形成され、電気信号を増幅する機能を有する電子回路とを有することを特徴とする受信機とする。 Further, the receiver includes the avalanche photodiode and an electronic circuit formed on the substrate on which the avalanche photodiode is formed and having a function of amplifying an electric signal.
 上記構成とすることにより、低暗電流で、高速かつ高利得な光通信用アバランシェフォトダイオード及びそれを用いた受信機を提供することができる。 With the above configuration, it is possible to provide a high-speed and high-gain optical avalanche photodiode for low-dark current and a receiver using the same.
第1の実施例に係る、Ge光吸収層とSi増倍層を有するアバランシェフォトダイオードの概略鳥瞰図である。1 is a schematic bird's-eye view of an avalanche photodiode having a Ge light absorption layer and a Si multiplication layer according to a first embodiment. 第1の実施例に係る、Ge光吸収層とSi増倍層を有するアバランシェフォトダイオードの概略断面図である。It is a schematic sectional drawing of the avalanche photodiode which has Ge light absorption layer and Si multiplication layer based on a 1st Example. 第1の実施例に係るアバランシェフォトダイオードに対する増倍率と3dB帯域との関係を計算した結果を示す図である。It is a figure which shows the result of having calculated the relationship between the multiplication factor with respect to the avalanche photodiode which concerns on a 1st Example, and 3 dB zone | band. 第2の実施例に係る、InGaAs光吸収層とSi増倍層を有するアバランシェフォトダイオードの概略断面図である。It is a schematic sectional drawing of the avalanche photodiode which has an InGaAs light absorption layer and Si multiplication layer based on a 2nd Example. 第3の実施例に係る、2端子アバランシェフォトダイオードの概略断面図である。It is a schematic sectional drawing of the 2 terminal avalanche photodiode based on a 3rd Example. 第3の実施例に係る、3端子アバランシェフォトダイオードの概略断面図である。It is a schematic sectional drawing of the 3 terminal avalanche photodiode based on a 3rd Example. 第4の実施例に係る、メサ構造の上面の結晶面が(100)を有するアバランシェフォトダイオードの概略鳥瞰図である。It is a schematic bird's-eye view of the avalanche photodiode which has the crystal plane of the upper surface of a mesa structure which has (100) based on a 4th Example. 第4の実施例に係る、メサ構造の上面の結晶面が(110)を有する他のアバランシェフォトダイオードの概略鳥瞰図である。It is a schematic bird's-eye view of the other avalanche photodiode which has the crystal plane of the upper surface of a mesa structure which has (110) based on a 4th Example. 第5の実施例に係る、レンズを集積した裏面入射型のアバランシェフォトダイオードの概略断面図である。It is a schematic sectional drawing of the back-illuminated avalanche photodiode which integrated the lens based on a 5th Example. 第6の実施例に係る、基板端面から光を入射する導波路型のアバランシェフォトダイオードの概略断面図である。It is a schematic sectional drawing of the waveguide type avalanche photodiode which injects light from the board | substrate end surface based on a 6th Example. 第7の実施例に係る、Siの増倍層がSi基板上に形成されたアバランシェフォトダイオードの概略断面図である。It is a schematic sectional drawing of the avalanche photodiode by which the multiplication layer of Si based on the 7th Example was formed on Si substrate. 第8の実施例に係る、アバランシェフォトダイオードと電子回路が集積された受信機の概略断面図である。It is a schematic sectional drawing of the receiver which integrated the avalanche photodiode and electronic circuit based on an 8th Example.
 発明が解決しようとする課題で述べたように、非特許文献1、2において、Si増幅層への他の材料の内部拡散により、アバランシェフォトダイオードの高速化に必要な増倍層の薄膜化が困難である。そこで、この課題を解決する方法として、本実施の形態では、光吸収層と増倍層を有するアバランシェフォトダイオードにおいて、当該光吸収層と増倍層が結晶面に対して平行方向に離間して配置されており、当該光吸収層と増倍層との間を導電性配線により電気的に接続することを特徴とするアバランシェフォトダイオードを提案する。この構造では、光吸収層(メサ部)と増倍層(メサ部)が空間的に分離されているため、増倍層の薄膜化は容易に実現でき、アバランシェフォトダイオードの高速化が実現できる。 As described in the problem to be solved by the invention, in Non-Patent Documents 1 and 2, internal multiplication of other materials into the Si amplifying layer may reduce the multiplication layer required for speeding up the avalanche photodiode. Have difficulty. Therefore, as a method for solving this problem, in this embodiment, in the avalanche photodiode having the light absorption layer and the multiplication layer, the light absorption layer and the multiplication layer are separated in a direction parallel to the crystal plane. An avalanche photodiode is proposed in which the light absorption layer and the multiplication layer are electrically connected by a conductive wiring. In this structure, since the light absorption layer (mesa portion) and the multiplication layer (mesa portion) are spatially separated, the multiplication layer can be easily thinned and the speed of the avalanche photodiode can be increased. .
 Si/GeアバランシェフォトダイオードにおけるGe層の転位欠陥による暗電流増大に関しては、GeOI(Germanium on Insulator)基板を用いる。GeOI基板はSi基板に形成されたSiO層に高品質のGe層を貼り付けて作製されており、Si上にGeをエピタキシャル成長した場合と比べて、転位欠陥密度が低いと考えられる。さらに、SiO上にGe層が積層されているため、Si上にGeが積層されている場合に比べて、SiO上では転位欠陥が動きやすく、アニールした場合、転位欠陥が減少(消滅)しやすくなる。さらに転位欠陥を少なくするために、アバランシェフォトダイオードをメサ構造とし、このメサ構造の上面の結晶面を(100)面、側面の結晶面を(110)とする。また、その他のメサ構造として、メサ構造の上面の結晶面を(110)面、側面の内向かい合う2面が(110)面、その他の向かい合う2面を(110)面となるメサ構造とする。メサ構造をとる効果は、Si上でなくSiO2上にGeを形成する効果と同様に、転位を運動させて膜側面から解放させることにより転位密度を下げることができる。さらに、上面ないし側面を(110)とすることで、<110>方向の転位線と垂直な自由端が形成されることになり、転位密度低減に効果がある。このように、転位欠陥を減らすことで、暗電流の低減が図れる。 A GeOI (Germanium on Insulator) substrate is used for dark current increase due to dislocation defects in the Ge layer in the Si / Ge avalanche photodiode. The GeOI substrate is manufactured by attaching a high-quality Ge layer to a SiO 2 layer formed on a Si substrate, and it is considered that the dislocation defect density is lower than when Ge is epitaxially grown on Si. Further, since the Ge layer is laminated on the SiO 2, compared with a case where Ge on Si are stacked, is on SiO 2 easy to move dislocation defects, when annealed, dislocation defects decreases (disappearance) It becomes easy to do. In order to further reduce dislocation defects, the avalanche photodiode has a mesa structure, and the top crystal plane of this mesa structure is the (100) plane and the side crystal plane is (110). As another mesa structure, the mesa structure is a mesa structure in which the crystal face on the top surface of the mesa structure is the (110) plane, the two faces facing the inside are the (110) faces, and the other two faces are the (110) faces. Similar to the effect of forming a mesa structure on Ge rather than on Si, dislocation density can be lowered by moving the dislocations and releasing them from the side surfaces of the film. Furthermore, by setting the top surface or side surface to (110), a free end perpendicular to the dislocation line in the <110> direction is formed, which is effective in reducing the dislocation density. In this way, dark current can be reduced by reducing dislocation defects.
 以下、実施例により詳細に説明する。 Hereinafter, the embodiment will be described in detail.
 第1の実施例について図1(a),図1(b)を用いて説明する。なお、発明を実施するための形態に記載され、本実施例に未記載の事項は本実施例にも適用することができる。 The first embodiment will be described with reference to FIGS. 1 (a) and 1 (b). Note that matters described in the mode for carrying out the invention and not described in this embodiment can be applied to this embodiment.
 図1(a)は、Ge光吸収層とSi増倍層を有するフォトダイオードの概略鳥瞰図,図1(b)はその概略断面図である。本実施例に係るアバランシェフォトダイオードは、Si基板1上に、SiO層2、p-Geのコンタクト層3、アンドープのGeの光吸収層4、n-Geのコンタクト層5、n-Siのコンタクト層6、n-Siの増倍層7、n-Siのコンタクト層8、誘電体層9、保護膜10、電極11から構成される受光素子である。本アバランシェフォトダイオードは、光吸収層4と増倍層7が、結晶面に対して平行方向(基板1上方において水平方向)に離間して配置されており、光吸収層4と増倍層7との間は導電性配線(電極)11により電気的に接続されている。なお、符号12は入力光を示す。 FIG. 1A is a schematic bird's-eye view of a photodiode having a Ge light absorption layer and a Si multiplication layer, and FIG. 1B is a schematic cross-sectional view thereof. The avalanche photodiode according to this example includes an SiO 2 layer 2, a p + -Ge contact layer 3, an undoped Ge light absorption layer 4, an n + -Ge contact layer 5, and an n + on a Si substrate 1. This is a light receiving element comprising a —Si contact layer 6, an n Si multiplication layer 7, an n +Si contact layer 8, a dielectric layer 9, a protective film 10, and an electrode 11. In the present avalanche photodiode, the light absorption layer 4 and the multiplication layer 7 are spaced apart from each other in the direction parallel to the crystal plane (the horizontal direction above the substrate 1). Are electrically connected by a conductive wiring (electrode) 11. Reference numeral 12 denotes input light.
 まず、本アバランシェフォトダイオードの作製方法を以下に示す。 First, a method for manufacturing the avalanche photodiode will be described below.
 高品質のGe吸収層4を得るため、基板として、次のような2種類の基板を使用する。一つは、SOI基板(Silicon on Insulator:Si基板と表面Si薄膜層の間にSiO層を挟んだ構造を有する基板)を用いて、酸化濃縮法により高品質のGe薄膜をSiO層2の上に形成し、その後、エピタキシャル成長にてGe層を厚く積層する。濃縮酸化法とは、まずSOI上にSiGe層を基板温度約500℃で分子線エピタキシー法で成長し、その後900℃~1100℃で1時間熱酸化すると、SiGeのGeがSiO上に堆積し、元々SOI上にあったSiはSiOとなってGe上に堆積する。この状態で、最上部のSiO層を選択エッチングにより除去すると、高品質のGe層が最上部に形成された基板ができる。基板構造は、下からSi基板、SiO層、Ge層である。上記のGe層は、酸化濃縮法の特性上、概ね1%未満程度の微量なSiが含まれる場合もあるが、本明細書においては、そのような微量Siを含有する場合もGe層と称する。 In order to obtain a high-quality Ge absorption layer 4, the following two types of substrates are used. One is to use a SOI substrate (Silicon on Insulator: a substrate having a structure in which a SiO 2 layer is sandwiched between a Si substrate and a surface Si thin film layer) to form a high-quality Ge thin film with a SiO 2 layer 2 by an oxidation concentration method. Then, a Ge layer is formed thickly by epitaxial growth. The concentrate oxidation method, first, the SiGe layer is grown in a molecular beam epitaxy at a substrate temperature of about 500 ° C. on SOI, then is oxidized under heating for 1 h at 900 ℃ ~ 1100 ℃, Ge of the SiGe is deposited on SiO 2 The Si originally on the SOI becomes SiO 2 and is deposited on the Ge. In this state, when the uppermost SiO 2 layer is removed by selective etching, a substrate having a high-quality Ge layer formed on the uppermost portion is obtained. The substrate structure is a Si substrate, a SiO 2 layer, and a Ge layer from the bottom. The Ge layer may contain a trace amount of Si of less than about 1% due to the characteristics of the oxidation concentration method. In the present specification, the case where such a trace amount of Si is contained is also referred to as a Ge layer. .
 もう一つの基板は、GeOI基板(Germanium on Insulator:Si基板と表面Ge薄膜層の間にSiO層を挟んだ構造を有する基板)である。この基板は、高品質のGe基板をウエハボンディングによりSi基板/SiO上に貼り付けた構造を有する。このGe層を用いると、従来のGe基板を用いたGeフォトダイオード程度の暗電流値を期待できる。市販のGeフォトダイオードの暗電流値は、たとえば受光径0.25mmで0.5μA以下である。10G以上の高速化PDの場合、受光径は20μmであるため、暗電流が受光径に比例することを考慮すると、1nA以下の低暗電流が期待できる。因みに、現状、Si基板上にGeを積層して作製した受光径20μmPDの暗電流は1μA以上である。 Another substrate is a GeOI substrate (Germanium on Insulator: a substrate having a structure in which a SiO 2 layer is sandwiched between a Si substrate and a surface Ge thin film layer). This substrate has a structure in which a high-quality Ge substrate is bonded onto a Si substrate / SiO 2 by wafer bonding. When this Ge layer is used, a dark current value comparable to that of a Ge photodiode using a conventional Ge substrate can be expected. The dark current value of a commercially available Ge photodiode is, for example, 0.5 μA or less at a light receiving diameter of 0.25 mm 2 . In the case of a high-speed PD of 10G or more, since the light receiving diameter is 20 μm, a low dark current of 1 nA or less can be expected considering that the dark current is proportional to the light receiving diameter. Incidentally, at present, the dark current of a light receiving diameter of 20 μm PD produced by stacking Ge on a Si substrate is 1 μA or more.
 上記2種類の基板を用いて、高品質のGe薄膜層上にエピタキシャル成長により、アバランシェフォトダイオードを形成するに必要な厚さのGe層を形成する。コンタクト層形成に必要なGe層の不純物ドーピングは、エピタキシャル成長時に行ってもよいし、または、Ge層形成後にイオンドーピングによって不純物ドーピングを行ってもよい。 Using the above two types of substrates, a Ge layer having a thickness necessary for forming an avalanche photodiode is formed by epitaxial growth on a high-quality Ge thin film layer. Impurity doping of the Ge layer necessary for forming the contact layer may be performed during epitaxial growth, or may be performed by ion doping after the Ge layer is formed.
 次に、Ge層の不純物ドーピングの後、メサ構造を形成する。さらに、増幅層を含むメサ構造を形成する領域のGe層をエッチングにより除去し、Si層をエピタキシャル成長する。コンタク層に不純物ドーピングした後、メサ構造を形成する。さらに、Geのメサ構造部とSiのメサ構造部の間にポリイミドなどの誘電体で埋め込み平坦化した後、保護膜として例えば、SiOとSiN膜からなる保護膜10を形成する。その後、Au/TiまたはAl材料を用いて電極11を形成する。ここで、SiN膜を圧縮歪膜とすることで、Geの光吸収層4に引張の歪が入り、エネルギーバンドギャップが小さくなる。すなわち、1.55μm帯の長波長の光の吸収も可能になる。 Next, after impurity doping of the Ge layer, a mesa structure is formed. Further, the Ge layer in the region forming the mesa structure including the amplification layer is removed by etching, and the Si layer is epitaxially grown. After the contact layer is doped with impurities, a mesa structure is formed. Further, after filling and planarizing with a dielectric such as polyimide between the Ge mesa structure portion and the Si mesa structure portion, a protective film 10 made of, for example, SiO 2 and SiN film is formed as a protective film. Thereafter, the electrode 11 is formed using Au / Ti or Al material. Here, when the SiN film is a compressive strain film, tensile strain is applied to the Ge light absorption layer 4 and the energy band gap is reduced. That is, it is possible to absorb light having a long wavelength in the 1.55 μm band.
 本実施例の表面入射型の場合、SiO層2の厚さを適当に選ぶことで、コンタクト層3とSiO層2の界面での反射を大きくした反射ミラー構造とすることが可能であり、量子効率(光の吸収効率)を改善できる。 For surface incident type according to the present embodiment, by selecting the thickness of the SiO 2 layer 2 suitably, it is possible to greatly reflecting mirror structure the reflection at the interface of the contact layer 3 and the SiO 2 layer 2 , Quantum efficiency (light absorption efficiency) can be improved.
 図1に示す構造を基に、本アバランシェフォトダイオードの性能について解析を行った。その結果(増倍率と3dB帯域の関係)を図2に示す。計算に用いたパラメーターは次の通りである。光吸収層i-Ge層厚:0.5μm、Si増倍層厚:0.1μm、受光径:15μm、光吸収層と増倍層を接合する電極面線:5x50μm、総静電容量(素子容量50fFと寄生容量3.4fFの和):53.4fF、Si増倍層のイオン化率比:0.1、Geの電子飽和速度6x10cm/s、Siの電子飽和速度1x10cm/sとした。素子抵抗Rsは、25Ωから100Ωまで変えて計算を行った。以上の結果から、素子抵抗Rsが50Ω以下であると、3dB帯が40GHz以上、増倍率が10以上の高速かつ高増幅率のアバランシェフォトダイオードが実現可能であることがわかる。 Based on the structure shown in FIG. 1, the performance of the avalanche photodiode was analyzed. The result (relation between multiplication factor and 3 dB band) is shown in FIG. The parameters used for the calculation are as follows. Light absorption layer i-Ge layer thickness: 0.5 μm, Si multiplication layer thickness: 0.1 μm, light receiving diameter: 15 μm, electrode surface line joining the light absorption layer and the multiplication layer: 5 × 50 μm 2 , total capacitance ( (Sum of device capacitance 50 fF and parasitic capacitance 3.4 fF): 53.4 fF, Si ionization rate ratio of Si multiplication layer: 0.1, Ge electron saturation speed 6 × 10 6 cm / s, Si electron saturation speed 1 × 10 7 cm / s s. The element resistance Rs was calculated by changing from 25Ω to 100Ω. From the above results, it can be seen that when the element resistance Rs is 50Ω or less, a high-speed and high-amplification avalanche photodiode having a 3 dB band of 40 GHz or more and a multiplication factor of 10 or more can be realized.
 本実施例によれば、上記構成とすることにより、低暗電流で、高速かつ高利得な光通信用アバランシェフォトダイオードを提供することができる。また、本アバランシェフォトダイオードは受信機に用いることが可能である。 According to the present embodiment, the above configuration can provide an avalanche photodiode for optical communication with low dark current and high speed and high gain. The avalanche photodiode can be used for a receiver.
 第2の実施例について図3を用いて説明する。なお、発明を実施するための形態又は実施例1に記載され、本実施例に未記載の事項は本実施例にも適用することができる。 The second embodiment will be described with reference to FIG. In addition, it describes in the form for inventing or Example 1, and the matter which is not described in a present Example is applicable also to a present Example.
 図3は、InGaAs光吸収層とSi増倍層を有するアバランシェフォトダイオードの断面図である。本アバランシェフォトダイオードは、Si基板1上に、SiO層2、p-InPのコンタクト層13、アンドープのInGaAsの光吸収層14、n-InPのコンタクト層15、n-Siのコンタクト層6、n-Siの増倍層7、n-Siのコンタクト層8、誘電体層9、保護膜10、電極11から構成される受光素子である。本実施例において、光吸収層14と増倍層7が結晶面に対して平行方向(基板1上方において水平方向)に離間して配置されており、光吸収層14と増倍層7との間は導電性配線(電極)11により電気的に接続されている。 FIG. 3 is a cross-sectional view of an avalanche photodiode having an InGaAs light absorption layer and a Si multiplication layer. The avalanche photodiode includes an SiO 2 layer 2, a p + -InP contact layer 13, an undoped InGaAs light absorption layer 14, an n + -InP contact layer 15, and an n + -Si contact on an Si substrate 1. This is a light receiving element including a layer 6, an n -Si multiplication layer 7, an n + -Si contact layer 8, a dielectric layer 9, a protective film 10, and an electrode 11. In the present embodiment, the light absorption layer 14 and the multiplication layer 7 are arranged in a direction parallel to the crystal plane (horizontal direction above the substrate 1), and the light absorption layer 14 and the multiplication layer 7 are separated from each other. They are electrically connected by a conductive wiring (electrode) 11.
 なお、実施例1と異なる点について説明する。ここで、p-InPのコンタクト層13は、p-InGaAsPまたはp-InGaAlAsでもよい。さらに、n-InPのコンタクト層15は、n-InGaAsPまたはn-InGaAlAsでもよい。 Note that differences from the first embodiment will be described. Here, the p + -InP contact layer 13 may be p + -InGaAsP or p + -InGaAlAs. Further, the n + -InP contact layer 15 may be n + -InGaAsP or n + -InGaAlAs.
 本実施例において用いる基板は、III-V OI基板(III-V on Insulator:Si基板と表面III-V化合物半導体薄膜層の間にSiO層を挟んだ構造を有する基板)である。この基板は、高品質のIII-V結晶基板をウエハボンディングによりSi基板/SiO上に貼り付けた構造を有する。この基板を用いて、実施例1で述べた方法により本実施例におけるアバランシェフォトダイオードを作製する。 The substrate used in this example is a III-V OI substrate (III-V on Insulator: a substrate having a structure in which an SiO 2 layer is sandwiched between a Si substrate and a surface III-V compound semiconductor thin film layer). This substrate has a structure in which a high-quality III-V crystal substrate is bonded onto a Si substrate / SiO 2 by wafer bonding. Using this substrate, the avalanche photodiode in this example is manufactured by the method described in Example 1.
 本実施例においても、実施例1と同様の効果を得ることができる。また、InPを用いているので波長1.5μmが可能であり、長距離用として用いることができる。 Also in the present embodiment, the same effect as in the first embodiment can be obtained. Further, since InP is used, a wavelength of 1.5 μm is possible, and it can be used for a long distance.
 第3の実施例について図4と図5を用いて説明する。なお、発明を実施するための形態又は実施例1や2に記載され、本実施例に未記載の事項は本実施例にも適用することができる。 The third embodiment will be described with reference to FIGS. In addition, it describes in the form or Example 1 or 2 for inventing, and the matter which is not described in a present Example is applicable also to a present Example.
 図4は本実施例に係る2端子のアバランシェフォトダイオードの断面図であり、図5は3端子のアバランシェフォトダイオードの断面図である。なお、同一の符号は同一の構成を示す。本実施例において、光吸収層17と増倍層7が結晶面に対して平行方向(基板1上方において水平方向)に離間して配置されており、光吸収層17と増倍層7との間は導電性配線(電極)11により電気的に接続されている。なお、符号16は電圧電源を示す。素子動作方法に関して以下に説明する。 FIG. 4 is a sectional view of a two-terminal avalanche photodiode according to the present embodiment, and FIG. 5 is a sectional view of a three-terminal avalanche photodiode. In addition, the same code | symbol shows the same structure. In the present embodiment, the light absorption layer 17 and the multiplication layer 7 are arranged in a direction parallel to the crystal plane (horizontal direction above the substrate 1), and the light absorption layer 17 and the multiplication layer 7 are separated from each other. They are electrically connected by a conductive wiring (electrode) 11. Reference numeral 16 denotes a voltage power source. The element operation method will be described below.
 素子動作に必要な電界印加法として、2つの方法がある。1つは2端子間に電圧を印加する方法である(図4参照)。2つめは光吸収層17に印加する電界の制御と増幅層7に印加する電界の制御が各々独立に制御することが可能である3端子で電圧を印加する方法である(図5参照)。2端子の場合は、電圧電源が1つのため、電子回路が簡素化できる。一方、3端子の場合は、2つの電圧電源が必要なため、電子回路が複雑化する懸念があるが、各層に印加する印加電圧を正確に制御できるメリットがある。印加電圧を正確に制御できるもとにより、増倍率の正確な制御が可能になる。また、光吸収層17にのみ電圧を印加することにより、増幅機能のない通常のPINフォトダイオードとしても機能する。なお、符号18は光吸収層電界印加用電圧電源、符号19は増倍層電界印加用電圧電源を示す。 There are two methods for applying an electric field necessary for device operation. One is a method of applying a voltage between two terminals (see FIG. 4). The second is a method of applying a voltage at three terminals, where the control of the electric field applied to the light absorption layer 17 and the control of the electric field applied to the amplification layer 7 can be controlled independently (see FIG. 5). In the case of two terminals, since there is one voltage power supply, the electronic circuit can be simplified. On the other hand, in the case of three terminals, since two voltage power supplies are required, there is a concern that the electronic circuit becomes complicated, but there is an advantage that the applied voltage applied to each layer can be accurately controlled. Since the applied voltage can be accurately controlled, the multiplication factor can be accurately controlled. Further, by applying a voltage only to the light absorption layer 17, it functions as a normal PIN photodiode having no amplification function. Reference numeral 18 denotes a voltage power supply for applying a light absorption layer electric field, and reference numeral 19 denotes a voltage power supply for applying a multiplication layer electric field.
 本実施例においても、実施例1と同様の効果を得ることができる。また、3端子とすることにより、増倍層における像倍率の正確な制御が可能となる、また、アバランシェフォトダイオードと通常のPINフォトダイオードとの切り替えが可能な受光素子を提供することがきる。 Also in the present embodiment, the same effect as in the first embodiment can be obtained. Further, by using three terminals, it is possible to provide a light receiving element capable of accurately controlling the image magnification in the multiplication layer and capable of switching between an avalanche photodiode and a normal PIN photodiode.
 第4の実施例について図6と図7を用いて説明する。なお、発明を実施するための形態、実施例1~3のいずれかに記載され、本実施例に未記載の事項は本実施例にも適用することができる。 The fourth embodiment will be described with reference to FIGS. It should be noted that items described in any of Embodiments 1 to 3 for carrying out the invention and not described in this embodiment can be applied to this embodiment.
 図6はメサ構造上面の結晶面が(100)面を有するアバランシェフォトダイオードの、図7は結晶面が(110)面を有するアバランシェフォトダイオードの鳥瞰図である。なお、同一の符号は同一の構成を示す。本実施例において、光吸収層17と増倍層が結晶面に対して平行方向(基板1上方において水平方向)に離間して配置されており、光吸収層と増倍層との間は導電性配線により電気的に接続される。メサ構造の結晶面に関して以下について説明する。 FIG. 6 is a bird's-eye view of an avalanche photodiode having a (100) crystal plane on the top surface of the mesa structure, and FIG. 7 is a bird's-eye view of the avalanche photodiode having a (110) crystal plane. In addition, the same code | symbol shows the same structure. In the present embodiment, the light absorption layer 17 and the multiplication layer are spaced apart from each other in the direction parallel to the crystal plane (the horizontal direction above the substrate 1), and the light absorption layer and the multiplication layer are electrically conductive. Are electrically connected by a conductive wiring. The following will be described with respect to the crystal plane of the mesa structure.
 光吸収層を含むメサ構造において、Geの転位欠陥密度を減らすために、メサ構造を構成する結晶面を次の通りにするとよい。まず、図6に示すように、メサ構造の上面の結晶面20が(100)面、メサ構造の側面の結晶面21,22,23,24が(110)面とする。その他の構造として、図7に示すように、メサ構造の上面の結晶面25が(110)面、メサ構造の側面の内向かい合う2面の結晶面26と27が(100)面、その他の向かい合う2面の側面の結晶面28,29を(110)面とする。 In the mesa structure including the light absorption layer, in order to reduce the dislocation defect density of Ge, the crystal planes constituting the mesa structure may be as follows. First, as shown in FIG. 6, the crystal plane 20 on the top surface of the mesa structure is the (100) plane, and the crystal planes 21, 22, 23, and 24 on the side surfaces of the mesa structure are the (110) plane. As another structure, as shown in FIG. 7, the crystal face 25 on the top surface of the mesa structure is the (110) plane, the two crystal faces 26 and 27 facing the inside of the side face of the mesa structure are the (100) face, and the other faces. The crystal faces 28 and 29 on the two side faces are defined as (110) faces.
 本実施例においても、実施例1と同様の効果を得ることができる。また、メサ構造の上面の結晶面を(100)面や(110)面とすることにより、欠陥密度が低減され、更なる低暗電流化を図ることができる。 Also in the present embodiment, the same effect as in the first embodiment can be obtained. In addition, by setting the crystal plane of the upper surface of the mesa structure to the (100) plane or the (110) plane, the defect density can be reduced and a further reduction in dark current can be achieved.
 第5の実施例について図8を用いて説明する。なお、発明を実施するための形態、実施例1~4のいずれかに記載され、本実施例に未記載の事項は本実施例にも適用することができる。 The fifth embodiment will be described with reference to FIG. Note that items described in any one of Embodiments 1 to 4 for carrying out the invention and not described in this embodiment can also be applied to this embodiment.
 図8はレンズを集積した裏面入射型アバランシェフォトダイオードの断面図を示す。本実施例において、光吸収層4と増倍層7が結晶面に対して平行方向(基板1上方において水平方向)に離間して配置されており、光吸収層と増倍層との間は導電性配線(電極)11により電気的に接続されている。裏面入射型アバランシェフォトダイオードに関して以下に説明する。 FIG. 8 shows a cross-sectional view of a back-illuminated avalanche photodiode with an integrated lens. In the present embodiment, the light absorption layer 4 and the multiplication layer 7 are arranged apart from each other in the direction parallel to the crystal plane (horizontal direction above the substrate 1), and the space between the light absorption layer and the multiplication layer is They are electrically connected by conductive wiring (electrode) 11. A back-illuminated avalanche photodiode will be described below.
 本実施例に関するアバランシェフォトダイオードは、Si基板1上に、SiO層2、p-Geのコンタクト層3、アンドープのGeの光吸収層4、n-Geのコンタクト層5、n-Siのコンタクト層6、n-Siの増倍層7、n-Siのコンタクト層8、誘電体層9、保護膜10、電極11、集積レンズ30から構成される受光素子である。ここで、実施例2で記載した構造である、コンタクト層3をp-InP、p-InGaAsPとp-InGaAlAsのどれか1層、光吸収層4をアンドープのInGaAs、コンタクト層5をn-InP、n-InGaAsPとn-InGaAlAsのどれか1層としてもよい。なお、符号31は入力光を示す。 Avalanche photodiodes with the present embodiment, on the Si substrate 1, SiO 2 layer 2, p + -Ge contact layer 3, the light-absorbing layer of undoped Ge 4, n + -Ge contact layer 5, n + - This is a light receiving element comprising a Si contact layer 6, an n -Si multiplication layer 7, an n + -Si contact layer 8, a dielectric layer 9, a protective film 10, an electrode 11, and an integrated lens 30. Here, in the structure described in Example 2, the contact layer 3 is p + -InP, any one of p + -InGaAsP and p + -InGaAlAs, the light absorption layer 4 is undoped InGaAs, and the contact layer 5 is Any one of n + -InP, n + -InGaAsP, and n + -InGaAlAs may be used. Reference numeral 31 denotes input light.
 集積レンズ30により、受光部に入射時のビームスポットサイズを小さくでき、光結合トレランスを大幅に改善できる。この場合、SiO層2の厚さを適当に選ぶことで、Si基板1とSiO層2の界面での反射と、コンタクト層3とSiO層2の界面での反射を低減することが必要である。 The integrated lens 30 can reduce the beam spot size when incident on the light receiving portion, and can greatly improve the optical coupling tolerance. In this case, by selecting the thickness of the SiO 2 layer 2 suitably, it is reduced and reflection on the interface of the Si substrate 1 and the SiO 2 layer 2, a reflection at the interface of the contact layer 3 and the SiO 2 layer 2 is necessary.
 本実施例においても、実施例1と同様の効果を得ることができる。また、集積レンズを備えたことにより、結合トレランスを改善することができる。 Also in the present embodiment, the same effect as in the first embodiment can be obtained. Moreover, the coupling tolerance can be improved by providing the integrated lens.
 第6の実施例について図9を用いて説明する。なお、発明を実施するための形態、実施例1~5のいずれかに記載され、本実施例に未記載の事項は本実施例にも適用することができる。 The sixth embodiment will be described with reference to FIG. Note that items described in any one of Examples 1 to 5 for carrying out the invention and not described in this example can be applied to this example.
 図9は、基板端面から光を入射する導波路型のアバランシェフォトダイオードの断面図である。導波路型にすることで、光電変換効率を損なうことなく、吸収層を薄くすることができ高速動作が可能になる。本実施例において、光吸収層17と増倍層7が結晶面に対して平行方向(基板1上方において水平方向)に離間して配置されており、光吸収層17と増倍層7との間は導電性配線(電極)11により電気的に接続されている。 FIG. 9 is a cross-sectional view of a waveguide type avalanche photodiode in which light is incident from the end face of the substrate. By adopting the waveguide type, the absorption layer can be made thin without impairing the photoelectric conversion efficiency, and high-speed operation becomes possible. In the present embodiment, the light absorption layer 17 and the multiplication layer 7 are arranged in a direction parallel to the crystal plane (horizontal direction above the substrate 1), and the light absorption layer 17 and the multiplication layer 7 are separated from each other. They are electrically connected by a conductive wiring (electrode) 11.
 本実施例に関するアバランシェフォトダイオードは、Si基板1上に、SiO層2、コンタクト層3、光吸収層17、クラッド層32、コンタクト層5、コンタクト層6、増倍層7、コンタクト層8、誘電体層9、保護膜10、電極11から構成される受光素子である。基板端面から入射した光(入力光)33は、SiO層2とクラッド層32により光吸収層17付近に閉じ込められ、アバランシェフォトダイオード内を伝播する。 The avalanche photodiode according to the present embodiment has a SiO 2 layer 2, a contact layer 3, a light absorption layer 17, a cladding layer 32, a contact layer 5, a contact layer 6, a multiplication layer 7, a contact layer 8, on a Si substrate 1. This is a light receiving element including a dielectric layer 9, a protective film 10 and an electrode 11. Light (input light) 33 incident from the end face of the substrate is confined in the vicinity of the light absorption layer 17 by the SiO 2 layer 2 and the cladding layer 32 and propagates in the avalanche photodiode.
 本実施例においても、実施例1と同様の効果を得ることができる。 Also in the present embodiment, the same effect as in the first embodiment can be obtained.
 第7の実施例について図10を用いて説明する。なお、発明を実施するための形態、実施例1~6のいずれかに記載され、本実施例に未記載の事項は本実施例にも適用することができる。 The seventh embodiment will be described with reference to FIG. Note that items described in any one of Examples 1 to 6 for carrying out the invention and not described in this example can be applied to this example.
 図10は、Siの増倍層がSi基板上に形成されたアバランシェフォトダイオードの断面図である。本実施例における、光吸収層4と増倍層7が結晶面に対して平行方向(基板1上方において水平方向)に離間して配置されており、光吸収層4と増倍層7との間は導電性配線(電極)11により電気的に接続されている。 FIG. 10 is a cross-sectional view of an avalanche photodiode in which a Si multiplication layer is formed on a Si substrate. In the present embodiment, the light absorption layer 4 and the multiplication layer 7 are arranged in a direction parallel to the crystal plane (horizontal direction above the substrate 1), and the light absorption layer 4 and the multiplication layer 7 are separated from each other. They are electrically connected by a conductive wiring (electrode) 11.
 本実施例に関するアバランシェフォトダイオードは、Si基板1上に、SiO層2、p-Geのコンタクト層3、アンドープのGeの光吸収層4、n-Geのコンタクト層5、n-Siのコンタクト層6、n-Siの増倍層7、n-Siのコンタクト層8、誘電体層9、保護膜10、電極11から構成される受光素子である。ここで、実施例1と異なる点は、n-Siのコンタクト層6とn-Siの増倍層7とn-Siのコンタクト層8をSi基板上にエピタキシャル成長した高品質のSiにより形成することである。高品質Siにより暗電流の低減が可能になる。 Avalanche photodiodes with the present embodiment, on the Si substrate 1, SiO 2 layer 2, p + -Ge contact layer 3, the light-absorbing layer of undoped Ge 4, n + -Ge contact layer 5, n + - This is a light receiving element comprising a Si contact layer 6, an n -Si multiplication layer 7, an n + -Si contact layer 8, a dielectric layer 9, a protective film 10, and an electrode 11. The difference from Example 1 is that n + -Si contact layer 6, n -- Si multiplication layer 7 and n + -Si contact layer 8 are epitaxially grown on a Si substrate by high-quality Si. Is to form. Dark current can be reduced by high-quality Si.
 本実施例においても、実施例1と同様の効果を得ることができる。また、コンタクト層と増倍層がエピタキシャル層のため、暗電流が更に低減される。 Also in the present embodiment, the same effect as in the first embodiment can be obtained. Further, since the contact layer and the multiplication layer are epitaxial layers, the dark current is further reduced.
 第8の実施例について図11を用いて説明する。なお、発明を実施するための形態、実施例1~7のいずれかに記載され、本実施例に未記載の事項は本実施例にも適用することができる。 The eighth embodiment will be described with reference to FIG. Note that items described in any one of Examples 1 to 7 for carrying out the invention and not described in this example can be applied to this example.
 図11は、アバランシェフォトダイオードと、電気信号を増幅する機能を有する電子回路が集積された受信機の断面図である。本実施例において、光吸収層4と増倍層7が結晶面に対して平行方向(基板1上方において水平方向)に離間して配置されており、光吸収層4と増倍層7との間は導電性配線(電極)11により電気的に接続されている。 FIG. 11 is a cross-sectional view of a receiver in which an avalanche photodiode and an electronic circuit having a function of amplifying an electric signal are integrated. In the present embodiment, the light absorption layer 4 and the multiplication layer 7 are arranged in parallel to the crystal plane (in the horizontal direction above the substrate 1), and the light absorption layer 4 and the multiplication layer 7 are separated from each other. They are electrically connected by a conductive wiring (electrode) 11.
 本実施例に関するアバランシェフォトダイオードは、Si基板1上に、SiO層2、p-Geのコンタクト層3、アンドープのGeの光吸収層4、n-Geのコンタクト層5、n-Siのコンタクト層6、n-Siの増倍層7、n-Siのコンタクト層8、誘電体層9、保護膜10、電極11から構成される受光素子である。さらにここでは、誘電体層9を介して、Si層34、高ドープSi層35、絶縁膜36、ソース電極37、ゲート電極38、ドレイン電極39から構成されるCMOS回路を基本とした電気信号を増幅する機能を有する電子回路が形成され、受信機を構成している。電子回路作製の際に必要な高温アニールは、アバランシェフォトダイオード部分をSiO層と金属(Al,Cuなど)でマスキングした後、レーザアニールを用いて行う。 Avalanche photodiodes with the present embodiment, on the Si substrate 1, SiO 2 layer 2, p + -Ge contact layer 3, the light-absorbing layer of undoped Ge 4, n + -Ge contact layer 5, n + - This is a light receiving element comprising a Si contact layer 6, an n -Si multiplication layer 7, an n + -Si contact layer 8, a dielectric layer 9, a protective film 10, and an electrode 11. Further, here, an electrical signal based on a CMOS circuit composed of the Si layer 34, the highly doped Si layer 35, the insulating film 36, the source electrode 37, the gate electrode 38, and the drain electrode 39 is passed through the dielectric layer 9. An electronic circuit having a function of amplifying is formed and constitutes a receiver. The high-temperature annealing necessary for manufacturing the electronic circuit is performed by laser annealing after masking the avalanche photodiode portion with a SiO 2 layer and metal (Al, Cu, etc.).
 本実施例によれば、低暗電流で、高速かつ高利得な光通信用アバランシェフォトダイオードを用いた受信機を提供することができる。 According to this embodiment, it is possible to provide a receiver using an avalanche photodiode for optical communication with a low dark current and a high speed and a high gain.
 帯域10GHz、増倍率10を超える光通信用アバランシェフォトダイオードは未だに開発されておらず、帯域10GHz超の長距離伝送には、PINフォトダイオードと半導体光増幅器が用いられている。しかし、PINフォトダイオードと半導体光増幅器では、消費電力が大きく、動作波長帯域も半導体光増幅器の帯域(約50nm)で制限されている。そこで、帯域10GHz、増倍率10を超える光通信用アバランシェフォトダイオードが実現できれば、低消費電力かつ広帯域であるため、高速長距離伝送における受信機として、PINフォトダイオードと半導体光増幅器に取って代わる技術となると考えられる。 An avalanche photodiode for optical communication exceeding a bandwidth of 10 GHz and a multiplication factor of 10 has not yet been developed, and a PIN photodiode and a semiconductor optical amplifier are used for long-distance transmission over a bandwidth of 10 GHz. However, the PIN photodiode and the semiconductor optical amplifier consume large power, and the operating wavelength band is limited by the band (about 50 nm) of the semiconductor optical amplifier. Therefore, if an avalanche photodiode for optical communication exceeding a bandwidth of 10 GHz and a multiplication factor of 10 can be realized, the technology can replace a PIN photodiode and a semiconductor optical amplifier as a receiver in high-speed long-distance transmission because of low power consumption and wide bandwidth. It is thought that it becomes.
1…Si基板、2…SiO層、3…コンタクト層、4…Ge光吸収層、5…コンタクト層、6…コンタクト層、7…増倍層、8…コンタクト層、9…誘電体層、10…保護膜、11…電極、12…入力光、13…コンタクト層、14…InGaAs光吸収層、15…コンタクト層、16…電圧電源、17…光吸収層、18…光吸収層電界印加用電圧電源、19…増倍層電界印加用電圧電源、20…(100)面、21…(110)面、22…(110)面、23…(110)面、24…(110)面、25…(110)面、26…(100)面、27…(100)面、28…(110)面、29…(110)面、30…集積レンズ、31…入力光、32…クラッド層、33…入力光、34…Si層、35…高ドープSi層、36…絶縁膜、37…ソース電極、38…ゲート電極、39…ドレイン電極。 1 ... Si substrate, 2 ... SiO 2 layer, 3 ... contact layer, 4 ... Ge light absorbing layer, 5 ... contact layer, 6 ... contact layer, 7 ... multiplication layer, 8 ... contact layer, 9 ... dielectric layer, DESCRIPTION OF SYMBOLS 10 ... Protective film, 11 ... Electrode, 12 ... Input light, 13 ... Contact layer, 14 ... InGaAs light absorption layer, 15 ... Contact layer, 16 ... Voltage power supply, 17 ... Light absorption layer, 18 ... Light absorption layer For electric field application Voltage power supply, 19 ... multiplier layer electric field application voltage power supply, 20 ... (100) plane, 21 ... (110) plane, 22 ... (110) plane, 23 ... (110) plane, 24 ... (110) plane, 25 ... (110) plane, 26 ... (100) plane, 27 ... (100) plane, 28 ... (110) plane, 29 ... (110) plane, 30 ... integrated lens, 31 ... input light, 32 ... clad layer, 33 ... input light, 34 ... Si layer, 35 ... highly doped Si layer, 36 ... insulating film, 37 ... Source electrode, 38 ... Gate electrode, 39 ... Drain electrode.

Claims (15)

  1.  光吸収層と増倍層を有するアバランシェフォトダイオードにおいて、
      当該光吸収層と増倍層は基板上の第1領域と第2領域に、各層を構成する結晶の結晶面に対して平行方向にそれぞれ互いに離間して配置されており、
      当該光吸収層と増倍層との間は導電性配線により電気的に接続されていることを特徴とするアバランシェフォトダイオード。
    In an avalanche photodiode having a light absorption layer and a multiplication layer,
    The light absorption layer and the multiplication layer are disposed in the first region and the second region on the substrate, respectively, in a direction parallel to the crystal plane of the crystal constituting each layer,
    An avalanche photodiode, wherein the light absorption layer and the multiplication layer are electrically connected by a conductive wiring.
  2.  請求項1記載のアバランシェフォトダイオードにおいて、
      前記光吸収層がGeまたはInGaAs,前記増倍層がSiで形成されていることを特徴とするアバランシェフォトダイオード。
    The avalanche photodiode according to claim 1,
    An avalanche photodiode, wherein the light absorption layer is made of Ge or InGaAs, and the multiplication layer is made of Si.
  3.  請求項2に記載のアバランシェフォトダイオードにおいて、
      前記光吸収層と前記増倍層を形成する部分はメサ構造を有し、当該メサ構造の上面の結晶面が(100)面、当該メサ構造の側面の結晶面が(110)面であることを特徴とするアバランシェフォトダイオード。
    The avalanche photodiode according to claim 2,
    The portion where the light absorption layer and the multiplication layer are formed has a mesa structure, the crystal plane of the top surface of the mesa structure is the (100) plane, and the crystal plane of the side surface of the mesa structure is the (110) plane. An avalanche photodiode.
  4.  請求項2に記載のアバランシェフォトダイオードにおいて、
      前記光吸収層と前記増倍層を形成する部分はメサ構造を有し、当該メサ構造の上面の結晶面が(110)面、当該メサ構造の側面の内向かい合う2面が(110)面、その他の向かい合う2面が(100)面であることを特徴とするアバランシェフォトダイオード。
    The avalanche photodiode according to claim 2,
    The portion that forms the light absorption layer and the multiplication layer has a mesa structure, the crystal plane of the upper surface of the mesa structure is the (110) plane, and the two faces facing the inner side of the mesa structure are the (110) plane, An avalanche photodiode characterized in that the other two facing surfaces are (100) surfaces.
  5.  請求項2に記載のアバランシェフォトダイオードにおいて、
      前記基板は、GeOI基板またはIII-V OI基板であることを特徴とするアバランシェフォトダイオード。
    The avalanche photodiode according to claim 2,
    The avalanche photodiode is characterized in that the substrate is a GeOI substrate or a III-V OI substrate.
  6.  請求項5に記載のアバランシェフォトダイオードにおいて、
      前記光吸収層に印加する電界の制御と前記増幅層に印加する電界の制御が各々独立に制御することが可能であることを特徴とするアバランシェフォトダイオード。
    The avalanche photodiode according to claim 5,
    The avalanche photodiode, wherein the control of the electric field applied to the light absorption layer and the control of the electric field applied to the amplification layer can be independently controlled.
  7.  請求項6に記載のアバランシェフォトダイオードにおいて、
      前記基板裏面側に形成したレンズを有し、光を前記基板裏面側から入射する裏面入射型アバランシェフォトダイオード。
    The avalanche photodiode according to claim 6,
    A back-illuminated avalanche photodiode having a lens formed on the back side of the substrate and receiving light from the back side of the substrate.
  8.  請求項6に記載のアバランシェフォトダイオードにおいて、
      光を基板端面から入射する導波路型アバランシェフォトダイオード。
    The avalanche photodiode according to claim 6,
    A waveguide avalanche photodiode that receives light from the end face of the substrate.
  9.  請求項6に記載のアバランシェフォトダイオードと、
      前記アバランシェフォトダイオードが形成されている前記基板上に形成され、電気信号を増幅する機能を有する電子回路とを有することを特徴とする受信機。
    An avalanche photodiode according to claim 6;
    A receiver having an electronic circuit formed on the substrate on which the avalanche photodiode is formed and having a function of amplifying an electric signal.
  10.  基板と、
      前記基板上の第1領域に形成された光吸収層と、
      前記基板上であって、前記第1の領域とは異なる第2の領域に前記光吸収層とは互いに離間して形成された増倍層と、
      前記光吸収層と前記増倍層との間を電気的に接続する導電性配線とを有することを特徴とするアバランシェフォトダイオード。
    A substrate,
    A light absorption layer formed in a first region on the substrate;
    A multiplication layer formed on the substrate in a second region different from the first region and spaced apart from the light absorption layer;
    An avalanche photodiode comprising a conductive wiring that electrically connects the light absorption layer and the multiplication layer.
  11.  請求項10記載のアバランシェフォトダイオードにおいて、
      前記増倍層は、Si層であることを特徴とするアバランシェフォトダイオード。
    The avalanche photodiode according to claim 10,
    An avalanche photodiode according to claim 1, wherein the multiplication layer is a Si layer.
  12.  請求項10記載のアバランシェフォトダイオードにおいて、
      入力光は、前記基板側から前記光吸収層へ入射する裏面入射型であることを特徴とするアバランシェフォトダイオード。
    The avalanche photodiode according to claim 10,
    The avalanche photodiode is characterized in that the input light is a back-illuminated type that enters the light absorption layer from the substrate side.
  13.  請求項10記載のアバランシェフォトダイオードにおいて、
      入力光は、前記基板端面から前記光吸収層へ入射する導波路型であることを特徴とするアバランシェフォトダイオード。
    The avalanche photodiode according to claim 10,
    The avalanche photodiode is characterized in that the input light is of a waveguide type that enters the light absorption layer from the end face of the substrate.
  14.  請求項10記載のアバランシェフォトダイオードにおいて、
      前記導電性配線は、外部から電圧を印加することができるものであることを特徴とするアバランシェフォトダイオード。
    The avalanche photodiode according to claim 10,
    An avalanche photodiode, wherein the conductive wiring can be applied with a voltage from the outside.
  15.  請求項10記載のアバランシェフォトダイオードと、
      前記アバランシェフォトダイオードが形成されている前記基板上に形成され、電気信号を増幅する機能を有する電子回路とを有することを特徴とする受信機。
    An avalanche photodiode according to claim 10;
    A receiver having an electronic circuit formed on the substrate on which the avalanche photodiode is formed and having a function of amplifying an electric signal.
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