JPS6049470U - digital multimeter - Google Patents
digital multimeterInfo
- Publication number
- JPS6049470U JPS6049470U JP14127983U JP14127983U JPS6049470U JP S6049470 U JPS6049470 U JP S6049470U JP 14127983 U JP14127983 U JP 14127983U JP 14127983 U JP14127983 U JP 14127983U JP S6049470 U JPS6049470 U JP S6049470U
- Authority
- JP
- Japan
- Prior art keywords
- peak value
- detector
- integrating circuit
- digital multimeter
- waveform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Measurement Of Current Or Voltage (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の一実施例によるデジタルマルチメータ
の概略ブロック図、第2図は第1図の積分回路およびピ
ーク値検出器の具体例を示す回路構成図、第3図および
第4図は第2図のピーク値検出器のオペアンプにオフセ
ット調整機構を付加した例をそれぞれ示す回路構成図、
第5図aおよびbは第1図の発電機から直流出力端子を
経てバッテリに供給される全波整流波の電圧およびひず
み波型流の波形図である。 パ
10・・・電流検出用抵抗、11・・・積分回路、12
・・・ピーク値検出器、13・・・A−D変換器、14
・・・マイクロプロセッサ、15・・・デジタル表示器
。FIG. 1 is a schematic block diagram of a digital multimeter according to an embodiment of the present invention, FIG. 2 is a circuit configuration diagram showing a specific example of the integrating circuit and peak value detector of FIG. 1, and FIGS. 3 and 4. are circuit configuration diagrams showing an example in which an offset adjustment mechanism is added to the operational amplifier of the peak value detector shown in Fig. 2, respectively.
5a and 5b are waveform diagrams of the full-wave rectified wave voltage and distorted waveform current supplied from the generator of FIG. 1 to the battery via the DC output terminal. Para 10...Resistor for current detection, 11...Integrator circuit, 12
...Peak value detector, 13...A-D converter, 14
...Microprocessor, 15...Digital display.
Claims (1)
検出器で検出される信号波形を積分する積分回路と、該
積分回路からの積分出力のピーク値を検出するピーク値
検出器を備え、前記積分回路の積分定数を前記ひずみ波
の波形ひずみに応じて適宜選択することにより、前記ピ
ーク値検出器によって検出されるピーク値から実効値を
算出して測定し得るようにしたことを特徴とするデジタ
ルマルチメータ。Equipped with a detector that detects a signal with a waveform similar to a distorted wave, an integrating circuit that integrates the signal waveform detected by the detector, and a peak value detector that detects the peak value of the integrated output from the integrating circuit. , by appropriately selecting an integration constant of the integrating circuit according to the waveform distortion of the distorted wave, the effective value can be calculated and measured from the peak value detected by the peak value detector. A digital multimeter.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14127983U JPS6049470U (en) | 1983-09-12 | 1983-09-12 | digital multimeter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14127983U JPS6049470U (en) | 1983-09-12 | 1983-09-12 | digital multimeter |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6049470U true JPS6049470U (en) | 1985-04-06 |
Family
ID=30316029
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14127983U Pending JPS6049470U (en) | 1983-09-12 | 1983-09-12 | digital multimeter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6049470U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5433075A (en) * | 1977-08-19 | 1979-03-10 | Ando Electric | Mean value detector |
-
1983
- 1983-09-12 JP JP14127983U patent/JPS6049470U/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5433075A (en) * | 1977-08-19 | 1979-03-10 | Ando Electric | Mean value detector |
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