JPS602346U - Delay time generation circuit with two-stage overcurrent protection method - Google Patents
Delay time generation circuit with two-stage overcurrent protection methodInfo
- Publication number
- JPS602346U JPS602346U JP9288983U JP9288983U JPS602346U JP S602346 U JPS602346 U JP S602346U JP 9288983 U JP9288983 U JP 9288983U JP 9288983 U JP9288983 U JP 9288983U JP S602346 U JPS602346 U JP S602346U
- Authority
- JP
- Japan
- Prior art keywords
- overcurrent protection
- circuit
- delay time
- generation circuit
- time generation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Emergency Protection Circuit Devices (AREA)
- Rectifiers (AREA)
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の二段過電流保護方式の遅延時間発生回路
の構成を示した回路図、第２図は本考案による二段過電
流保護方式の遅延時間発生回路の一実施例の構成を示し
た回路図、第３図は第２図の動作を説明するための回路
図、第４図は第３図の時定数回路のコンデンサの充電電
圧の時間に対する変化を示した波形図である。
１・・・オペアンプ、２・・・コンパレータ、３・・・
オペアンプ、４・・・時定数回路、ＲＬ、 Ｒ□＋ Ｒ
２＋ Ｒ３＋ Ｒ４・・・抵抗、Ｔｒｌ、 Ｔ’ｒ２−
ｔ−ランジスタ、Ｃ１・・・コンデンサ。Figure 1 is a circuit diagram showing the configuration of a conventional two-stage overcurrent protection type delay time generation circuit, and Figure 2 is a circuit diagram showing the configuration of an embodiment of the two-stage overcurrent protection type delay time generation circuit according to the present invention. 3 is a circuit diagram for explaining the operation of FIG. 2, and FIG. 4 is a waveform diagram showing changes over time in the charging voltage of the capacitor in the time constant circuit of FIG. 3. 1... operational amplifier, 2... comparator, 3...
Operational amplifier, 4... time constant circuit, RL, R□+R
2+ R3+ R4...Resistance, Trl, T'r2-
t-transistor, C1... capacitor.
Claims (1)
流用過電流保護回路と、時間遅れを持った平均電流用過
電流保護回路とを有する二段過電流保護方式において、
前記平均電流用過電流保護□ 回路の過電流設定値用オ
ペアンプの出力にコレクタが接続されたＰＮＰ型トラン
ジスタと、該ＰＮＰ型トランジスタのベースに接続され
た時定数回路とからなる二段過電流保護方式の遅延時間
発生回路。As overcurrent protection for DC power supplies, a two-stage overcurrent protection system that has an instantaneous valley-type overcurrent protection circuit for instantaneous current and a time-delayed overcurrent protection circuit for average current,
Overcurrent protection for the average current □ Two-stage overcurrent protection consisting of a PNP type transistor whose collector is connected to the output of the operational amplifier for the overcurrent setting value of the circuit, and a time constant circuit connected to the base of the PNP type transistor. method delay time generation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9288983U JPS602346U (en) | 1983-06-17 | 1983-06-17 | Delay time generation circuit with two-stage overcurrent protection method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9288983U JPS602346U (en) | 1983-06-17 | 1983-06-17 | Delay time generation circuit with two-stage overcurrent protection method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS602346U true JPS602346U (en) | 1985-01-09 |
Family
ID=30223324
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9288983U Pending JPS602346U (en) | 1983-06-17 | 1983-06-17 | Delay time generation circuit with two-stage overcurrent protection method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS602346U (en) |
-
1983
- 1983-06-17 JP JP9288983U patent/JPS602346U/en active Pending
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