JPS6049334B2 - control storage - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control storage device used in a microprogram controlled data processing device.

In data processing devices using microprogram control, the microprogram is a readable and writable memory.
(hereinafter referred to as RWM), and read-only memory (hereinafter referred to as ROM). A memory device that stores such microprograms is generally called a control storage device. R in control storage
Whether to use OM or RWM is determined depending on the characteristics of each element and the intended use of the data processing device. ROM inherently has nonvolatile data and difficulty in changing data, and compared to RWM, access and
Time is big. On the other hand, RWM has data volatility, easy data modification, and short access time. Because of the non-volatile nature of data, ROM is generally used as a means for storing microprograms in control storage devices. However, when such a ROM is used, it is necessary to rewrite or replace the ROM when changing stored data, which requires a lot of time and money. Such problems become a major barrier to taking advantage of processing flexibility, which is one of the major features of the microprogram control system. Several means have been provided to solve the above problems, such as having the RWM memorize the changes in the microprogram and detecting when the changed word in the ROM is accessed. There is a method of switching the output from the RWM instead of the output from the ROM.

However, according to this method, in order to change any word in the ROM, R is required for the number of words that can be changed.
Because the WM requires a large amount of storage and the hardware required to detect when a changed word in ROM is accessed, it is not possible to change many words using an economical device. I couldn't make it possible.
On the other hand, when changing a microprogram, changes to one item may extend to several consecutive or adjacent words.
Therefore, changing just a few microprogram items involves changing several times the number of words. It will be seen that this allows conventional devices to be used with greatly reduced efficiency. SUMMARY OF THE INVENTION An object of the present invention is to provide an economical control storage device for a data processing device that has a simple configuration, allows modification of any part of a read-only memory, and can easily cope with changes in many microprograms. There is something to do.

According to the present invention, there is provided a read-only memory that is accessed by address information consisting of a segment address and a word address within the segment, and a segment change instruction bit that is accessed by the segment address of the address information. and an alternate segment address having a number of words equal to the number of segments in the read-only memory, and an alternate segment address sequentially derived from the first memory and a word address in the segment. accessed by and
a second memory for reading and writing modification information of modified segments having a number of segments smaller than the number of segments in the read-only memory; and a segment modification instruction bit read from the first memory; a switch for selectively switching and outputting information read from the memory and information read from the second memory; A control storage device configured by is obtained.

Next, an embodiment of the control storage device according to the present invention will be specifically described with reference to the configuration diagram shown in FIG. In the figure, for example, ROM is a 213-word x 16-bit read-only memory, RWM1 is a 7-word x 5-bit readable and writable memory, and RWM2 is a 7-word x 16-bit readable and writable memory. .
The ROM is accessed by a 9-bit segment ◆address information input line 100 and a 4-bit segment word●address 4 information input line 101;
Six bits of output information are routed to line 102. RWM1 is accessed by input line 100 for segment address information, stores alternate segment address information provided by input information line 200 and one segment change indication bit, and inputs the alternate segment address on information line 201. It also outputs segment change instruction information to the information line 202. RWM2 is RWMl
Alternate segment read by address information output line 201 and word in segment address information input line 101 and supplied by information line 300 of the 16-bit modified segment. It stores the contents and directs the output information to line 301. The outputs led through the output information lines 102 and 301, respectively, are applied to the switch MPX, and if the control signal of the separately led segment change instruction information line 202 is OFF 7, the output line 400 of ■A outputs the ROM output information to the line 202, and if the signal on line 202 is on,
Outputs the output information of RWM2. As mentioned above, RWM
l is input line 1 of ROM segment address information
It has a number of words equal to the number of segments in the ROM, as can be seen from the fact that it is accessed only through 00. If there is no need to change the microprogram, RW
The segment change instruction bit of all words of Ml is 64'2
The alternate segment address is normally set to all bits ゜゜0゛.

If it is necessary to change the microprogram, the word in RWM1 corresponding to the changed segment in the ROM is filled with an alternative segment address for accessing RWM2, which stores the contents of the changed segment, and the code "
A segment change indication bit asserted to 1' is written through information line 200. The contents of the modified segment are written through the information line 300 to the segment in RWM2 that stores the modified segment. Note that RWM2 selects the segment for storing changed segments.
By using unused segments within, it is possible to arbitrarily select. Next, to explain the read operation in this control storage device, if the microprogram is not changed, address information input lines 100 and 1
Read information from the ROM accessed by 01 and 01 is input to one of the MPXs through information line 102. On the other hand, RWM1 is accessed by the address information line 100, but since the segment change instruction bit is always "0", ■■ outputs the read information of the ROM to the read information line 400. In this way, , if there is no change in the microprogram, the microinstruction stored in the ROM is output.Next, we will explain the case where there is a change in the microprogram.Even in this case, the unchanged segment in the ROM is output. When accessed, the microprogram in the ROM is read out in the same way as the read operation when the microprogram is not changed.On the contrary, when a modified segment in the ROM is accessed, the microprogram corresponds to the modified segment. R.W.
The segment change indication information and alternate segment address stored in the word in M1 are read. Information line 202 is therefore turned on. RWM2 is accessed by the alternate segment address and intra-segment word address information and outputs the contents of the modified segment it stores on line 301. At this time, since the segment change information line 202 is on as described above, the output information of the RWM 2 is guided to the read information line 400. When a modified segment is accessed in this way, R
Instead of the output information of OM, the output information of RWM2 is read out as output. As explained above, the present invention handles changes in a microprogram in units of segments, stores the contents of segments after program changes in RWM2, and
In addition to detecting an access to a segment that has been changed by WM1, the storage location of the changed segment in RWM2 is known and R is used instead of the stored information in ROM.
By reading out the information stored in WM2, the effect obtained is significant in that it is possible to deal with changes in substantially many microprograms with a simple hardware configuration.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a control storage device according to the present invention.

Claims (1)

[Claims] 1 a read-only memory that is accessed by address information consisting of a segment address and a word address within the segment; and a read-only memory that is accessed by the segment address of the address information and that includes a segment change instruction bit and the read-only memory; a first memory for reading and writing an alternate segment address of a number of words equal to the number of segments in the first memory; and accessed by the alternate segment address read from the first memory and the intra-segment word address. and reading and writing modification information of modified segments having a number of segments less than the number of segments in the read-only memory.
a memory, and a switching device that is controlled by a segment change instruction bit read from the first memory and selectively switches and outputs read information from the read-only memory and read information from the second memory. Control storage configured by and.