JPS6048646A - Information converting system - Google Patents

Abstract

PURPOSE:To attain high-density recording by forming storage of DC to a code having opposite sign to that of the storage in a signal after NRZI modulation to reduce a DC component and a low frequency component thereby improving the bit error rate. CONSTITUTION:The consecution of the same levels is formed as <=4 bits in a signal after NRZI conversion. The m-bit information is allowed to correspond in one-to-one manner to a combination selected by a prescribed condition. The head bit is inverted by using an input from a latch circuit 6 every appearance of the 2nd combination where DC storage is 0 and the control is attained and the 3rd combination the storage of DC is controlled to <=2. Thus, the DC component and the low frequency component are reduced and the bit error rate is improved.

Description

[Detailed Description of the Invention] Industrial Application Field This invention relates to information conversion systems, particularly when digital signals are recorded or transmitted, and isobaric is used to convert digital signals into signals suitable for the recording system or transmission system. This invention relates to a suitable information conversion method.

Background technology and its problems For example, in a device that converts audio signals into PCM and performs magnetic recording using a rotating head without forming a guard band, problems arise due to differential output characteristics of magnetic recording and low-frequency crosstalk from adjacent tracks. In addition, since the rotary transformer cuts off low frequency components, there is a problem in that faithful reproduction of low frequencies cannot be achieved.

Therefore, in such devices that have a narrow recording/reproducing frequency band and are required to have few low-frequency components, the recorded signal must be modified by a modulation method that has few frequency spectral components in the low-frequency component and DC component regions. It is effective to do so, and the so-called NIIZi 81 method is one example. This &:J: :="-Inverts the signal at 1" in the middle of the evening, and then inverts it at '()'.

However, in the NRZI modulation method, if "0" continues, the modulation signal is no longer inverted during that time, and the frequency decreases, causing the disadvantage that the DC component and low-frequency component increase.

Therefore, information based on PCMK is decomposed into an arbitrary number of bits and each of them is converted into a large number of bits to prevent a large number of consecutive 0''s.

Furthermore, when attempting to perform the above-mentioned recording using a small device such as a portable device, it is difficult to make the rotating head smaller, the recording track becomes narrower, the S/N ratio of the playback output is poor, and the recording There are problems such as narrow bandwidth.

Here, for example, with respect to S/N, it is desirable that the ratio between the detection window @(Tw) during demodulation and the minimum inversion width ('I'mjn) be as small as twice or less.

Therefore, a conversion method called the Gabor code has been proposed for some time.

The Gabor code converts 2 bits (811B2) of information into 3 bits (Pl, B2.B3), and the conversion formula is: P1=P3p-4-IJI÷Drunk・131fP2''
'3p-possible B2 B3 = P3p+ Bl + 82 However, p in Zafix is the information that was converted previously, f is the information that will be converted next, and the demodulation formula is: B1 = P3p, Plp-1 -P3p-r'■-P3
It is given by B2-■12・P.

In this Gabor code, ``'w = 0.67'
V.

Tm1n = 0.67 T % i'max (maximum inversion 111r, ) = 1.33 T (time or wavelength equivalent to 1 bit of Tri variable iM 7 = -ta), where Tw and I''min The ratio is 1.

Furthermore, a conversion method called 4/'5 conversion has also been proposed.

The 415 conversion method is 4 bits (Bl + 82 + '-
'3 + '4) information as 5 Pits I・(Pl r B
2 + B3 + B4 + '5), where the number of consecutive ons is set to be two times lower in N) LZI expression.

In other words, in a combination of 5 bits, 1 at the beginning and 1 at the end
There are 17 cases where 1011 is not consecutive and the number of consecutive "0"s between them is 2 or less. Therefore, the 16 ways of the 4-bit modulated data (oooO) to (1111) are converted in one-to-one correspondence with any 16 ways out of the above-mentioned 17 ways.

In this way, conversion can be performed such that the number of "0"s between "1"s is always 2 or less.

In this 415 conversion method, Tw=0.8T.

Tmin = 0.8 T% i'max = 2
．． 4 T, where the ratio of TW and '1゛1□+in is 1.

However, in these methods, a DC component exists in the signal after NFLZI conversion.

Here, if a DC component exists in the modulated signal, that is, the recording signal, even if V! , for the original signal as shown in Figure 1A, what should originally be reproduced as shown in Figure 1B is actually offset so that the DC component becomes O as shown in Figure 1C. As shown in the first diagram, the output signal becomes a signal whose time axis has been varied, making it impossible to faithfully reproduce the digital waveform.

For this reason, frequencies etc. are determined taking these into consideration, so
There were problems such as the inability to increase the recording density.

On the other hand, for example, 16/20 conversion, 24/307 conversion, etc. can perform conversion without a DC component.

However, in these methods, the constraint bit length required for both conversion and inverse conversion becomes extremely long, the device becomes extremely large, and error propagation is large, making it impractical.

Also, 'I'min and 'I'maX correspond to the lower limit and upper limit of the frequency of the recording signal, respectively, and if this ratio is too large, problems will arise in terms of frequency characteristics and the like. Accordingly, it is necessary to make this ratio less than 4 times by 8 times.

Purpose of the Invention In view of the above, the present invention proposes an information conversion method that can reduce direct current components and low frequency components and has a short constraint bit length.

Summary of the Invention This invention provides that when m-bit information is converted to n-bit information larger than m, the n-bit information is converted into NR
, in the signal after ZI modulation, the number of consecutive same levels is 4 pits or less, and the first combination in which the DC accumulation in the n bits is fixed to O, and the first combination in which the DC accumulation in the n bits is fixed to 0. , a second combination that can be controlled, and a third combination that can control the accumulation of the IN flow to 2 or less, and a combination in which the information of the two In bits is manually selected as described above. There is a one-to-one correspondence with -
When the second and third combinations are used, the positive and negative signs of the DC accumulation are stored, and when the second and third combinations are used next, the DC accumulation is This is an information conversion method that converts the leading bits of the second and third combinations described above so that the sign is opposite to that of storage, and the bit error rate is reduced by reducing DC components and low frequency components. is improved, and high-density recording becomes possible.

"'! #Q Example Below, we will explain one embodiment of the present invention, taking as an example the case where 8-bit information is converted to 10-bit information, and
Explain the details based on Figure 7.

Here, 8 bits (Bi + ”21133, B41
115゜Ba * B7 + Bs) Noi Evening News 1
0 Hiso) (P, , , P2゜P3 + P4 T
P5 , P6 + P7 r PB , , Pg ,
J'l. ), so 8 pits) (
The possible forms of information I31-138) are 28 = 25
There are 6 bottles.

On the other hand, in order to remove the DC component, Nl(, 1 in the signal after ZI modulation)
5 bits out of 10 bits are upper white), 5 bits are negative (0)
It is enough. It should be noted that if RmaA/Tm1n-4 is used, the issue is that the number of consecutive O'' in the NR7,I expression is limited to 31 or less F1, that is, the number of consecutive same level in the modulated signal is 4 bits or less.

Considering such a handiwork, -e, and further N It, 7
．． In the I expression, the number of first or last "0" is classified into (), 1, 2, and 3, and the number of combinations in each case is as shown in Table 1 below. Become.

Table 1 From Table 1, the connection between 10-bit patterns -
For example, if the number of 0"s at the beginning is 2 or less and the number of 0"s after i% is 1 or less However, in this case, the number of combinations is 69 to 34-1-40+29
There are only +20+10=193 ways. Now l, -j:
There are fewer than 8 bits 256 combinations, and the number would be even fewer for other ways of carrying. ik is, this 19
Three combinations where the DC component is 0 + t, and a combination where the DC accumulation is fixed at O for reasons that will be explained later.
(hereinafter referred to as the first combination), the accumulation of DC is 0, and the control is directed toward reducing the DC component.
J'fi:': (hereinafter referred to as the second union U)).

Therefore, tA it is performed for combinations other than DC component 0. 1, that is, for example, if the number of the last "0" is 1 slender F, the number of combinations of the first number of 60" and the DC storage M [ζ" are as shown in Table 2 below.

Table 2 From this Table 2, the number of combinations where DC accumulation is -2 is 52-
1-43 + 30 = 125 ways, DC accumulation is +
The number of combinations of 2 is 100 + 40 -1- 11
= It turns out that there are 151 ways.

Here, regarding the accumulated amount of DC, for example, as shown in FIG. 2, this is the case where the last combination of the previous one is negative (0).

Therefore, if the previous combination ends with a positive (1), the positive and negative signs are reversed. For example, if the first bit is ′
When the leading bit of the combination of "0" is converted to "1", the sign of the accumulated amount of DC is reversed as shown in FIG.

In addition, the low-frequency spectrum of the modulated wave shows that the DC accumulation is +2. The more combinations of alternating -2 combinations there are, the lower the flow rate becomes. Therefore, the DC accumulation is 125 combinations of +2 and -2 pairs (hereinafter referred to as the third combination). In addition, the 256 combinations of 8 bits are combined with 7.1, and the remaining 131 combinations have a DC accumulation of 0. Make it.

However, since the DC accumulation is a pair of combinations of +2 and -2, it is possible to control the DC accumulation by simply changing the first bit (the second and subsequent bits of the pair of combinations are set to the same fQ' number). 17) Select the pair 4; You may also do the following, for example, if the accumulated amount of DC in Table 2 is +2. -2
Then, use the combination 40-1-11 + 43 + 30 = 124 combinations where the first bit is °゛(〕'') (7, this third button combination 124 approaches,
The DC accumulation of O, in this case 132 combinations, may be in one-to-one correspondence with 256 combinations of 8 bits. Each time this combination of river 3 appears, the first bit is converted so that the accumulated amount of DC becomes IE1 negative.

That is, as shown in FIG. 4, when the third combination appears, the number of inversions P (the number of "l") from the second bit
If the number of inversions is even before the next combination of 7113 appears, the first bit (arrow) of the button is converted to ``1'' as shown in Figure 4A, and if it is a Te number, it is converted to ``1'' in Figure 4 (As shown, it is set to '0''.

Even if +2 DC is accumulated as a result, the current is canceled out by the combination of the next filter 3, and the 1 current component becomes 0 in any combination.

By the way, as mentioned above, the accumulation of 1a style is +2. -124 third combinations (124 shrines) that can be controlled to 2
When choosing , the accumulation of 1α flow is the combination of O (・ma1
The remaining 61 options will be discarded, leaving 32 options 1 and 7.

On the other hand, a combination in which the DC accumulation is 0 was previously thought to be a preferable combination because the DC component was small, but upon careful consideration, it was found that the DC It turns out that there are combinations that have good properties in terms of direct current, and conversely, combinations that have bad properties in terms of direct current.

-j That is, the accumulation of direct current is +2 or °, and -2 is the control index of 2n3 thread alignment. Select the combination 1- in which the accumulation of is -2, and (when 4' is -1, select the combination in which the accumulation of DC is +2, but IN 1j
In the case of a combination in which the accumulation of fr, is 0, for example, Fig. 5 Ap
To explain the combination of [001th 0101.0] code with 0 DC accumulation as 1], if used when the previous DC accumulation information Q' is 1, the DC accumulation will be 1. 5 As shown by the solid line in Figure 1, Mf is shifted around I)C,...o, and finally reaches 1 at the end of the combination, and the DC component is small, so it can be said to be a preferable combination, but in 4:h cow. When the accumulated DC information Q' is -1, the accumulation l of the itV current will change around I)C=-7 as shown by the broken line in Figure B, and finally at the end of S matching. -1, there is a large DC component, and it can be said that the size is not suitable/roughly matched.

Therefore, the accumulation of DC is O+7)
Accumulated DC information at 4 (when n' is 1, ifi fi
When lj, a good combination of I1゛□P( and -1, a pair of combinations with good properties in terms of direct current (this is the second combination ゎ-l and seven gates) and when converting, these are H1
All you have to do is choose.

This combination of DC accumulation of 0 causes Q/・- to become 1・
In which case of 1-1 is it more advantageous to use it?
'One of the ways to transfer is, for example, I DSV (In
tegral) digital Sum Value
) is used. This is the integral value of DC accumulation for each focus of the combination. For example, in Fig. 5B, the area formed by the broken line of DC accumulation information Q' and the DC = 00 straight line corresponds to the point. , when Q'=1 11) SV=-1
, when Q'=-1, 11) 8V=-21. This ID
At 8V, the DC accumulation is 0, which is 193.Among the LD combinations, it is better to use when Q'=-1103
As expected, it is better to use 9011T1 when Q'=1.
It becomes

In addition, as another method for evaluating this DC component, 1) SV
You may use a value of This means that the high level 6 bits of the waveform is +1 point, the low level "0" is 11 points, and when Q'-1, the bits start from 1, and when Q' = -1, start from -1. As the game progresses, the total score is obtained one after another within one combination.
The more it contains, the less direct current components and low frequency components there are.

Incidentally, this I) 8 V is requested in No. 5W413K,
V, ) root, Q'-1 when ID5VI = t.

Q', -,, -1 (DRID8Vl=3f exists.

It should be noted that this combination in which the DC accumulation is 00, as well as the combination in which the DC accumulation can be controlled by +2 or -2i as described above, can easily be made into a pair that can be trolled by 17 by changing the leading bit. Also a force meter.

In this way, without discarding all the remaining 61 combinations of the combinations of 00193 and turtles, the DC accumulation obtained from the angle in Table 2 is As mentioned above, if it is preferable to pair and use the ξ direction, use the pair in a silk manner, and the DC component and low-frequency component can be reduced by the rib. By the way, if all the remaining 61/mountain combinations are used as pairs, 8 bits 256
There are 132 possible combinations (τit 1) in which the DC accumulation is 0, so in the end, 61 of these 132 combinations form a pair of controllable river combinations (the second one). combination), and the remaining 71 combinations are used as combinations in which DC accumulation is fixed to 0 (first silk combination).

Also, when the DC accumulation is 0 and Q'=1, 11! ? A combination with good DC properties and a combination with one or two DC accumulations (can only be used when Q' = -1) are made,
Alternatively, a combination with good DC properties when the DC accumulation is 0 and Q'=-1, and a combination of DC accumulation → (-2)
(Can only be used when Ji' = 1) You can also make money with
It is J-Noh.

Examples of 256 combinations (boards) made using this method are shown in Table 3 below.
As a selection method for two pairwise combinations, for example, IJ3. An example of this is shown below.

\ \ \ In addition, in Table 3 above, the first 84 combinations in which the DC accumulation is fixed to 0 (corresponding to data OO to 53), if
The second combination 4 where the flow accumulation is O and can be controlled
8 ways (corresponding to data 54 to 84), DC accumulation +2
In addition, there are 124 third combinations that can be controlled in 1-2 (corresponding to data 84 to F'F), and lID5VI
It is configured by Mi matching such that ≦15.1DSVI≦3. In either case, when the accumulated DC information Q' is -1, the combination (code) on the left side is used, and when it is 1, the combination (code) on the right side is used.

Further, Table 4 below shows an example of /he consisting only of combinations in which no consecutive Tm□ appears, and the selection of the two combinations is performed only by controlling the leading bit. Here, the sequence of 'imax' is expressed as a chord, for example, 6...100010001...'', and the fact that the arm turn of this chord does not occur means that
Conversely, it is also possible to use this pattern (Tmax continuous) as the identification signal 7, for example, as a sink/mother turn.

Table 4 above shows the first combination 107 series in which the DC accumulation is fixed at 0 (corresponding to data 00 to 6A), and the second combination 31 in which the DC accumulation is 0 and can be controlled.
(corresponding to data 6B to 89), third combination 118 that can control the accumulation of 1a style to 2 or -2
(corresponding to data 8A, -FF), and tsl II)
It is composed of a null combination of SVI≦17 and lD8Vl≦3. Also in this case, when the accumulated DC information Q' is -1, the combination (code) on the left side is used, and when it is (2), the combination (code) on the right side is used. In addition, in Tables 3 and 4 above, Q, =
-1 is written as Q=O.

FIG. 6 is an example of a device that performs conversion according to the two-part system. In the figure, (1) is an input terminal, (2) is an 8-bit input terminal, (3) is a conversion logic, (
4) is a 10-bit shift register for output.

The information supplied to the input terminal (1) is then applied to the clock terminal (5) at the data bit rate.! 8 bits at a time are transferred through the shift reno star (2) by
8 pits), (+'3.~B8) information is supplied to the conversion logic (3). In this conversion logic (3), the above-mentioned one-to-one conversion is performed, and the converted 1()pi) ((
-'1~P1o) information is sent to shift reno star (4).
I: Provided.

□The number of inversions of the signal after conversion is output ((). Here, the number of inversion ports is known in advance for each combination, so for example, information on the number of inversions ( It is only necessary that the number of inversions is a large number or 9, and for example, outputs corresponding to zl and ``bi'' can be output at the same time.This output Q is connected to the latch circuit (6
), and this lug output Q' is supplied to the conversion logic (3).Furthermore, the timing of the pulse supplied to the clock terminal (5) at the data bit rate is determined by the timing detection circuit This timing signal is output every 8 bits).
1) and the latch end r of the latch circuit (6), and when converted into the above-mentioned first combination, the 10 bits of the output are supplied to the output terminal I, 1) of the latch circuit (6). The amount of reversal f! of the combination of the output α1 is output to ! According to the input signal P and the input Q' from the latch circuit (6), the output Q is taken out as the DC accumulation information as shown in Table 5 below. In other words, when the DC accumulation is O, if the number of inversions P is an even number (0"), the latch circuit (6"
) is taken out as the 1 inch output Q and latched into the respective latch circuits 113), and the next +
It is transmitted in accordance with 4i. - In the meantime, if the number of inversions P is an odd number (“1”), the value of the human input Q/ from the latch circuit 1G) will have its polarity reversed and will be output as an output (-), respectively. It is latched into the latch circuit (6) and transmitted to the next combination.

This can be easily determined using this output Q quadratic formula.

Also, when is it converted to the second combination? Depending on the polarity of the input t, 9' from the 10 bits (+, shiso f- circuit circle) of the output of the tX transducer Ronok (3), the initial bit of the word is
1"Y is converted to "0", and based on the number of inversions P, etc., as shown in Table 5 above, the output Q is taken out as DC accumulated information, as in the first combination.

Still, when converted to the third combination I-1, the 10 bits of the output of the conversion ronoc (3) - circuit 1c
According to the polarity of the input Q' from 1), the first pitch 1 is converted to "Bishaku wa 0", and based on the number of inversions P, etc., information on the accumulation of DC is generated as shown in Table 5 above. as 1
11 force Q is taken out. However, in this case, the input Q′
When is −1, only the combination with +2 DC accumulation is used.
In the case of ■, only the combination in which the DC accumulation is -2 is used.

In other words, if the input Q' from the latch circuit (6) is 1, the amount of accumulated DC up to that point is at least 1 or more, so the accumulation of DC in the current combination is controlled in the negative direction. It is preferable that the first bit is 1", and the first bit is inverted to 1". Therefore, at this time, the shift reno star (4)
is supplied with information in which only the leading bit is inverted to "1".

If the input Q' from the latch circuit (6) is still -1, the DC accumulation needle up to that point is at least 11 or less, so the DC accumulation of the current combination is controlled in the positive direction. It is preferable to do this, so the first bit is inverted and set to "1". At this time, information on the accumulation of direct current is transmitted as follows. That is, in Table 5 above, when the DC accumulation is +2, if the number of inversions P is an even number (0''), the value f of the input Q' from the latch circuit (6) (the value obtained by adding +2) is , if the number of inversions P is an odd number (bi), the value of the input Q' from the latch circuit 1G is +2.
IJon, its pole [++ is reversed (-7, f direct) is taken out as output Q, latched in latch circuit (6), and transmitted to the next combination as DC *m information.On the other hand, ,
When the DC accumulation is -2 (Yes, if the number of inversions P is an even number, the latch circuit!()) is the value of the input Q' from the latch circuit! If is a multiple number, add -2 to the input Q' from the latch circuit (6), take out the value with the polarity reversed in 1-7 as the output Q, and calculate the respective latch circuit +6) i・te. Latch 1~, DC accumulation information and l
, and transmits it to the next combination.

In other words, in this case as well, we can obtain the L opening formula (・ζ 茫 and then the way of exit (shi).

Therefore, information on the accumulation of DC up to the third combination ``1'', its i(() is received It-J, Direct Dw
The function is to control the initial focus so that the accumulation of images approaches 0.

Returning to FIG. 6 again, the contents of the above-mentioned fill (converted to 10 bits and taken into h-enftrenostar (4)) are as follows.
11 (by a clock signal with a frequency 5y4 times the clock of the input signal supplied, 11 "
The next signal (outputted) is supplied to the JK flip-flop circuit (9), and is applied to the clock terminal of the flip-flop circuit (9) at terminal C8). The clock signal from the flip-flop circuit (9) modulates 1, 1, 11, 7, and 1, and the g signal is taken out to the output terminal (10).

Also, Fig. 7 shows an example of a device for the iv key]'ζ.
In the figure, the number 1n from the input terminal 1ll) is [ゝJ11. Z I's "-sub circuit 03, then I
O bits are supplied to the shift register (11), and transferred in units of 10 bits through the shift register (l row) by the pulse of the code from the clock terminal (14). (+'l −
The information of PIO) is supplied to the converter +149.Then, f-modulation is performed by the above-mentioned one-to-one inverse conversion, and the demodulated information of (Bl-88) is supplied to the nftrenostar (lfi). Then, the timing signal (P pulse of block 4 + J) detected by the timing detection circuit (17) from the 9 pulses of the HH child (14) is applied to the shift reno star (load terminal L l of 10). flfK is incorporated. And Schiff) Renosta (1 (
The contents of 0 are shifted to the clock terminal uB at the f-tabit rate by the clock signal 11, and are outputted every 1 yen from the output. Note that when the above-mentioned second and third combinations 1 knee 1 and 10 bits are supplied, I±
, the first bit is ignored and the inverse transformation is performed.

In this way, it is possible to carry out the conversion, 1 and demodulation.

Then, according to this method, 'l'W = '1'+
1i 1+ = (1,8'1.'.

Tmax = 3.2T. Here, the above-mentioned
! For A1-do, there is a disadvantage of an increase in the fly rate due to the expansion of maX, but this disadvantage is overcome by the advantage that there is no 1. By canceling out tl, better recording and reproduction can be performed.

The recording density is the same on the 11-axis as the 415 conversion method described above, and furthermore, since this method does not have a DC component of 1 inch, there is no time axis fluctuation of the reproduced signal as described above, and recording at a higher frequency is possible. Regeneration is possible, and recording can be made to a higher density.

``Also, unlike the above-mentioned 1.6/20 conversion and 24/30 conversion, the constraint bit length does not become long.

Note that the above embodiment is for converting 8-bit information into 10-bit information, but it can be similarly applied to other cases where m-bit information is converted to n-bit information larger than m. can.

Effects of the Invention As described above, according to the present invention, in the signal after Nll and ZI modulation, the number of successive bits of the same level is 4 or less, and the accumulation of the flow to l of n bits of conversion information is reduced to O. The fixed first combination and the 1!8 product of DC are 0
A second combination that can be controlled, a third combination that can control the accumulation of DC to 2 or less, and a combination that has m bits of converted information selected under the above conditions. We created a one-to-one correspondence, and inverted the first bit each time a thousand characters appeared for the combinations 2 and 3. is reduced, the bit error rate is improved, high-density recording is possible, and constraint bits can also be returned, making HI
4r, '1゛w is large, ''+n * x / '
1% □ mountain is under 41 and 15 is suitable for a rotary head modulation method with few band components (useful for use as a recording device equivalent to) 8

[Brief explanation of drawings]

Figure 1 is a diagram for explaining the conventional method, Figure 2~
Figure 5 is a reproduction of this invention, )III 1.4 Provided/○
Fig. 6 used in the invention of the dove 11. Figure 7 is a configuration diagram showing an example of a demodulation device that uses Tl in this invention. (11 is an input terminal, 12 is an ill branch) Shift/Nos' % (3) ”'Conversion Ronotsuku, (5), t8)
fd clock Q; glass, (6) 11, latch circuit, (
7) is a timing detection circuit, (9) (7i flip-flop circuit, tl (H) is an output terminal.

Claims (1)

[Claims] In converting the information of rn hits into n-bit information, which is larger than m, the n-bit information is made such that the number of consecutive same levels is 4 bits or less in the signal after NILZI modulation, and A first combination in which the accumulation of DC in the n bits is fixed to O, a second combination in which the accumulation of DC is 0 and can be controlled, and the accumulation of DC is controlled to be 2 or less. The third possible combination is such that the m-bit information corresponds one-to-one with the combination selected in the Φ items, and the second and @3
When the 0 combination is used, the positive or negative sign of the DC accumulation is stored, and when the second and third combinations are used next, the DC accumulation has a sign opposite to that stored. An information conversion method that converts the leading bits of the second and third combinations described above.