JPS6048096B2 - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor deviceInfo
- Publication number
- JPS6048096B2 JPS6048096B2 JP13872478A JP13872478A JPS6048096B2 JP S6048096 B2 JPS6048096 B2 JP S6048096B2 JP 13872478 A JP13872478 A JP 13872478A JP 13872478 A JP13872478 A JP 13872478A JP S6048096 B2 JPS6048096 B2 JP S6048096B2
- Authority
- JP
- Japan
- Prior art keywords
- protective film
- semiconductor device
- manufacturing
- moisture resistance
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Drying Of Semiconductors (AREA)
Description
【発明の詳細な説明】
本発明は、耐湿性が高い保護膜を有する半導体装置を製
造するのに適用して有効な方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method that is effective when applied to manufacturing a semiconductor device having a protective film with high moisture resistance.
一般に、半導体装置では、湿度の影響を避ける為、ボン
ディング・パッド部分を除き保護膜を形成することが行
なわれている。Generally, in a semiconductor device, a protective film is formed except for the bonding pad portion in order to avoid the influence of humidity.
そして、そのような保護膜としては、或る種の樹脂、燐
硅酸ガラス、スパッタ法で形成した二酸化シリコン、化
学気相成長法（ＣＶＤ法）で形成した二酸化シリコン等
が材料になつている。このうち、多用されているのは燐
硅酸ガラス、即ち、ＰＳＧであるが、これの耐湿性につ
いては然程多くを期待できず、また、二酸化シリコンは
比較的良好であるが、それでも事故を生じることがある
。本発明は、ＰＳＧ）ＢＳＧ（硼硅酸ガラス）、ＡＳＧ
（砒硅酸ガラス）、二酸化シリコン等のガラスを材料と
する半導体装置保護膜の耐湿性を極めて簡単Ｌ−−／−
ｎＪ−セ＝をプＨＬ＋ユレ■−、Ｊ、＋スＬの’７ ー
本り、以下これを実施例について説明する。Such a protective film is made of a certain type of resin, phosphosilicate glass, silicon dioxide formed by sputtering, silicon dioxide formed by chemical vapor deposition (CVD), etc. . Among these, phosphosilicate glass, or PSG, is widely used, but its moisture resistance cannot be expected to be very good, and silicon dioxide, although relatively good, is still prone to accidents. This may occur. The present invention is based on PSG) BSG (borosilicate glass), ASG
Extremely easy to improve the moisture resistance of semiconductor device protective films made from glasses such as (arsensilicate glass) and silicon dioxide L--/-
Hereinafter, an example will be described.
本発明が基本とするところは極めて簡単であつて、例え
ば、ＰＳＧからなる保護膜に対して、高周波スパッタ、
エッチング、即ち、所謂逆スパッタ・リングを施すもの
である。The basic principle of the present invention is extremely simple. For example, high-frequency sputtering,
Etching, that is, so-called reverse sputtering is performed.
一般に、高周波スパッタ・エッチングを行なう、被エッ
チング対象物は勿論エッチングされるが、それと同時に
、スパッタ原子の再附着も発生する。Generally, an object to be etched by high-frequency sputter etching is of course etched, but at the same time, sputtered atoms are also re-deposited.
本発明では、この現象を利用するものであり、特に、ス
パッタされた金属原子を保護膜に再附着させると耐湿性
は著しく向上する。図は本発明の一例を実施する場合の
説明図である。The present invention utilizes this phenomenon, and in particular, when sputtered metal atoms are redeposited on the protective film, the moisture resistance is significantly improved. The figure is an explanatory diagram for implementing an example of the present invention.
図に於いて、１及び２は電極、３は高周波電・源、４は
半導体ウェハ（或いはチップ）、４ａは保護膜、４ｂは
ボンディング・パッドをそれぞれ示す。In the figure, 1 and 2 are electrodes, 3 is a high frequency power source, 4 is a semiconductor wafer (or chip), 4a is a protective film, and 4b is a bonding pad.
図示例に於いて、電極１及び２はステンレスにアルミニ
ウムをコーティングしたものを用いていフるが、材料と
しては、これに限らず、他の多くの金属を選択すること
ができる。In the illustrated example, the electrodes 1 and 2 are made of stainless steel coated with aluminum, but the material is not limited to this and many other metals can be selected.
さて、本実施例に於いて、電極１、２間をアルゴン（Ａ
ｒ）雰囲気となし、高周波を印加すると保護膜４ａはエ
ッチングされるが、それと同時に５電極１、２をコート
しているアルミニウムや、アルミニウムのボンディング
◆バッド４ｂの一部がスパッタされ、そのアルミニウム
原子は保護膜４ａの表面に附着する。Now, in this example, argon (A
r) When a high frequency is applied in an atmosphere, the protective film 4a is etched, but at the same time, the aluminum coating the 5 electrodes 1 and 2 and the aluminum bonding pad 4b are sputtered, and the aluminum atoms is attached to the surface of the protective film 4a.
従つ゜Ｃ１その表面は保護膜物質とアルミニウムとが混
在するような状態に在る皮膜で覆われ、その皮膜の作用
で耐湿性は大幅に向上するものである。ここで考えられ
るのは、そのような皮膜の存在に依るリークの問題であ
るが、次の条件で行なつた高周波スパッタ・エッチング
に依つて形成された皮膜ではリークは全く発生しなかつ
た。Therefore, the surface of C1 is covered with a film in which the protective film substance and aluminum are mixed, and the action of this film greatly improves the moisture resistance. What is considered here is the problem of leakage due to the presence of such a film, but no leakage occurred at all with the film formed by high-frequency sputter etching performed under the following conditions.
高周波電力２００〔ｗ〕で５〜１００〔分〕同 ３０
０ＣＷ〕で１５〔分〕同 ４００〔ｗ〕で１０〜２０
〔分〕
いずれの場合も周波数は１３．５６〔ＭＨｚ〕であつた
。5 to 100 [minutes] with high frequency power of 200 [W] 30
15 [minutes] at 0 CW] 10-20 at 400 [W]
[minutes] In both cases, the frequency was 13.56 [MHz].
尚、高周波スパッタ・エッチングを長く施した場合には
、耐湿性は大になるが、リークを生ずるようになること
は当然である。前記のようにして保護膜４ａの表面に皮
膜を形成した半導体ウェハ４を高温（１２０〔℃〕）・
高湿●加圧試験、例えばＰＣＴ（ＰｒｅｓｓｕｒｅＣＯ
ＯｋｅｒＴｅｓｔ〕を１２〜２４〔時間〕程度行なつて
も、燐の溶出などの異常は生じなかつた。Incidentally, if high frequency sputter etching is applied for a long time, the moisture resistance will be increased, but it is natural that leakage will occur. The semiconductor wafer 4 with a film formed on the surface of the protective film 4a as described above is heated to a high temperature (120 [°C]).
High humidity ●Pressure test, e.g. PCT (PressureCO)
Even after conducting the OkerTest for about 12 to 24 hours, no abnormality such as elution of phosphorus occurred.
以上の説明で判るように、本発明に依れば、半導体装置
を完成させるに際し、保護膜にボンディング・バッドを
露出させる窓を形成してから、半導体ウェハ或いはチッ
プに高周波スパッタ●エッチングを加え、保護膜表面に
金属原子を再附着させるようにしているので、その保護
膜の耐湿性を飛躍的に向上することができ、信頼性の高
い半導体装置が得られるものである。As can be seen from the above description, according to the present invention, when completing a semiconductor device, a window is formed in the protective film to expose the bonding pad, and then high-frequency sputter etching is applied to the semiconductor wafer or chip. Since the metal atoms are re-attached to the surface of the protective film, the moisture resistance of the protective film can be dramatically improved, and a highly reliable semiconductor device can be obtained.
図は本発明の一例を実施する装置の概略説明図である。 The figure is a schematic explanatory diagram of an apparatus implementing an example of the present invention.
Claims (1)
パッド露出用窓を形成してから高周波スパッタ・エッチ
ング処理を加え、被スパッタ金属原子を前記保護膜上に
再附着させる工程が含まれてなることを特徴とする半導
体装置の製造方法。1 Bonding/bonding to the protective film formed on the semiconductor substrate
A method for manufacturing a semiconductor device, comprising the steps of forming a window for exposing a pad, applying high-frequency sputtering and etching treatment, and re-depositing metal atoms to be sputtered onto the protective film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13872478A JPS6048096B2 (en) | 1978-11-10 | 1978-11-10 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13872478A JPS6048096B2 (en) | 1978-11-10 | 1978-11-10 | Manufacturing method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5565439A JPS5565439A (en) | 1980-05-16 |
| JPS6048096B2 true JPS6048096B2 (en) | 1985-10-25 |
Family
ID=15228659
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13872478A Expired JPS6048096B2 (en) | 1978-11-10 | 1978-11-10 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6048096B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61175890U (en) * | 1985-04-18 | 1986-11-01 |
-
1978
- 1978-11-10 JP JP13872478A patent/JPS6048096B2/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61175890U (en) * | 1985-04-18 | 1986-11-01 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5565439A (en) | 1980-05-16 |
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