JPS6045998A - Memory control system - Google Patents

Memory control system

Info

Publication number
JPS6045998A
JPS6045998A JP58153850A JP15385083A JPS6045998A JP S6045998 A JPS6045998 A JP S6045998A JP 58153850 A JP58153850 A JP 58153850A JP 15385083 A JP15385083 A JP 15385083A JP S6045998 A JPS6045998 A JP S6045998A
Authority
JP
Japan
Prior art keywords
rom
address
fixed pattern
information
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58153850A
Other languages
Japanese (ja)
Inventor
Toshihiro Miyamoto
十四広 宮本
Masami Yamamoto
正己 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58153850A priority Critical patent/JPS6045998A/en
Publication of JPS6045998A publication Critical patent/JPS6045998A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards

Abstract

PURPOSE:To process information change easily and precisely without using a fixed pattern ROM by switching the fixed pattern ROM and a write type ROM in accordance with a decoded address to read out information. CONSTITUTION:When an address from a data processor 1 can not be decoded by a decoder 4, the address is supplied as it is to a mask ROM2 of the fixed pattern ROM and the information is read out from the ROM2. On the other hand, an EPROM3 is accessed by the address decoded by the decoder 4. In said constitution, low frequent information change can be easily and precisely processed by rewriting the EPROM3 without forming a new fixed pattern ROM.

Description

【発明の詳細な説明】 （８）　発明の技術分野 本発明は固定パターン・ロムを有しロム内容、特に文字
発生器として用いるロムを使用するデータ処理装置にお
けるメモリ制御方式に関するものである。DETAILED DESCRIPTION OF THE INVENTION (8) Technical Field of the Invention The present invention relates to a memory control system in a data processing device that has a fixed pattern ROM and uses the ROM contents, particularly as a character generator.

（ｂｌ　従来技術と問題点 データ処理装置は使用する文字をロムを用いて文字発生
器とし、文字発生器を検索して文字を表示する方法が一
般に用いられている。一方使用される文字は使用者に依
って限定されることが多い、従って此のロムは固定パタ
ーン・ロムを用いることが文字発生器を作製する上で安
価で有るとばった理由から用いられている。然し格納す
る文字も特殊文字の要求から変更する必要が生ずる。此
の変更に対処して固定パターン・ロムを製作し直すこと
は本来の安価性を損なうと言った欠点があった。(bl) Prior Art and Problems In data processing devices, a method is generally used in which the characters to be used are used as a character generator using ROM, and the characters are searched for and displayed. Therefore, this ROM is used because it is cheap to make a character generator by using a fixed pattern ROM.However, the characters to be stored are also special. It becomes necessary to make changes based on the character requirements.Remanufacturing the fixed pattern ROM in response to these changes has the disadvantage of compromising its original cost.

（ｅ）　発明の目的 以上従来の欠点に鑑み本発明は、固定パターン・ロムを
作製することな（変更に対処し得るメモリ制御方式を提
供することを目的とするものである。(e) Purpose of the Invention In view of the drawbacks of the prior art, it is an object of the present invention to provide a memory control system that can handle changes without creating a fixed pattern ROM.

（ｄ）　発明の構成 簡単に述べると本発明は、固定パターン・ロムを有する
データ処理装置に書込み形・ロムを付設すると共に、該
書込み形・ロム内のアドレスを解読する解読部を備え、
アドレス解読に依って前記両ロムを切り換えて情報を読
み取るようにしたことを特徴とするものである。(d) Structure of the Invention Briefly stated, the present invention includes a data processing device having a fixed pattern ROM, which is provided with a write-in ROM, and a decoder for decoding the addresses in the write-in ROM.
The device is characterized in that the information is read by switching between the two ROMs by decoding the address.

（ｅｌ　発明の実施例 以下本発明の実施例を図を用いて詳細に説明する。(el　Embodiments of the invention Embodiments of the present invention will be described in detail below with reference to the drawings.

図は本発明のメモリ制御方式を示す一実施例のブロック
図である。The figure is a block diagram of an embodiment showing the memory control method of the present invention.

図において、１はデータ処理装置、２はマスク・ロム、
３はＥＰ・ロム、４はデコーダをそれぞれ示す。データ
処理装置ｌはアドレス・バス線１１に依って指定するア
ドレスを送出する。此の送出アドレスはデコーダ４に入
力される。一方デコーダ４はＢＰ・ロム３に格納された
アドレスを判読する機能をもっており、ＥＰ・ロム３の
アドレスであればＥＰ・ロム３を検索し、此のアドレス
に対応する情報をデータ処理装置ｌにデータ・バス線１
２を介して返送する。デコーダ４がアドレス解読出来な
い場合には送られてくるアドレスをマスク・ロム２に送
出しマスク・ロム２を検索し、前記したようにデータ処
理装置に情報を返送する。In the figure, 1 is a data processing device, 2 is a mask ROM,
3 represents an EP/ROM, and 4 represents a decoder. The data processing device 1 sends out a designated address via the address bus line 11. This sending address is input to the decoder 4. On the other hand, the decoder 4 has a function of reading the address stored in the BP ROM 3, and if the address is in the EP ROM 3, it searches the EP ROM 3 and sends the information corresponding to this address to the data processing device 1. data bus line 1
Return via 2. If the decoder 4 cannot decode the address, it sends the sent address to the mask ROM 2, searches the mask ROM 2, and returns the information to the data processing device as described above.

従って変更が予測される情報があれば、ＥＰ・ロム４を
必要域準備し、変更発生に依って此の領域を利用し情報
を格納すれば良い。以上の説明は文字発生器に付いて述
べたが、文字で無く一般情報であっても何等支障される
ことのないことは言うまでもない。Therefore, if there is information that is expected to change, it is sufficient to prepare a necessary area in the EP/ROM 4 and use this area to store the information depending on the occurrence of the change. Although the above explanation has been made regarding the character generator, it goes without saying that there will be no problem even if the generator is not a character but general information.

（ｆｌ　発明の効果 以上詳細に説明したように本発明のメモリ制御方式は、
固定パターン・ロムを作製することなく変更に対処し得
るものとなり、変更の対処が容易で製作費を削減する上
で利点の多いものとなる。(fl Effects of the Invention As explained in detail above, the memory control method of the present invention has the following effects:
Changes can be made without producing a fixed pattern ROM, which is easy to deal with and has many advantages in terms of reducing production costs.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明のメモリ制御方式を示す一実施例のブロック
図である。 図において、１はデータ処理装置、２はマスク・ロム、
３はＥＰ・ロム、４はデコーダをそれぞれ示す。The figure is a block diagram of an embodiment showing the memory control method of the present invention. In the figure, 1 is a data processing device, 2 is a mask ROM,
3 represents an EP/ROM, and 4 represents a decoder.

Claims (1)

【特許請求の範囲】[Claims] 固定パターン・ロムを有するデータ処理装置に書込み形
・ロムを付設すると共に、該書込み形・ロム内のアドレ
スを解読する解読部を備え、アドレス解読に依って前記
両ロムを切り換えて情報を読み取るようにしたことを特
徴とするメモリ制御方式A data processing device having a fixed pattern ROM is attached with a write-in ROM, and is provided with a decoding section for decoding addresses in the write-in ROM, so that information is read by switching between the two ROMs based on address decoding. A memory control method characterized by
JP58153850A 1983-08-22 1983-08-22 Memory control system Pending JPS6045998A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58153850A JPS6045998A (en) 1983-08-22 1983-08-22 Memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58153850A JPS6045998A (en) 1983-08-22 1983-08-22 Memory control system

Publications (1)

Publication Number Publication Date
JPS6045998A true JPS6045998A (en) 1985-03-12

Family

ID=15571463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58153850A Pending JPS6045998A (en) 1983-08-22 1983-08-22 Memory control system

Country Status (1)

Country Link
JP (1) JPS6045998A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61278099A (en) * 1985-06-03 1986-12-08 Toshiba Corp Memory module
JPS63218203A (en) * 1987-03-05 1988-09-12 Kobe Steel Ltd Solid-liquid separation

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52109837A (en) * 1976-03-10 1977-09-14 Toshiba Corp Tag number containing unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52109837A (en) * 1976-03-10 1977-09-14 Toshiba Corp Tag number containing unit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61278099A (en) * 1985-06-03 1986-12-08 Toshiba Corp Memory module
JPS63218203A (en) * 1987-03-05 1988-09-12 Kobe Steel Ltd Solid-liquid separation
JPH046402B2 (en) * 1987-03-05 1992-02-05 Kobe Steel Ltd

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