JPS6044866B2 - solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state imaging device that can control afterimage characteristics.

The advantage of solid-state imaging devices is that they have no afterimages, but since most indoor lighting these days is fluorescent, the flicker of the fluorescent lights appears directly on the reproduced image and seriously degrades the image quality.

This poses a problem in that special lighting equipment such as a tungsten lamp is required when capturing an image of a room using a solid-state imaging device. This limits the mobility of cameras using solid-state imaging devices. Therefore, the absence of afterimages cannot necessarily be said to be an advantage of solid-state imaging devices. In contrast, when capturing an image under fluorescent lighting as described above, it is better to have a certain amount of afterimage. The present invention has been made in view of the above points.

That is, the present invention provides a solid-state imaging device that can generate afterimages as necessary. According to the present invention, an afterimage can be generated as needed, and the degree of the afterimage can be controlled depending on the brightness. It is also possible to reduce flicker by producing large afterimages in bright areas that are noticeable as flickers on the same screen, and to prevent afterimages from occurring in dark areas forming the background of the drawing. This contributes to further improving the image quality of reproduced images. The present invention provides a region for trapping signal charges in each photosensitive cell of a solid-state imaging device, and a control electrode for controlling the injection of signal charges into this region, and changes the voltage applied to the control electrode. It is characterized by controlling the size of the afterimage. The photosensitive cell here refers to a pixel in a solid-state imaging device, and each pixel can independently accumulate signal charges generated in response to the intensity of incident light within a semiconductor substrate, and each pixel can independently accumulate signal charges generated in response to the intensity of incident light. The signal charges can be independently taken out to the outside by any means. The present invention will be explained in detail below using the drawings.

FIG. 1 shows an embodiment of the present invention in an interline transfer type charge coupled device (Charge Coupled Device).
2 is a diagram showing an example of a CCD (CCD) image sensor. FIG. 1a is a block diagram of one photosensitive cell of a CCD image sensor. As is well known, one photosensitive cell basically consists of a photosensitive section 1 and a CCD section 2 for transferring and reading out signal charges accumulated in this photosensitive section 1. To explain in detail, the signal charge of photosensitive section 1 is CC
A transfer gate section 3, which is a path for transferring to the D section 2, and a channel stop section 4, which electrically isolates the photosensitive section 1 and the CCD section 2, are formed.

The afterimage control electrode section 5 provided by the present invention is provided adjacent to the photosensitive section 1. FIG. 1b is an explanatory diagram of the cross-sectional structure taken along line AN in FIG. 1a.

For example, on the surface of a silicon (Si) P type substrate 6, an n layer 7 of the buried channel of the CCD section 2 and an n+ layer 8 of the photosensitive section 1 are provided. Silicon oxide (SiO2
) film 9 is formed, and on the SlO2 film 9, a transfer electrode 10 made of, for example, polycrystalline silicon of the CCD section 2, an electrode 11 of the transfer gate section 3, and an afterimage control electrode 12 are formed. There is no polycrystalline silicon layer on the n+ layer 8 of the photosensitive section 1, and for example, CVD (Chemical Vap Or
CVD-SiO2 film 13 by DepOsitiOn)
is formed. And this CVD-SiO2 film 13
For example, a conductive tin oxide (SnO2) film 14 with high light transmittance is formed on top of the SnO2 film 14.
All or part of the upper CCD section 2, transfer gate section 3, channel stopper section 4, and afterimage control electrode section 5 are covered with aluminum (A electrodes 15-1, 15-2) for light shielding.
is formed. As a result, light is incident only from above the light layer 8 of the photosensitive section 1, and this n+ layer 8 and the S
Signal charges 16-1, . . . are generated within the i-board 6 by light incidence.
16-N is generated and accumulated in the depletion layer 17 formed in the 8th part of the n+ layer. In this case, the afterimage control electrode 12 is provided on a part of the layer 8 of the photosensitive section 1, and the afterimage is controlled by the voltage applied to the afterimage control electrode 12. This principle will be explained using FIG. 1c.

This figure shows the depth of the Si substrate 6 at points C and B in FIG. 1b. It shows the potential distribution in the horizontal direction. This potential distribution assumes that the impurity concentrations in the breakdown layer 8 and the P-type Si substrate 6 are uniformly distributed. A storage voltage V3 is applied to the SrO2 film 14. The afterimage control electrode 12 is supplied with a high level voltage VHl that causes an afterimage.
When an afterimage is unnecessary, a low level voltage VL is applied. As mentioned above, FIG. 1c shows the potential distributions in two cases: with and without afterimage. The dashed line in the figure shows the potential distribution in the region at point C, and signal charges exist in region X1 where the potential is flat. The VH applied to the afterimage control electrode 12 has a value such that the potential distribution is as shown by the dotted line in the figure, and the potential flat region X2 is composed of SiO2, the film 9, and the n+
It spreads out from the interface of layer 8. The fact that the potential flat region X2 reaches the interface between the SiO2 film 9 and the liquid layer 8 in this manner indicates that a portion of the signal charge is accumulated at the interface between the SiO film 9 and the n+ layer 8. A portion of the signal charge accumulated at the interface in this way is trapped at the interface potential between the SiO2 film 9 and the breakdown layer 8. This trapped signal charge remains in the photosensitive section even after being transferred from the photosensitive section 1 to the CCD section 2 for reading out the signal charge. Thereafter, the trapped signal charges are thermally and thermally released into the photosensitive section 1 and read out from the CCD section 2 in the next read operation. This is exactly the same phenomenon as an afterimage in an image pickup tube. On the other hand, the potential V. of the potential flat portion X1 when signal charges are accumulated in the point C region. Potential smaller than nH. When a low level voltage V is applied to the afterimage control electrode 12 so that the voltage is at the bottom of the potential, the SiO
Since no signal charge is accumulated at the interface between the second film 9 and the n+ layer 8, the above-mentioned afterimage does not occur. In this manner, afterimages can be caused or eliminated by changing the voltage value to be applied to the afterimage control electrode 12. Therefore, when taking an image under a fluorescent lamp in the above-described example, if the flicker caused by this becomes a concern, the flicker can be eliminated by simply applying a voltage to the control electrode 12. Furthermore, when photographing under normal sunlight or when photographing a very dark subject, it is desirable to have no afterimage, and in this case it is possible to eliminate the afterimage. Second
The figure explains the operating principle provided by the present invention for generating afterimages only in parts of the same screen that are brighter than a certain level, and preventing afterimages from occurring in dark areas.

Potential distributions A, B, C, and D in the figure indicate potential changes in the area at point B below the afterimage control electrode 12 in FIG. 1b. Potential distribution A is the case when no signal charges exist in the n+ layer 8 of the photosensitive section 1. If signal charges are present, the potential distribution A becomes like the potential distribution B, and as shown in the figure, the signal charges exist in the flat potential area. are doing. In this case, the signal charge is SiO. membranes 9 and n
Since the signal charges are not present at the interface of the + layer 8, the signal charges are not trapped at the interface level between the SIO2 film 9 and the n+ layer 8 below the afterimage control electrode 12. This indicates that afterimages do not occur in dark object areas where there is little signal charge. Next, as the signal charge increases, the potential flat area further expands, and as shown in potential distribution C, the edges of the potential flat area are connected to the SiO2 film 9 and n
+Touches the interface of layer 8. When the signal charges further increase, some of the signal charges Q accumulate at the interface between the SiO2 film 9 and the n+ layer 8, lowering the potential of the potential flat portion. This potential.
If N2 is the potential of the flat potential portion in the case of the potential distribution C, then m1 is approximated by Q=SCOx (.M2-Vml). Here, S is the area where the n+ layer 8 and the afterimage control electrode 12 overlap. X is SiO2 per unit area
This is the capacitance of the membrane 9. Here, when the potential of the potential flat part becomes smaller than m1, a part of the signal charge is transferred to the SiO2 film 9 and the n+ layer 8.
A portion of the signal charge accumulated at the interface is trapped in the interface level, thereby generating an afterimage. As described above, afterimages can be controlled by brightness and darkness within the same screen. Further, it is possible to control from which brightness an afterimage is generated by using the applied voltage 8. FIG. 3 shows another embodiment of the invention.

In the structure explained in FIG. 1b, the SnO2 film 14, which is a transparent electrode, is formed on the CVD-SlO2 film 13.
Unlike this embodiment, N electrodes 15-1 and 15-2 for light shielding are formed directly on the CVD-SiO2 film 13, and in FIG.
It is easier to understand if the potential of the surface of the O2 film 13 is set to , so this structure was adopted.
Even if the surface of the SlO2 film 13 is floating in terms of potential, the potential within the n+ layer 8 of the photosensitive section 1 can be controlled by the voltage to be applied to the afterimage control electrode 12 in the same way as explained with reference to FIG. This makes it possible to control afterimages. FIG. 4 shows another embodiment of the present invention in which the area of the afterimage control electrode 12 is reduced to improve sensitivity.

As shown in this figure, the cross-sectional structure is almost the same as that explained in FIGS. 1 and 3. Gate electrode 11, SlO2 film 9, CVD-SiO2 film 13, and light shield A1 electrodes 15-1, 15-2
etc., but in this embodiment, the afterimage control electrode 1
8 and the S]02 film 9, for example, a silicon nitride film 19.
has been established. Then, the Si under this silicon nitride film 19
O. Many interface levels 20 are formed at or near the interface between the film 9 and the n+ layer 8. (Indicated by an x in the figure.) This makes it possible to make the area of the afterimage control electrode 18 smaller than the area of the afterimage control electrode 12 required in FIGS. 1 and 3. Therefore, the area of the photosensitive portion that is not covered with the light-absorbing polycrystalline silicon electrode can be increased, and sensitivity can be improved. Here, for example, ions are implanted from above the silicon nitride film 19 to transfer oxygen (0) in the S]02 film 9 under the silicon nitride film 19 to the Si substrate 6.
By implanting the SiO2 film 9 and the n+ layer 8 into the
Many interface states 20 can be formed at the interface. The density of this interface state can be controlled by the amount and energy of implanted ions. Further, even if such ion implantation is not performed, when the silicon nitride film 19 is provided in this manner, the interface state density under the silicon nitride film 19 is higher than the interface state density in other regions. In the normal manufacturing process, this is because the interface state density between the SlO2 film 9 and the S1 substrate 6 is lowered near the final step of this process, so for example, hydrogen (
l{2) Perform annealing. In this case, since the diffusion coefficient of hydrogen in the silicon nitride film 19 is much smaller than that in the SiO2 film 9, the interface state density under the silicon nitride film 19 can be increased. In the above embodiment, the afterimage control electrodes 12 and 18 are CC
Although this is an example in which the D transfer electrode 10 and the transfer gate electrode 11 are provided separately, FIG. 5 shows an example in which the afterimage control electrodes 12 and 18 are provided in common with the CCD transfer electrode 10.

This figure is a view of one photosensitive cell viewed from above the Si substrate 6. In the figure, the shaded area and the black area correspond to the n+ layer 8 of the photosensitive area, and the shaded area 21 corresponds to the n+ layer 8 that does not overlap with the afterimage control electrodes 12, 18 in the layer 8.
This is the layer resistance area. The black part 23 is a second layer region where the first electrode 22 of the CCD transfer electrode shown by the solid line in the figure and the breakdown layer 8 overlap. A portion 24 delimited by a dotted line is a CCD transfer section.

The part 25 separated by the dashed line is the second CC.
The D transfer electrode is shown, and the solid line portion 22 is the aforementioned first CCD transfer electrode. The first transfer electrode 22 and the second transfer electrode 25 are provided in a direction perpendicular to the signal charge transfer direction Y in the CCD transfer section 24 and along both sides of the first breakdown layer 21, and are provided around the CCD. is connected to each of the photosensitive cells. And the first
A portion of the transfer electrode 22 overlaps with the second n+ layer 23, and also serves as an afterimage control electrode. In such a CCD, the voltages applied to the first transfer electrode 22 and the second transfer electrode 25 can be independently controlled. Transfer of signal charges in the CCD transfer section 24 is performed using a clock pulse having a voltage change from -8V to 2V, for example. Thus, at a voltage of 2 V, the second n+ layer region 23 corresponds to the low level voltage described in FIG. 1c. Then the first n+
The signal charges accumulated in the layer 21 are transferred to the second transfer electrode 25.
For example, 10 is applied to CC through the transfer gate section 26.
Moving on to the D transfer section 24. At this time, if the first transfer electrode 22 overlapping with the second n+ layer 23 is held at a voltage corresponding to the low level voltage V, no afterimage will occur. on the other hand,
During this period, if a high level voltage 8 is applied to the first transfer electrode 22, which is a condition for a part of the signal charge to accumulate at the interface between the SiO2 film 9 and the liquid layer 8, as explained in FIG. 1c, an afterimage may occur. can. Figure 6 shows a MOS (Metal Oxide Semiconductor), which is a solid-state imaging device similar to a CCD.
FIG. 2 is a diagram for explaining an embodiment in which the present invention is applied to a conductive type.

This figure shows the cross-sectional structure of a single photosensitive cell of a MOS type sensor. For example, a MOS field effect transistor is formed on the surface of the P-type S1 substrate 27, and the first breakdown layer 28 serving as a source serves as a photosensitive portion, and signal charges are accumulated in this PN junction.

On the other hand, the second layer 29, which is the drain, serves as a vertical output line in the two-dimensional sensor and applies a high level voltage to the gate electrode 30. By adding signal charges accumulated in the first layer 28, the signal charges are read out from the second n+ layer 29. This MOS type sensor is a CCD used in the explanation of the embodiment shown in Fig. 3.
The basic operating principle is the same, and in the CCD, the second n+ layer 29 in the MOS sensor corresponds to the CCD section n layer 7. Both of these are for reading signal charges. In such a MOS type sensor, there is a gate SiO2 film 31 on the P-type Si substrate 27, and the gate electrode 30 is provided on this SiO2 film 31, but according to the present invention,
The SiO2 layer overlaps a part of the first n+ layer 28.
An afterimage control electrode 32 is provided on the film 31 .

Then, like a CCD, the CVD-SiO2 film 33 and this C
An electrode 34 is provided on the VD-SiO2 film 33 to optically shield the second n+ layer 29 and the gate electrode 30. Even in such a MOS type sensor, CC can be controlled by controlling the voltage applied to the afterimage control electrode 32.
The afterimage i can be controlled similarly to D. As described above, the basic concept of the afterimage control of the present invention is to provide a region for controlling afterimages adjacent to a region where signal charges are accumulated, and to apply a voltage to the control electrode provided in this afterimage control region. Accordingly, a trap region having an energy level for trapping signal charges is formed in the afterimage control region, and a part of the signal charges is trapped in this trap region.

Being able to arbitrarily control afterimages in this manner allows further improvement in the image quality of the solid-state imaging device.

The foregoing description of the invention is based on CCD. ! 1. Although this study was conducted on a MOS type sensor, other solid-state imaging devices such as BBD (B
ucketBrigadeDevice), CID(C
hargeInjectiOnDevice), and line address type ResistiveGateCC
D (H. Heyrlsetal.: IEEE Trans.
．． , VOl. ED-25, positive. ．． 2, pp. 135-
139, 19B) and the like. It goes without saying that the present invention can be applied not only to two-dimensional sensors but also to one-dimensional sensors.

Although the present invention has been described using a P-type S1 substrate, the present invention can also be applied to an n-type Si substrate and other semiconductor substrates. In addition, the P-type Si substrates 6, 27 and SiO2 in FIGS. 1, 3, 4, and 6
Films 9, 31, n+ layers 8, 28, 29, n layer 7, CVD-
SiO2 layers 13, 33, polycrystalline silicon electrodes 10, 11
, 12, 30A1 electrodes 15-1, 15-2, 34, etc., are not limited to these, and it goes without saying that other material layers having similar properties may be used.

Furthermore, although FIGS. 1, 3, 4, and 6 show cases in which there is no overflow drain to prevent blue zinc, the present invention is not provided even if there is an overflow drain. It does not impair the effect of

[Brief explanation of the drawing]

FIG. 1a is a plan view of an embodiment of the present invention, FIG. 1b is a sectional view thereof, FIG. 1c and FIG. 3 and 4 are sectional views of other embodiments of the invention, FIG. 5 is a plan view of another embodiment of the invention, and FIG. 6 is a sectional view of still another embodiment of the invention. . DESCRIPTION OF SYMBOLS 1... Photosensitive part, 2... CCD part, 3... Transfer gate part, 4... Channel stopper part, 5... Afterimage control electrode part, 6, 27... P-type Si substrate ,8,21,2
3, 28, 29...n+ layer, 12, 18, 22, 32
...Afterimage control electrode, 13,33...CVD-SlO
．． Membrane, 10, 22, 25... CCD transfer electrode, 7...
CCD transfer channel n layer, 15-1, 15-2, 34.
...A1 electrode for light shielding, 20...interface level, 19
... silicon nitride film, 11 ... transfer channel electrode,
30...Gate electrode.

Claims (1)

[Claims] 1. An accumulation region is provided adjacent to the photosensitive section of a solid-state imaging device formed on a semiconductor substrate and can accumulate part of the signal charges accumulated in the photosensitive section, and the signal charge is applied to an electrode provided in the accumulation region. It has an energy level that controls the amount of signal charge accumulated in the accumulation region by a voltage and captures and fixes at least a part of the signal charge accumulated in the accumulation region. What is claimed is: 1. A solid-state imaging device, characterized in that the injection amount is controlled by a voltage applied to the electrode provided in the accumulation region.