JP2641809B2 - CCD image element - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CCD image element, and more particularly to a technique capable of reducing smear noise.

[0002]

2. Description of the Related Art Generally, a CCD (Charge Coupled Device) is used.
As the image element, a high-concentration p-type well is formed in an n-type semiconductor substrate, and an n-type photodiode and an n-type VCCD (Vertical Charge Coupled Device (Vertical Charge Coupled Device) are provided at predetermined intervals in the surface region of the high-concentration p-type well.
d Device)) and the n-type photodiode and n
A transfer gate for interconnecting the two is formed on the upper portion between the type VCCD.

The n-type VCCD is a BCCD (Buried Charge Coupled Device).
Device)) or SCCD (Surface Charge Coupled Device) structure, but the SCCD is rarely used at present. In a general CCD image device, an OFD (Over Flow Drain) is provided in an area below the n-type photodiode in order to reduce a phenomenon of defocus (Blooming) appearing on a screen.
An anti-blooming bias (Anti-Blooming Bias) is applied to control the voltage of the pixel. That is, a potential barrier is formed to prevent overflow of signal charges accumulated in a potential well (not shown).

The OFD voltage control method is based on a HOFD (Horizontal Overflow Drain).
er Flow Drain) and VOFD (Vertical Over Drain)
n)) method. However, since the HOFD method is a clocking method, VCCDs corresponding to the respective photodiodes are arranged on a straight line. Therefore, the opening area of the photodiode is relatively reduced, the fill factor is reduced, and the CC is reduced.
The sensitivity of the D image element decreases. For this reason, the VOFD method is currently used as the OFD voltage control method. In this method, two ion implantation steps are performed to form a shallow p-type well with an appropriate depth below the photodiode region, and a deep p-type well with an appropriate depth in other regions. , An appropriate anti-blur voltage is applied.

As shown in FIG. 8, the structure of the VOFD CCD image element is such that an n-type epitaxial layer 2 is formed on an n-type substrate 1 and an ion implantation step is performed twice on the n-type epitaxial layer 2. Then, a shallow p-type well 3 and a deep p-type well 4 are formed, an n-type photodiode 5 is provided above the shallow p-type well 3, and an n-type B
Forming CCD 6, n-type photodiode 5 and n-type BCC
A transfer gate 7 made of a polycrystalline silicon film for these interconnections on a surface area between the gates D6 and D6, and an n-type BCC
A BCCD clock signal supply gate 7a for supplying a clock signal to D6 is formed.

As shown in FIG. 8, when light λ is incident to generate signal charges below the n-type photodiode 5, the signal charges are transferred to the n-type BCCD 6 by a high-level signal supplied to the transfer gate 7. It is moved and accumulated below it. At this time, the CCD is moved to the BCCD by ordinary clocking of the CCD. FIG. 9 shows aa 'of FIG.
It is a figure which shows the outline of the electric potential along a line.

However, at the same time, the electric charge generated below the n-type photodiode 5 is changed to the deep p-type well 4 and the n-type BCCD.
6 or flows out to the n-type substrate 1, causing a smear phenomenon. Furthermore, when a shutter voltage (approximately 30 to 40 V) is applied to the n-type substrate 1, since the shutter voltage is very large, the charges flow out to the n-type substrate 1 due to the shutter voltage, so that the smear phenomenon further occurs. May increase.

Conventionally, in order to prevent the smear phenomenon, high energy and high concentration p-type ion
A high concentration p-type BPL (blocking p-type layer (Blocking PT-type layer) is formed in a predetermined region between the type BCCD 6 and the deep p-type well 4.
ype Layer)) (reference numeral 8 in FIG. 16).

Conventional CCD using high concentration p-type BPL
The manufacturing process of the image element will be described with reference to FIGS. First, an n-type epitaxial layer 2 is formed on an n-type substrate 1 as shown in FIG.

Next, as shown in FIG. 11, a high-concentration p-type ion implantation process is performed twice for OFD voltage control.

Next, in order to diffuse ions, heat treatment is performed to form a shallow p-type well 3 and a deep p-type well 4 having a predetermined depth, as shown in FIG.

Next, as shown in FIG. 13, a high-concentration p-type BPL 8 is formed in a predetermined region of the deep p-type well 4 by using a high-energy (about 600 KeV) ion implantation apparatus.
In the high-concentration p-type BPL8, the signal charges accumulated in the BCCD flow toward the substrate due to the shutter voltage of the substrate, and the signal charges generated in the photodiode are converted into the BCC.
The smear phenomenon of not being moved by D is prevented.

Next, as shown in FIG. 14, n-type ions are implanted into predetermined surface regions of the shallow p-type well 3 and the deep p-type well 4 to form an n-type photodiode 5 and an n-type BCCD 6. At this time, a high-concentration p-type thin film 9 is usually formed on the surface of the n-type photodiode 5.

Next, as shown in FIG. 15, an n-type photodiode 5 and an n-type BCCD 6 are formed by using a polycrystalline silicon film.
A transfer gate 7 for interconnecting them is formed in the upper part of the surface between
A clock signal supply gate 7a is formed. At this time,
Metals like aluminum can be used instead of polycrystalline silicon, but metals have poor transfer properties,
Rarely used.

FIG. 16 is a diagram for explaining the operation of the CCD image element manufactured by the above-described steps.

When light λ is incident on the n-type photodiode 5, a signal charge is generated in an optical signal charge output region O which is a region between the n-type photodiode 5 and the shallow p-type well 3. When a high-level drive signal is supplied to the transfer gate 7, this signal charge is transferred to the n-type photodiode 5
The signal charge is accumulated in a signal charge accumulation region Q, which is a region adjacent to the n-type BCCD 6, through a signal charge transfer channel region P, which is a region between the n-type BCCD 6. Next, the signal charges stored in the signal charge storage region Q are transferred to a HCCD (Horizontal Charge Coupled Device) by a normal CCD clocking operation.
evice): Move to (not shown). At this time, the signal charges generated in the optical signal charge output region O do not pass through the signal charge transfer channel region P, and the deep p-type well 4 and the high concentration p-type B
When flowing into the smear signal discharge area R, which is the area between PL8, a smear phenomenon occurs on the screen of the CCD image element. However, as shown in FIG. 17, which shows the outline of the potential of the line bb 'in FIG. 16, the smear phenomenon occurs because the signal charge does not easily flow into the smear signal discharge region R due to the high potential barrier of the high concentration p-type BPL8. Reduced. In fact, there is a problem that the signal charge drifting in the n-type BCCD 6 is larger than the smear signal flowing out to the n-type substrate 1.

In the above-mentioned conventional structure, the p-type ion implantation is performed twice to apply the anti-focus blur voltage to form the plate-type shallow p-type well 3 and the deep p-type well 4, but the shallow p-type well 3 is formed. The well may be formed in a heart shape.

Further, the entire high-concentration p-type well is formed flat, and the lower portion of the photodiode and the B
CCD for preventing the smear phenomenon and controlling the OFD voltage by adjusting the impurity concentration of the lower part of the CCD differently
Although the structure of the image element and the method of manufacturing the same have been devised, they are not used due to the difficulty of the ion implantation process.

[0019]

The above-described CCD image element shown in FIGS. 10 to 17 and the method of manufacturing the same have the following problems. That is, not only is an ion implantation apparatus for forming a high-concentration p-type BPL expensive, but the use of this apparatus is limited and impractical. In addition, since high energy of about 600 KeV is used at the time of high-concentration p-type ion implantation, a defect is easily given to the substrate surface. Therefore, although the formation of the high-concentration p-type BPL has the effect of reducing the smear phenomenon, the generation of noise due to the above-mentioned defect is a concern, and therefore, a high technology for forming the high-concentration p-type BPL is required.

An object of the present invention is to provide a CCD image element which can easily control OFD voltage and reduce smear noise.

[0021]

In order to achieve the above object, a CCD image sensor according to the present invention comprises a first conductive type substrate having an OFD voltage control for an OFD voltage control provided at a predetermined interval in a horizontal direction at a surface region thereof. A first conductivity type region and a second conductivity type region for reducing a smear phenomenon, a second conductivity type epitaxial layer provided entirely thereon, and a surface region of the second conductivity type epitaxial layer, wherein A first conductivity type photodiode and a first conductivity type BCC respectively provided above the one conductivity type region and the second conductivity type region for reducing the smear phenomenon.
D, a transfer gate provided above the surface of the second conductivity type epitaxial layer between the first conductivity type photodiode and the first conductivity type BCCD, and the first conductivity type B
A gate for supplying a BCCD clock signal provided above the surface of the second conductive type epitaxial layer on the CCD; and the first conductive type region for controlling the OFD voltage is provided by introducing impurities into the first conductive type substrate. and second conductivity type regions for the smear phenomenon reduction, characterized in that provided only immediately under the first conductive type BCCD.

Also, the first conductivity type region for OFD voltage control
Between the region and the second region of the second conductivity type for smear reduction.
It is characterized in that a mire signal discharge area is provided.

[0023]

According to the present invention, since the second conductivity type region for reducing the smear phenomenon is provided below the first conductivity type BCCD, the smear phenomenon reduction characteristic is superior to the conventional one. In addition, since an expensive ion implantation apparatus is not required as compared with the conventional manufacturing process, not only is it economical, but also because high energy is not required at the time of ion implantation, a defect of the substrate can be prevented. Further, since high precision is not required as compared with the conventional manufacturing process, the process can be performed quickly.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A manufacturing process of a CCD image element according to an embodiment of the present invention will be described below with reference to FIGS.

First, as shown in FIG. 1, n-type ions are implanted into a predetermined region on the n-type substrate 11.

Next, as shown in FIG. 2, n in a region horizontally separated from the region into which the n-type ions are implanted by a predetermined distance.
High concentration p-type ions are implanted into the mold substrate 11.

Next, as shown in FIG. 3, heat treatment is performed to diffuse the implanted n-type ions and the high-concentration p-type ions to form an n-type region 12 for OFD voltage control and a high concentration for smear phenomenon reduction. After the formation of the p-type region 13, a p-type epitaxial layer 14 is entirely formed thereon. Where OF
N-type region 12 for D voltage control and high concentration p for smear phenomenon reduction
A function of a passage through which a smear signal flows out to the n-type substrate 11 is provided between the p-type epitaxial layer 14 and the p-type epitaxial layer 14.
Perform the same function as the p-type wells 3 and 4 of the conventional structure shown in FIG.

Next, as shown in FIG. 4, n-type ions are implanted into the surface regions of the p-type epitaxial layer 14, respectively, to form an n-type region 12 for OFD voltage control and a high-concentration p-type region 13 for smear phenomenon reduction. An n-type photodiode 15 and an n-type BCCD 16 are formed on the upper part of FIG.

Next, as shown in FIG. 5, a high-concentration p-type thin film 18 is formed on the surface of the n-type photodiode 15. Next, an n-type photodiode 1 is formed using a polycrystalline silicon film.
A transfer gate 17 for interconnecting them is formed above the surface between the first and second n-type BCCDs 16 and a BCCD clock signal supply gate 1 is provided on the n-type BCCD 16.
7a is formed. At this time, a metal such as aluminum can be used instead of polycrystalline silicon. FIGS. 6 and 7 show the CCD manufactured by the above process.
This is a diagram for explaining the operation of the video element, and the description will be made with reference to this drawing.

First, when light λ is incident on the n-type photodiode 15, a signal charge is generated in the optical signal charge output region O below the n-type photodiode 15. When a high-level signal is supplied to the transfer gate 17, the signal charge is transferred to the signal charge storage region Q below the n-type BCCD 16 through the signal charge transfer channel region P in the p-type epitaxial layer 14 and stored therein. You. Next, the signal charges stored in the signal charge storage region Q move to the HCCD (not shown) by the clocking operation of the CCD.
At this time, a smear phenomenon occurs due to a part of the signal charge that does not reach the signal charge storage region Q from the optical signal charge output region O through the signal charge transfer channel region P. Here, from the smear charge flowing out to the n-type substrate 11, the n-type BC
Smear charge drifting below the CD 16 has a significant effect on the image quality of the screen. Because multiple C
This is because, when a CD image element is used for a solid-state imaging device, smear charges generated by one photodiode drift, and the smear charges affect signal charges generated by another diode.

In the structure of this embodiment, as shown in FIG.
Since the high-concentration p-type region 13 for reducing the smear phenomenon is formed below the n-type BCCD 16, a high potential barrier is formed in this region. Therefore, the smear signal does not remain in this region and flows out to the n-type substrate 11 through the smear signal discharge region R where no potential barrier is formed.

FIG. 7 shows an outline of the potential along the line cc 'in FIG. As shown in FIG. 7, a high potential barrier and a wide neutral region are formed in the high-concentration p-type region 13 for smear phenomenon reduction, so that the smear signal does not remain in this region.
The potential barrier between the n-type region 12 for OFD voltage control and the high-concentration p-type region 13 for smear phenomenon reduction flows out to the n-type substrate 11 through the smear signal discharge region R which is very low.

As described above, the above embodiment has the following effects. That is, since the high-concentration p-type region 13 for smear phenomenon reduction is provided below the n-type BCCD 16, the smear phenomenon reduction characteristic is superior to that of the related art.
In addition, since an expensive ion implantation apparatus is not required as compared with the conventional manufacturing process, not only is it economical, but also because high energy is not required at the time of ion implantation, a defect of the substrate can be prevented. Further, since high precision is not required as compared with the conventional manufacturing process, the process can be performed quickly.

Although the present invention has been described in detail with reference to the embodiments, the present invention is not limited to the above-described embodiments, and it is needless to say that various changes can be made without departing from the scope of the invention. .

[0035]

As described above, according to the present invention,
A CCD image element having excellent smear phenomenon reduction characteristics can be provided. In addition, since an expensive ion implantation apparatus is not required as compared with the conventional manufacturing process, not only is it economical, but also because high energy is not required at the time of ion implantation, a defect of the substrate can be prevented. further,
Since high precision is not required compared to conventional manufacturing processes,
Rapid process progress is possible.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a manufacturing process of a CCD image element according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a manufacturing process of the CCD image element according to the embodiment of the present invention.

FIG. 3 is a cross-sectional view illustrating a manufacturing process of the CCD image element according to the embodiment of the present invention.

FIG. 4 is a cross-sectional view illustrating a manufacturing process of the CCD image element according to the embodiment of the present invention.

FIG. 5 is a cross-sectional view illustrating a manufacturing process of the CCD image element according to the embodiment of the present invention.

FIG. 6 is an explanatory diagram of an operation of the CCD image element according to one embodiment of the present invention.

FIG. 7 is a diagram showing an outline of the potential of the line cc 'of FIG. 6;

FIG. 8 is a structural sectional view and operation explanatory view of a conventional CCD image element without considering a smear phenomenon.

FIG. 9 is a diagram showing an outline of the potential of the line aa ′ in FIG. 8;

FIG. 10 is a cross-sectional view illustrating a manufacturing process of a conventional CCD image element.

FIG. 11 is a cross-sectional view showing a manufacturing process of a conventional CCD image element.

FIG. 12 is a cross-sectional view illustrating a manufacturing process of a conventional CCD image element.

FIG. 13 is a cross-sectional view showing a manufacturing process of a conventional CCD image element.

FIG. 14 is a cross-sectional view showing a manufacturing process of a conventional CCD image element.

FIG. 15 is a cross-sectional view illustrating a manufacturing process of a conventional CCD image element.

FIG. 16 is a structural sectional view and operation explanatory view of a conventional CCD image element in which a smear phenomenon is considered.

FIG. 17 is a diagram showing an outline of the potential of line bb ′ in FIG. 8;

[Explanation of symbols]

11: n-type substrate 11, 12: n-type region for OFD voltage control, 13: high-concentration p-type region for smear phenomenon reduction, 14: p
-Type epitaxial layer, 15... N-type photodiode, 16
... n-type BCCD, 17 ... transfer gate, 17a ...
A gate for supplying a BCCD clock signal, 18 a high-concentration p-type thin film, λ light, O light signal charge output region, P signal charge transfer channel region, Q signal charge storage region, and R smear signal discharge region.

Claims (2)

(57) [Claims] 1. A first conductivity type region for controlling OFD voltage and a second conductivity type region for reducing smear phenomenon provided on a surface region of a first conductivity type substrate at a predetermined interval in a horizontal direction, and a whole region thereon. A second conductive type epitaxial layer provided on the first conductive type region for controlling the OFD voltage and a second conductive type region for reducing the smear phenomenon in the surface region of the second conductive type epitaxial layer. A first conductivity type photodiode and a first conductivity type BCCD provided respectively; a transfer gate provided on an upper surface of the second conductivity type epitaxial layer between the first conductivity type photodiode and the first conductivity type BCCD; The second type on the first conductivity type BCCD
A gate for supplying a BCCD clock signal provided on the upper surface of the conductive type epitaxial layer; the first conductive type region for OFD voltage control provided by introducing impurities into the first conductive type substrate; reduction for the second conductivity type region, CCD image sensor, characterized in that provided only immediately under the first conductive type BCCD. 2. The device according to claim 1 , wherein a smear signal discharge region is provided between the OFD voltage control first conductivity type region and the smear phenomenon reducing second conductivity type region.
CD image element.