JPS6043761A - Data terminal device - Google Patents

Abstract

PURPOSE:To use a control circuit in many action modes and to attain a compact and light-weight constitution of a data terminal device, by using an action mode register to switch the control logics of the writing and reading control circuits. CONSTITUTION:In a data input mode an action mode register 24 is set at a data input mode by a key input circuit 25. Thus a mode designating signal A to designate the data input mode in delivered from the register 24. Then a writing control circuit 20 can be actuated and the data given from a key input circuit 25 is transferred to a main memory part 9. When the register 24 is set at a retrieval correction mode, a reading control circuit 21 reads out the data stored in the part 9 and transfers it to a display circuit 22. In a correction mode the correction data is supplied from the circuit 25 by referring to the display data. Then the circuit 20 operates to give a correction display. At the same time, the correction data is also transferred to the part 9.

Description

[Detailed Description of the Invention] Industrial Field of Use The present invention relates to a handheld terminal device that aims to be small and 1IY61, and is specifically used for operations such as route sales, sales reports, and inventory management. It also concerns the purchase of data terminals.

Conventional configuration and its problems Conventionally, the input/output of this type of data terminal device U has been configured as shown in FIG. 1 is the display section, 2 is the data input section, 3
4 is a main control section, 4 is a printing section, and 5 is a transmission section. Further, when illustrating the configuration by function, as shown in FIG. 2, a data input control section 6, a search correction control section 7, a print control section 8,
It can be divided into a main storage section 9 and a transmission section 10. FIG. 3 shows the configuration of the control circuit for each function, and data input is written into the main memory section 9 by the input control circuit 13 from the key input circuit 11 via the display circuit 12. Further, the search correction is inputted from the search correction input circuit 14 and displayed on the search terminal display circuit 15, and the data in the main storage section 9 is searched and corrected by the search correction control circuit 16. For printing, data is read from the main memory section 9 by the print control 1 circuit 19, temporarily held in the print buffer circuit 18, and then printed by the print circuit 17.

In the conventional data terminal device, write control and read control for the main memory section 9 are separated by function, so the control circuits are overlapped and the circuit configuration is large, making it difficult to reduce the size and weight. The current situation is that there are limits.

OBJECTS OF THE INVENTION It is an object of the present invention to provide a data terminal device that can be made even smaller and lighter by simplifying its circuit configuration.

Configuration of the Invention The data terminal device of the present invention is configured to perform writing to and reading from a main storage section via a terminal control circuit, and also causes the terminal control circuit to output a mode designation signal in accordance with a mode input instruction. It consists of an operation mode register, and a write control circuit and a read control circuit whose control logic for writing and reading operations is switched according to the mode designation signal, respectively. - The present invention is characterized in that the control logic is switched and a single control circuit is used depending on the operation mode without providing a second control circuit.

Description of examples Hereinafter, one embodiment of the present invention will be described based on FIG. 4.

9 is an E [memory section, 10 is a transmission section, 20.21 is a display circuit 22, a write control circuit and a read control circuit interposed between the print circuit 23 and the main memory section 9, 24 is a key input circuit 25 This is an operation mode register that outputs a t-mode designation signal in response to a mode input instruction from the write control circuit 20 and readout control circuit 2 in response to a mode designation signal Δ.
1 control logic is switched to suit each mode of operation.

Next, the configuration of FIG. 4 will be explained in more detail along with the main operation mode.

In the case of data input, the key input circuit 25 sets the operation mode register 24 to data input mode.

As a result, the operation mode register 24 outputs a mode designation signal that designates the data manual mode, the Pl input control 11 circuit 20 is enabled to operate 01, and the data input from the key input circuit 25 is transferred to the main memory 9. will be forwarded to. The main storage unit 9 stores the transferred data in that order.

When performing search correction next time, the operation mode register 24 is set to search correction mode via the key input circuit 25 in the same way as above, and a mode designation signal QA specifying the search correction mode is output. . As a result, the read control circuit 2
1 is displayed as J: when data stored in the main memory section 9 is read out and transferred to the display circuit 22.
The correct way is to look at this display data displayed after searching and input correction data from the C key input circuit 25, and the write control circuit 20 in which the search correction mode is specified by the mode designation signal @ is activated. At the same time as being displayed, it is also transferred to the main storage unit 9.

When performing a printing operation, when the printing mode is set via the key input circuit 25, the mode designation signal A that designates the printing mode is output from the operation mode register 24, and the readout control in which the printing mode is specified is performed. The circuit 21 is described in 1.
Data is read from the upper part 9 and printed by the printing circuit 23.

In this way, the write control circuit 20 and the read control circuit 21 are controlled by the designation of the 01 operation mode register 24.
Since the switch can be used in data input mode, search/correction mode, and print mode, there is no need to provide a control circuit for each operation mode.

As described in the detailed description of the invention, according to the data terminal device of the present invention, the control logic of the fortune-telling control circuit and the read-out control circuit is 1-
Since switching is performed using an operation mode register that outputs a t-do designation signal in response to a t-do input instruction, there is no need to provide a control circuit for reading and writing for each operation mode (one control circuit can be used for multiple operation modes). The circuit can be simplified compared to the conventional one, and it is possible to realize further miniaturization and weight reduction compared to the conventional one.

[Brief explanation of the drawing]

Figure 1 is an input/output configuration diagram of a data terminal device, Figure 2 is a functional configuration diagram of data ☆:1:end), Figure 3 is a conventional configuration diagram of a functional control circuit, and Figure 4 is a diagram of the main function. Data end of invention〉1(
FIG. 1 is a configuration diagram of an embodiment of the device. 9... Main memory section, 20... Fortune-telling control circuit, 21
. . . Readout control circuit, 22 . . . Display circuit, 23.
・・Printing circuit, 24・・Operation mode register, 25・
...Key input circuit, A...Mode designation (i-yumi agent Yoshihiro Moriki 1st figure 2nd figure 3rd part 1

Claims (1)

[Claims] 1. Write to the main storage unit via the terminal control circuit,
In addition to configuring the device to perform readout, the terminal control circuit is configured to perform readout.
An operation mode register that outputs a mode designation signal in response to a mode input instruction, and a write control circuit and a readout control circuit that switch control logic for store and read operations in response to the mode designation signal. data terminal equipment.