JPS604271A - Manufacture of solar battery - Google Patents

Abstract

PURPOSE:To attain the improvement of performance and the reduction of the number of processes by improving the property of plating adhesion by the use of a semiconductor substrate having crystal grain boundaries. CONSTITUTION:The surface of a P type Si ribbon crystal substrate 21 is coated with a reflection preventing solution with phosphorus added and is then calcined, resulting in the formation of a reflection preventing film 22 and at the same time of an N<+> layer 23. Next, when it is calcined after the formation of an Al paste 24 over the entire back surface by a screen printing method, a P<+> layer 25 an alloy layer is formed by the diffusion of Al atoms into the substrate 21. Then, the film 22 is removed by etching, with a plating resist 26 as a mask, down to the N<+> layer 23 of the substrate 21. Ni layers 27 are formed on both surfaces back and front by Ni electroless plating, thus being made as electrode bases. Solder layers 28 are formed thereon and lead wires 29 are connected thereto, resulting in the completion of the title device.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a solar cell (2), particularly (2) and (4) a semiconductor having crystal grains yr- that satisfies cost reduction while maintaining fertility. This invention relates to improvements in the manufacturing process of solar cells using substrates.

[Technical background of the invention and its problems]

Conventionally, to convert sunlight into electricity, a single silicone was connected.

An example of this is shown in Figure 1.
．． A lJi diffusion layer (2) is provided by a method such as bithermal diffusion to a depth of 0.2 to 0.6 μm from the surface of a P-type silicon single crystal substrate (1) of 3 to 0.4 μm, as shown by a broken line. A p-n junction is formed, and this diffusion layer (2) (two lattice electrodes (3)) is connected to the back surface of the P-type silicon single crystal substrate (1) (two is the entire surface (-crossing back surface electrode)). is formed.

Also, when the binary L of the meter diffusion layer (2) is incident from the air (
A part of the light is reflected by the two surfaces, but in order to improve the loss caused by this reflection (-), an anti-reflection film (5) is usually formed on the two surfaces.This is applied to the n-type silicon single crystal substrate. p+
The same applies to those in which a diffusion layer is formed.

The manufacturing method of such a solar cell (the second one is known as Makisan), the manufacturing method of a solar cell is a pH junction formation step,
The process can be roughly divided into three steps: electrode formation process 2, antireflection film formation process.

Among these, the conventional method for the pH junction formation process is to keep the substrate at high temperature in an atmosphere containing impurities of a conductivity type different from that of the substrate, and use a diffusion furnace to diffuse the impurities into the substrate using impurities. Yes.

It is widely adopted due to its uniformity and mass productivity. others,
Ion implantation and epitaxial growth methods are also used in the industry to form pn junctions.

It is not widely used for solar cells because of its low productivity.

Conventionally, methods such as vapor deposition and spin coating have been tried in the anti-reflection film formation process, but in practice, methods that do not require a special coating layer and methods that utilize etching properties to form an anisotropically etched surface. is taken.

As mentioned above, in the pn junction formation process and the antireflection film formation process, if we aim to reduce the cost by using the current single crystal silicon substrate, the impurity thermal diffusion and anisotropic etching surface, respectively, are currently the most effective. preferable.

On the other hand, attempts have recently been made to use inexpensive polycrystalline silicon or ribbon crystalline silicon for the silicon substrate itself, and some of these have been crystallized. In these cases, since crystal grains with various orientations exist in the substrate, a good antireflection effect cannot be obtained even if anisotropic etching is performed.

In other words, planes with orientations close to the (100) plane are etched relatively anisotropically, but planes with other orientations are etched isotropically or at different rates, resulting in simply a step at the grain boundary. Therefore, it is necessary to form an anti-reflection film on inexpensive substrates with such grain boundaries.In this case, a solution containing a dopant is added to the temporary sealing prevention material in advance. At present, the method of simultaneously forming an antireflection film and forming a bond by baking after coating is considered to be a shortened process.

Next (about the 111 pole formation process that forms the second current collector pole) Jν is a method of forming a metal thin film using a steam method or a sputtering method, which is excellent in terms of reliability, but has extremely low throughput. Although it is superior in terms of aiming for low price, it is avoided from mass production processes aiming at low price as it has extremely low processing capacity.

Electrode forming processes that have been put into practical use in this ti mass production process include a printing method and a plating method.

Among these methods, the printing method (the second method usually uses basest containing a large amount of expensive silver as raw material feed, which is difficult to use at present, and will become difficult to use when the overall cost decreases in the near future. .At present, there is an aluminum paste for making a P-type high concentration layer (88F) for solar cells, but this aluminum paste tri,
Difficult to use as an electrode.

Further, electrodes produced by printing require a high-temperature firing step as a post-treatment, and unless the oxidized layer on the surface is removed by etching after H7F, the half-FB has poor adhesion and cannot be put to practical use. Usually, hydrofluoric acid is used to remove this etching, but in this case, if the printed electrode metal is present, it will cause a staining phenomenon on the substrate. May cause stains.

In addition, electrodes with exposed silver on the surface progressed to oxidation during long-term use, and also changed color, reducing the commercial value. In addition, printed electrodes have poor adhesion to the substrate, which can lead to electrode peeling accidents, which poses problems in terms of reliability.

On the other hand, plated electrodes are suitable for mass production because materials such as nickel and copper can be formed efficiently at relatively low cost.
There is a step of forming a mask on the parts of the substrate where no electrodes will be formed, and a step of sintering at 400 to 500 degrees Celsius after forming the electrodes due to the high density of conventional single-crystal silicon substrates, which complicates the process. was. In other words, the process of forming a mask ≦ 2. The process of forming a semi-culm. 1. We do not want to introduce contamination into the process, so we do not apply photoresist coating, drying, light exposure, development, and etching, which are common in the semiconductor industry. 'i-th order method is used. Furthermore, since high-temperature sintering involves diffusion of gold 1 into the substrate, it is impossible to reduce the junction depth, which is considered advantageous for improving efficiency.

Based on the above, in order to reduce the cost of solar cells, we have used an inexpensive substrate with grain boundaries, omitted the complicated plating mask formation process and high-temperature sintering process, and improved the adhesion of Kaden-eki and zero-element There has been a demand for a process for forming plated electrodes with good quality.

[Purpose of the invention]

The present invention has been made in view of the above-mentioned problems and demands.The present invention has been made in view of the above-mentioned problems and demands.The substrate on which the plating is applied is selected as a substrate having preferable grain boundaries from the viewpoint of adhesion, and the high temperature sintering process can be omitted. As a result, it is possible to obtain high-performance, low-cost solar cells by simplifying the process by using inexpensive plating and resist formation from the beginning. The purpose is to provide a manufacturing method for.

[Essentials of the invention]

The method for manufacturing a solar cell of the present invention involves preparing a semiconductor substrate that has some steps in the grain boundaries and is in a favorable condition as a plating electrode, and applying a dopant that is different from the surface of the semiconductor substrate A process of applying a solution that contains the anti-reflection film and forming an anti-reflection film, a process of simultaneously forming an anti-reflection film and doping with a dopant by baking, and forming a p-n junction, and a process of forming a p-n junction on the back surface of the substrate (two The M-8i alloy layer is printed with aluminum paste and then fired (performed from the second step).For this firing C2, it is also important to optimize the firing conditions in order to uniformly attach the plating electrode with good adhesion. In other words, avoid firing temperatures exceeding 800'0, which will significantly increase the unevenness of the alloy layer.
Hold the maximum temperature for about 10 to 30 seconds and bake for a short time.Next, a composition J: Rinaru plating resist, which is obtained by removing fillers, pigments, two dyes, etc. from a regular plating resist, was prepared by screen printing. Leave the desired 71'A part [
After etching (removing the anti-reflection +=a from the groove part and exposing the -side surface of the semiconductor substrate by i'!), the surface of the etched semiconductor substrate and the back surface of the semiconductor substrate are On the AI-S i alloy layer, nickel +:.
Perform sintering or solder process by forming two solder layers (-nickel solder).
This is the manufacturing method for Shun 11L. This sinter is usually not necessary, but pattern Ai'i! If the width is narrow (second is 150~
Adhesion may be improved by applying force to fI of sinter of about 300″CI.

[Embodiments of the invention]

The present invention is /1-! ? The process is characterized by a process that improves the smoothness of the polishing process, resulting in improved performance and shortened processes.

For this reason, the conditions of the front and back surfaces of the substrate, which will serve as the base for C second plating, were improved. ' First, the surface cannot be anisotropically etched, so it is smoothed and an anti-reflection film is formed. As a method for smoothing the surface, an etch jig using a mixed acid may be used. Staining occurs.・The method of etching with a fan (the second is etching with a highly concentrated alkaline solution) is effective. The smooth hole has an anti-reflection property, affects post-processing, and it is best to add an IΩ of IΩ at the grain boundary to the extent that it does not cause Ht.
This 21st combination is important from the point of view of adhesion.

Back side) If there are two, the shape will be thicker 7) AI without changing the shape! -S i, 1331i'kj sword, ya (
By conducting the test under conditions where there are large undulations, -f2 can be obtained.

That is, the A/paste is hardened to the mark, dried, and then alloyed by short-time annealing using an external wire.

Compared to the method using an atmosphere heating furnace according to this direction i-]: 2, the adhesion of the plating is much better!
The rumored surface shape is 2・η.

In particular, alloying occurs in the optical range (annealing process for several tens of seconds at a peak temperature of 700"O or higher)5; when the alloying temperature exceeds 800C, the irregularities on the surface become irregularly large. It is important to keep the temperature below this temperature because the appearance of spherical precipitates of aluminum oxide and aluminium oxide will quickly deteriorate. and 8
Unless the temperature was 00 to 850°C, sufficient characteristics could not be obtained and the occurrence of unevenness could not be prevented.

The above treatment of the front and back surfaces improves the adhesion of the plating,
Adhesion is improved. As a result, it is possible to improve performance and shorten the process by devising a two-step process.

First, regarding the improvement of performance, in the conventional process for forming solar cells at low cost, printing methods and conventional plating methods were used to form electrodes, both of which required firing at 450 to 800°C. Such high temperatures significantly promote the diffusion of electrode metal into the semiconductor substrate, typically reducing the junction depth to zero.
．． If the conductivity was not larger than 5 μm, a so-called penetration phenomenon would occur, in which the electrode metal passes through the diffusion layer on the substrate surface and reaches the region of the original conductivity type of the substrate (2 μm), significantly degrading the device characteristics. However, if the junction is 0.5 .mu.m or more, the utilization efficiency for short-wavelength light is low, and this has been one of the factors for improving conversion efficiency.

In contrast, in the present invention, by employing a plating method with good adhesion at low temperatures (secondarily, the bonding depth can be made shallower by about 0.3 μm Jgli), thereby achieving improved characteristics.

In addition, baking at a high temperature of 400°C or higher introduces many impurities contained in printing ink, plating solution, etc. into the substrate, which was a major cause of failure in the past. significantly reduced.

Next, we will discuss the effects of shortening the process (two points will be discussed).

That is, in the present invention, conventionally, the photoresist for plating is etched into a pattern after formation, and the plating resist is made into a plating resist with a composition that can be peeled off even at low temperatures. This is because the adhesion of the plating was sufficiently strong even during low-temperature processing, and as mentioned above, during high-temperature processing (2) the plating It is no longer necessary to consider impurities in the resist so strictly.This is related to C2.In cases where adhesion cannot be maintained without conventional high-temperature processing (2) The conventional plating resist could not be used because impurities were introduced into the substrate during high-temperature processing, and only photoresists that had a proven track record in the semiconductor industry were used. When used, sufficient characteristics could not be obtained.On the other hand,
In the present invention.

Even with such a plating resist (generally used for printed wiring, etc.), sufficiently good characteristics were obtained.

Moreover, in the present invention, a plating resist is used that excludes filler components such as silica and Aerosil, which increase adhesion, pigments, and purple components, which remain as a residue and do not affect the initial characteristics (2), but cause long-term element deterioration. This filler component is used in order to improve the adhesion of the resist (two strips are used, but here, as with plating, the density/1'Y properties of the resist are also sufficiently good by optimizing the condition of the underlying substrate. This is the result of finding out that the filler is not needed.

Dyes and pigments are added in order to make the pattern easier to see by contrasting the color with the underlying substrate (2), but in the present invention, the differences between the surface irregularities and the light reflection state of the resist (2) are added to make the pattern easier to see. It was found that the contrast was sufficient and the pattern could be recognized without adding anything, and it became possible to eliminate this.

As described above, the process was shortened.

Next, we will explain the main points of the present invention, including the important experimental results, especially the two temperature ranges and selection of processes.

First, in the conventional technology, the adhesion of plating was poor, and high temperature treatment (450''C to 60 (1'0)) was used to improve this, but in the present invention, the condition of the lower Jdt is controlled <f We will explain the result of sufficient adhesion even without high-temperature treatment.

That is, the etching of the surface of the substrate is F(i”; CH3
It was found that a 16:15:l mixture of COOH;HNO produced a smooth surface, but after that, when a 20-layer NaOH aqueous solution was heated to 110°C and etched for 1 minute, the adhesion was improved. I found some good things. That is, as shown in Figure 952, 20% NaOH
; When etching is carried out for 0 to 5 minutes using a yJC solution, the adhesion force becomes as shown in the curve 0, and it is said that about 1 minute mj is most preferable (4). This is due to the grain boundary ( It is thought that the 211-ji also has a preferable 4d degree step that increases its performance.

This test for force was carried out using the tensile method described in 7125, ``Mono JV Engineering Mei 1, 7, Qj), 7f Gejyo's Basic Techniques,'' published by Kyoto University Press.

This tensile method applies force in a direction perpendicular to the plane of the thin film;
q, ljA. Specifically, a stainless steel disc with a flat bottom is pasted on the surface of one place with a strong force (71), and the disc is pulled in a direction perpendicular to the surface. (Two pulls, jJJj Gare Li'l 1i4J's power JjiJ
Set/ko.

In the past, one of the reasons for the poor quality of secrets was the above-mentioned ``Unase'' adaptation of the two works.

Next, J, 4th side is described and C end cut r is applied to the shape of the 9' electrode using the conventional plating process. (It is this useless aluminum layer or aluminum paste) J
This is because when the surface is formed on the surface and fired to form 81", unevenness always occurs on the surface, which causes poor adhesion of the plating. In contrast, in the present invention, While using traditional aluminum paste,
By changing the firing method, we have discovered and established conditions for producing a substrate containing BSfI'' that has a smooth surface after firing.

That is, Fig. 3 is a diagram showing the relationship between firing temperature and adhesion, and curve A shows the relationship between conventional atmosphere heating (furnace firing) and
In the method, the BSF effect, that is, the effect of the alloyed layer of Si and A/, could not be obtained unless the temperature was raised to a high temperature of 800 to 850°C, but when firing with a near-infrared lamp, a temperature of 650 to 800°C is sufficient to achieve this effect. I understand. Moreover, in the temperature range of , the surface smoothness is maintained and the adhesion is good like that of the curved Q bottle. Baking time is maximum temperature 1
0 to 30 seconds, rise within 5 minutes, fall 10 minutes
It can be done on a schedule of about minutes.

Next is the groove width of the plating resist.

Almost equal to the width of the electrode. The limit in the printing method is lOoμ, and the lower limit is determined by this. Regarding the upper limit, experimental results show that if the minimum line width is set to 300 μm or more, the conversion efficiency will be extremely reduced. This is Den/11! , (7) The area that is shaded and not exposed to light increases from the second point. Therefore, the minimum width of the electrode is set to 100 to 300μ, but at this time,
150~3 (10μ requires no heat treatment at all)
Even without it, the adhesion was good for a long time, but ioo ~ 1
For 50μ, when an accelerated exposure test of heat, light, and temperature cycles was conducted, which corresponds to an environmental resistance test for several years, poor adhesion occurred. Therefore, line width and constant density M property (3
Curve 0□□□ in Fig. 4 was obtained by investigating the firing temperature for maintaining the adhesion of 00μ width plating)vd without heat treatment. If we consider the limit value of 100μ for one crystal of ν1, it would be sufficient to have a firing temperature of at least 300'O.

The calcination was carried out in nitrogen for (9) minutes. Also shown is a plating layer with a width of 50 = 100 μm, which was created experimentally, although it is not suitable for mass production.

This invention was completed by comprehensively examining the process and optimizing the conditions as described above. Although there is room for various changes in the process, the gist of the present invention is to keep the above-mentioned points in mind, and the manufacturing process of the present invention is defined as such.

Next, a concrete example of the 7A array of the present invention will be explained with reference to FIG.

That is, FIG. 5 shows an I
FIG. 2 is an explanatory diagram of a method for manufacturing a solar cell using a P-type silicon ribbon crystal substrate η with a QcIIL angle. In this case, the characteristics of silicone substrates with the same properties (even if there are two, the same process can be obtained by the casting method).

First, 'dS 5 Figure (a) i: Show, J: U[-
If': Cki3COOH: Hhl)3 to 3f3
A P-type silicon ribbon crystal potash plate (hereinafter referred to as the substrate) (21) is thinned using an etchant mixed at a ratio of 1.5:1. Etchinog for 5 μm and m minutes on both sides of the U substrate (2J)
The substrate (21) has a relatively smooth surface (with a maximum unevenness of 3μ).
The thickness of the second finished substrate (21) was 350/l. After this, surface L: stained glue remains,
This is removed by etching for 1 minute in a NaOH-20% aqueous solution heated to 110'' CI.

Next, as shown in FIG. 5(b), an antireflection solution containing phosphorus is coated on the surface of the substrate 00 and baked.
form. This anti-reflection compatible W+2 is used as feed for titanium oxide, which forms a titanium oxide film when fired in air.
prokoxide (T i <QCs H7)4] to 3.
A 9=1 mixture of ethanol-ethyl heptaacetate containing 5% and 1.5 wt% of phosphorus pentoxide was mixed with an equal amount of butylar resin and applied at a spin speed of 200 Or and p of 0 m.

Next (after drying for 20 minutes at 150°C in two
: 0, = 38: 0.31 (7) 900℃ Te30 in atmosphere
Heating for 1 minute, the bonding depth was 0.
4μ, surface concentration 2×1020 cIrL-3 with n layer (c)
is formed at the same time (titanium dioxide anti-reflection film f22)
is formed.

Next (-as shown in Figure 5(d)) (Aluminum paste (product name: Engelher) A 4538 on the back side)
124) is formed on the entire surface using screen printing property C2.

Next, after drying at 200° C. for 15 minutes, firing is performed in a conveyor-type firing furnace equipped with a near-infrared lamp. This firing is performed at a maximum temperature of 750°C for 10 seconds, with a steep rise of 5 minutes from room temperature to the maximum temperature, held at the maximum temperature for 10 seconds, and then returned to room temperature for 10 minutes.The AI! paste is fired from the schedule port. The atmosphere in this case may be air. Through this firing, AI! atoms are diffused into the substrate ψυ to form a p+ layer ωω which is an alloy layer, as shown in FIG. 5(e) (2).

Next, the silicon or aluminum oxide film on the substrate (2I) is removed by lightly etching it with 10% hydrofluoric acid for 15 seconds, followed by washing with water for 15 minutes and drying.

Subsequently, as shown in FIG. 5(f), (two conventional plating resists, acrylic resin and vegetable oil derivative thickener) were applied.

A plating resist (2) consisting of an organic solvent, filler, and pigment with the filler and pigment removed was formed to a minimum line width of 200 μm by screen printing.

If it is heated at 80°C for 10 minutes to solidify it, the minimum line width will be 150μ.

Next (2) As shown in Figure 5 (g) (2 plating resist sheet υ
10% hydrofluoric acid treatment (two-layer anti-reflective film) as a mask.
2 is removed by etching until two n-layer layers (23)i of the substrate CD are formed.

Next (Fig. 5 (h) (2) As shown in Fig. 5 (h), the commonly known Ni electroless plating was carried out at pH 6.6 for 65°020 minutes to form Ni layer 07) on both sides (-). , as the electrode base.

Next, as shown in FIG. 5 (1), CH2Cl! 2 (after removing 2ii1, plating resist) at 200℃
, heat for 30 minutes to strengthen adhesion. After this, the singing surface was sharpened and shaped using a sand grinder, etc., and then the flux (after dipping the two substrates, 150'OT
- Pb containing 2% of molten Ag by heating for 10 minutes,
sn in the 6-3 solder (= immersed for about 3 seconds, and when pulled up, a - soldered Mr (28) is formed on the N1 layer on both sides. The solar cell is completed by ultrasonic cleaning (remove from 2 and connect the 2 solder-plated leads, ii!il (c)).

AM (A, irMass
) 1.5, radiation power 10o mw/m, 28°
As a result of measuring the characteristics with a solar simulator under the conditions of C, a conversion efficiency of 12.5% could be obtained. This is a higher value than the performance of the conventional low-cost process (2).In other words, a thick 16 battery using the same substrate and printed silver paste "E" electrode has a bonding depth of Deep as 0.6 μ, efficiency is l 011%, compared to conventional 4
In a solar cell with a plated electrode that was heat-treated at 50°C, the efficiency was 11.0%, which was inferior to the present invention.

In addition, the manufacturing method of the present invention (according to 2) the complicated plating mask forming process using light exposure and the sintering process at high temperature can be omitted, the process can be shortened, and productivity can be increased. Moreover, since the solder layer is formed on the surface (2) compared to the solar panel using two printed electrodes, it can last for a long time (2).
, Ikutaru Valley Insect's Incorrect Residence Test (It is stable even for two.

〔Effect of the invention〕

As described above, according to the uninvented solar cell manufacturing method, it is possible to obtain a solar cell with low 1i1ii and excellent reliability.

[Brief explanation of drawings]

Figure 1 is a schematic cross-sectional view showing the structure of a conventional solar cell;
Figures 4 to 4 are diagrams showing the results of basic experiments of the solar cell manufacturing method of the present invention, and Figure 2 shows the relationship between the etching time of the substrate surface and the adhesion force of plating. There is no guarantee between the width and the success rate of the dawn.
The figure is an explanatory cross-sectional view. 21... Silicon substrate 22 Kawabata J village prevention group 23...
・N layer 24...aluminum paste 2!5...
・P layer Z5 River plating resist 27...Nickel layer 28...Half IB) 29...Lead size. Agent Patent Attorney Inoue - Male Figure 1 Figure 2 En! I-ng time (Δt) - 3rd figure 7th l/cyst division middle (μ) -

Claims (1)

[Claims] The surface of a semiconductor substrate having crystal grain boundaries (= the step of applying a solution that contains a different type of dopant from that of the semiconductor substrate and forming an antireflection film, and the formation of an antireflection film and doping of the dopant at the same time by baking) (Two lines and p
A step of forming an n-junction, a step of forming an A/-84 alloy layer on the back surface of the semiconductor substrate, and a step of forming an A/-84 alloy layer with a near-infrared lamp (two steps) after printing an aluminum paste on the back surface of the semiconductor substrate. A step of forming a plating resist containing no pigment or filler in a pattern leaving desired grooves by a printing method, and a step of etching the antireflection film through the desired grooves to expose the surface of the semiconductor substrate. Then, a nickel film is formed on the /V-8i alloy metal on the exposed surface of the semiconductor substrate and the back surface of the semiconductor substrate by an electroless plating method, and then sintering is performed or not (
2. A method for manufacturing a tai 1 yang 1 yen pond, comprising the steps of: 2 forming a solder layer on the nickel film.