JPS6041461B2 - Method for forming electrode wiring in semiconductor devices - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming electrode wiring in a semiconductor device.

Au, Pt, Ti (gold, platinum, titanium) and Au, W, Ti (gold, tungsten, titanium) have been developed as multilayer metal interconnection technology based on gold in semiconductor integrated circuit devices.
Or Au, Pd, Tj (gold, palladium, titanium)
So-called tri-metal electrode wiring techniques such as the above are well known.

For example, in the case of Au/Pt/Ti, referring to FIG. 13, Ti and Pt are sputtered onto the substrate 1 to form a Ti film 12 and a Pt film 13, and a photoresist mask having through holes in the desired wiring pattern shape is used. 15 is formed, the exposed Pt film surface is plated with Au to form the wiring pattern shape A.
After forming the U electrode wiring 16, the photoresist mask is removed. According to this secondary technology, the first step is to perform Au plating using a photoresist mask.
As shown in FIG. 4, the cross-sectional shape of the Au electrode 16 follows the photoresist shape and has an overhanging shape that is wide at the top and narrow at the bottom. For this reason, referring to FIG. 15, when an insulating film 17 for electrode protection is formed thereon, a stepped portion 18 is formed around the electrode 16, resulting in poor coverage. If a multilayer wiring is formed to pass over this stepped portion, a disconnection failure will occur. In view of the above points, the inventor of the present application considered that the surface could be flattened by embedding a plating wiring layer into the insulating film, and focused on replacing the photoresist of the plating mask with an insulating film. .

Therefore, an object of the present invention is to provide a flat A in the finished shape.
The objective is to obtain a transparent electrode wiring structure, thereby preventing poor coverage of the electrode wiring protective film. In order to achieve the above object, the present invention involves forming one or more layers of insulating film on a semiconductor substrate, forming a groove in the shape of a wiring pattern in this insulating film, and filling this area in electrode wiring directly in a semiconductor bag. The gist of the present invention is to form wiring in the shape of the wiring pattern made of a gold-plated layer, and to connect at least a portion of the wiring as an electrode to a semiconductor substrate in an ohmic manner.

The present invention will be described in detail below with reference to Examples.

FIGS. 1 to 11 show an example of the electrode wiring forming method according to the present invention, with cross-sectional views showing each step.

In FIG. 1, a p-type base 2 and an n+-type emitter 3 are formed on one main surface of an n-type Si (silicon) substrate 1 by a known selective diffusion technique, and are formed on the surface to a thickness of about 1 mm. Contact photoetching is performed on the doped film (Si02) 4 to form base and emitter contact holes 5 and 6.
The state in which the value has been raised is shown.

In FIG. 2, a Si3N4 (silicon nitride) film 7 is formed to a thickness of about 0.2 mm on the surface of the oxide film 4, a contact hole is formed, and then St. By depositing (platinum) and sintering, the
．． A state in which a Pt--Si (platinum/silicide) alloy layer 8 is formed at a depth of 0.5 meters is shown.

As shown in FIG. 3, a phosphorus silicate glass (G) layer 9 containing 4 mol% of P (phosphorus) is formed on the entire surface to a thickness of about 1.5 rm, and the required wiring pattern shape is formed using photoetching technology. A portion of the PSG is etched away to obtain grooves 10 and 11. Of these, a contact hole 5 is connected to the groove 10, and a contact hole 6 is connected to the groove 11. As shown in FIG. 4, Ti (titanium) and Pt (platinum) are sputtered over the entire surface along the sides and bottom of the groove, and a Ti film 12 and a Pt film 12 with a thickness of 0.1 rm are formed, respectively.
A film 13 is formed.

Referring to Figure 5, PIQ (polyimide resin) 1 is applied to the entire surface.
4 is applied to a sufficiently thick layer (approximately 4 m) by, for example, a spin coating method so that it is embedded in the groove.

After that, the PIQ surface is etched by soaking it in an organic solvent such as a hydrazine/ethyleneamine mixture, so that the PIQ 14a, 1
4b and remove the other PIQ parts.

Next, using the PIQs 14a and 14b in the grooves as masks, the exposed Pt film 13 outside the grooves is etched away, and then photoresist is etched so that the PIQs in the wiring pattern-shaped grooves are exposed, as shown in FIG. A mask 15 is formed.

As shown in FIG. 8, the PIQ in the groove is dissolved and removed.

Referring to FIG. 9, by electroplating using the Ti film 12 as a conductive layer with the photoresist mask 15 applied, the surface of the Pt film 13 exposed to the premises has a height approximately equal to that of the surface of the PSG layer 9. Au plating layers 16a and 16b are formed to a thickness of about 1.5 m so as to have the same height.

Thereafter, the photoresist mask is removed and the Ti film on the surface of the positive G film 9 is removed by etching, so that electrode wiring made of a gold plating layer is embedded within the wiring pattern shape as shown in FIG. is formed.

After this, as shown in FIG.
form 7.

According to the configuration of the present invention described in the embodiments above, referring to FIG. 12, a groove in the shape of a wiring pattern is formed in the insulating film 9 on the substrate, and a gold plating layer is formed so as to be embedded in the groove. Since the electrode wiring 16 is formed, the upper surface of the wiring does not protrude or overhang as in the conventional case, and the surface is flattened, making it easier to form the electrode wiring protective film and reducing poor coverage. can be prevented, and
This provides various effects such as making it possible to form fine patterns of Au-plated wiring.

The present invention is not limited to the embodiments described above, and may explore other forms.

For example, P temporarily filled in a wiring pattern-shaped premises.
Other organic resins with fluidity can be used in place of IQ. Furthermore, a photoresist mask is not necessarily required during Au plating. That is, since plating is difficult to adhere to the surface of a Ti film, selective Au plating can be applied to the surface of a Pt film without a mask. As the intermediate metal film, Nj (nickel) or Cte (chromium) may be used instead of Ti, and Pd (palladium), Ni, etc. may be used instead of Pt.

This invention can be applied to all types of semiconductor devices, ICs, and LSIs.

[Brief explanation of drawings]

Figures 1 to 11 show the manufacturing method according to the present invention in the order of steps. be. FIG. 12 is a sectional view showing the basic structure of a crab electrode according to the present invention, and FIGS. 13 to 15 are sectional views of conventional electrodes. 1...n type silicon substrate, 2...P ten type base,
3...n-type emitter, 4...surface oxide film, 5, 6
...Contact hole, 7...Si3N4 film, 8...P
t-Si alloy layer, 9... Tower C film, 10, 1 1
・・・・・・Wiring pattern shaped groove, 12...Ti
Film, 13...Pt film, 14...PIQ, 15...Photoresist film, 16...Au plating layer, 17...
...Electrode protection insulating film (CVD film), 18...
Step. Tsutomu's younger brother, Tsutomu Otsu, 3, his younger brother, Tsutomu, Tsutomu, Tsutomu, Tsutomu Kaede, Tsutomu's 2, Tsutomu, Tsutomu's 3 younger brother, child, Ota, Ta-kan.

Claims (1)

[Claims] 1. A step of forming an insulating film in one or more layers on a semiconductor substrate, a step of forming a groove in the shape of a wiring pattern in this insulating film and exposing the semiconductor substrate in at least a part of the groove, and the side and bottom parts of the groove. The process of forming an intermediate metal film on the entire surface along the above-mentioned grooves, selectively filling the intermediate metal film with a relatively fluid organic substance so as to fill the grooves, and using this organic substance as a mask, fill the grooves. A step of etching away part or all of the intermediate metal film in the portion where it is not to be formed, a step of removing the organic substance, and a step of etching the intermediate metal film in the groove from which the organic substance has been removed to a surface approximately equivalent to the surface of the insulating film. 1. A method for forming electrode wiring in a semiconductor device, the method comprising at least the step of forming a gold plating layer of a certain height.