JPS6029075A - Fm receiver - Google Patents

Abstract

PURPOSE:To design smooth reception in acoustic conditions without a rapid increase in noise level by connecting a variable gain amplifier with a constant gain amplifier in parallel. CONSTITUTION:The signal level detector-6 detects an input level of receiving signals, and outputs gain control signals corresponding the input level. A variable gain amplifier 5 controls as small as possible the output level of a demodulator 4 which is FM-demodulating the receiving signals by the gain control signals of a detector 6. A constant gain amplifier 8, having the constant gains of greater gains than minimum amplification degree of the amplifier 5, is connected in parallel with the amplifier 5.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an FM receiver in which auditory abnormalities caused by noise are reduced.

Generally, in an FM receiver, as the input signal strength input to the IP amplifier decreases, the demodulation output voltage of the demodulation circuit also decreases, but the noise voltage at the output of the demodulation circuit increases. Therefore, in conventional FM receivers, a variable gain circuit is added after the demodulation circuit, and in the input signal strength region where the demodulated output voltage of the demodulation circuit decreases and the noise voltage increases, the variable gain circuit adjusts the gain according to the signal strength. By controlling the gain of the input signal and allowing it to be attenuated by this variable gain circuit as the input signal strength becomes weak, it is generally considered that the noise output voltage is attenuated at the signal output terminal as well as the detection output voltage. There is.

FIG. 1 is a block diagram of a conventional FM receiver.

That is, the received signal input from IP input terminal 1 is
IP amplifier 3. Demodulation circuit 4. The signal is outputted to the signal output terminal 2 through the variable gain amplifier 5. On the other hand, the signal input from the IP input terminal 1 is amplified by the IP amplifier 1, and at the same time, its output is input to the signal strength detection circuit 6 that detects the input signal strength, and outputs a control signal according to the input signal strength. do. This control signal is amplified by the control signal amplifier 7 and inputted to the gain control terminal (17) of the variable gain amplifier 5 to perform gain control.

FIG. 2 is a circuit diagram of a conventional variable gain amplifier 50. First, the output of the control signal amplifier 7 is applied to the input terminal 17, and when the input signal strength is low, it is small with respect to the reference voltage input from the input terminal 10; A signal corresponding to a reference voltage of 10 is provided. Further, a demodulated signal from the demodulation circuit 4 is inputted to the signal input terminal 14, and an output signal is outputted from the signal output terminal 2. In this circuit, transistors 22 and 23 constitute a differential amplifier, the gain of which is controlled by the voltage at terminal 10.17.

Here, if the output voltage of the signal output terminal 2 is v2, the following equation holds true.

Here, R25 is the resistance value of the resistor 25, gm24 is the mutual conductance of the transistor 24, and Vl4 is the input terminal 1.
The input signal voltage from 4, V 17 + vto, is the input terminal 17, 1 (1) control! The pressure and VT are assumed to be VT=kT/4.

If the output voltage of the terminal 2 when the input signal strength is high and the so-called variable gain amplifier has the maximum gain (when Vl7<:Vl) is V2O, the following equation is obtained from equation (1).

V20KR2116gm24KV14 ・・・・・・(
2) Therefore, this variable gain amplifier 5 has terminals 10 and 17.
The gain value varies depending on the voltage of ATT, and the variable range ATT is as follows.

......(3) From this equation, when the input (g signal strength) of the IF input terminal -f:l is small, when the so-called variable gain amplifier has the minimum gain ATTO (Vl7>'i'IO of time) is as shown in the following equation, and this relationship is shown in FIG.

According to this conventional circuit, the terminal 17 which is the gain control signal
The minimum gain ATTo can be varied by changing the voltage of , and theoretically it is possible to realize this ATTo down to an infinitesimal value. FIG. 4 shows the characteristics of the input signal strength of the IP input terminal 1 versus the signal output voltage and noise output voltage at the signal output terminal 2 when the minimum gain ATT is varied.

From this figure, by varying the gain ATTo, the signal output voltage S and the noise output voltage N are varied, and when the gain is not controlled (AT'l'o=O), the signal voltage 81 + the noise voltage N1. When the gain control is medium (ATTO ~ medium), the signal voltage S2. Noise voltage N2, minimum gain (ATTo ~ minimum)
In this case, the signal voltage S3+the noise voltage N3 is obtained. Further, below the input signal level LA, there is only a noise level, and above the input signal level Llim, the signal level is constant, and the signal and noise output voltages are varied from this input signal level Llim to LA. Furthermore, when the output signal voltage falls below the audibility limit level, the received sound becomes inaudible, so it is usually set above this level Vlis, that is, the input signal level is received at a position where a certain amount of noise can be heard when the level is above 0.

On the other hand, as can be seen from this figure, the noise voltages N, , N rise like mountains when the input signal level ranges from the weak input signal (LA) to the medium input signal (Llim). This means that if the received signal is suddenly interrupted during reception at such a reception level, for example by entering a tunnel, the FM receiver will suddenly output a large amount of noise. This condition of the receiver has the disadvantage of making the sound harsh on the ears.

Another disadvantage is that when the gain A'I'To becomes less than the audible threshold level Vlis due to variations in the voltage of the gain control signal (Vl7), a sound dropout phenomenon occurs, and it is not possible to determine whether or not the receiver is malfunctioning.

SUMMARY OF THE INVENTION An object of the present invention is to provide an FM receiver that eliminates the above-mentioned drawbacks, eliminates sudden increases in noise level, and allows reception with smooth hearing.

The FM receiver of the present invention includes: a demodulator that performs FM demodulation of a received signal; a signal level detector that detects the input level of the received signal and outputs a gain control signal corresponding to the input level; a variable gain amplifier that suppresses the output level of the demodulator when the input level becomes small; and a constant gain amplifier connected in parallel with the variable gain amplifier and having a constant gain greater than the minimum amplification of the variable gain amplifier. It consists of:

The present invention will be explained in detail below with reference to the drawings.

FIG. 5 is a block diagram of an embodiment of the present invention, and the same numbers as in FIG. 1 indicate the same components.

This embodiment is characterized in that a constant gain amplifier 8 is provided in parallel with the conventional variable gain amplifier 5. In this embodiment, the signal input from the F input terminal 1 is sent to the IP amplifier 3. Demodulation circuit 4. The signal is outputted to the signal output terminal 2 through the variable gain amplifier 5. On the other hand, the F input signal is amplified by the IP amplifier 1, and at the same time its output is supplied to the signal strength detection circuit 6 that detects the input signal strength, outputs a control signal according to the input signal strength, and controls the The signal is amplified by the control signal amplifier 7 and input to the variable gain amplifier 5. Further, the demodulated signal from the demodulation circuit 4 is input to a constant gain amplifier 8, and by adding the output thereof to the output of the variable gain amplifier 5, a circuit for performing gain control can be constructed.

FIG. 6 is a circuit diagram of the variable gain amplifier portion of FIG. 5. In the figure, the same numbers as in FIG. 3 indicate the same components. In this circuit, a constant gain amplifier 8 is composed of a transistor 30 and a resistor 3. In this circuit, signal output terminal 2
Let the output voltage of transistor Q30 be v3, and Gm of transistor Q30 be g
If rnjo is set, the following equation is obtained.

(5) In this equation, when the human input signal strength of the IP input terminal 1 is a dog, that is, when the variable gain amplifier 5 has the maximum gain (V 1
7 <Vto), and if the output voltage of terminal 2 is V2O, then the following is obtained.

VIIO Kirin 25 X V14 X [g(y124+
gmso], “”” (6) these (5), (6
), the circuit of FIG. 6 changes its gain value according to the voltage at terminals 10.degree.17 as shown in the following equation.

......(7) From this equation (7), when the IP input signal strength is small, that is, when the variable gain amplifier has the minimum gain ATT1m (
V17>Vto) The following equation is obtained.

That is, the minimum gain of the variable gain amplifier is compensated by %gm3G, as shown in FIG.

Figure 8 shows the signal output at the signal output terminal of this embodiment.
FIG. 3 is a characteristic diagram of the noise output voltage versus the input signal level of the IP input terminal. In this figure, the signal output and noise output characteristics when the variable gain amplifier 5 operates at maximum gain without being subjected to gain control by the gain control circuit are S I r N 1, and the signal output and noise characteristics due to only the constant gain amplifier 8 80. No, and the signal output and noise characteristics by only the variable gain amplifier 5 are set to 84. Assuming N4, the signal output and noise characteristics of this embodiment are the addition of the characteristics of the constant gain amplifier 8 and the characteristics of the variable gain amplifier 5, so as shown in s 810 s N10, the noise is below the hearing threshold level Vlis. The output is a polygonal line with output. Furthermore, the signal output and noise characteristics when the signal output voltage under the conventional weak input signal strength is adjusted to the audibility limit level Vlis are N5. It is indicated as N. This figure shows that as a noise characteristic, conventionally, the noise becomes audible when the input signal strength is weak or less than the input signal level Llim, but in this embodiment, the noise is audible when the input signal strength is weak or less than the input signal level Llim. Optimum noise characteristics can be obtained without any noise.

Note that the gain value A of the constant gain amplifier 8 in this embodiment,
is set by the following formula.

From equation (9), the gain A can be suppressed by suppressing variations in resistance of the resistors R2, R31.

Generally, in an FM receiver, Vlis is -30 to -40d
B Optimal T6 L, VoyiZ -5~-1
Since it is 5 dB, it is optimal when the AP is set between -15 and -35 dB. Also, the gain AT of the variable gain amplifier 5
T1m is ATTlm<AF, and this ATTlm is -
25 to -45 dB is optimal.

FIG. 9 shows a part of the specific circuit of this embodiment. This circuit consists of transistor Q221 Qhs tQ24
y Q47, Q48 + Q49 and resistor R2,, R
50 corresponds to the variable gain amplifier 5, the amplifier circuit consisting of the transistor Qso and the resistor R31 corresponds to the constant gain amplifier 8, and the transistor Q40 + Q
41 + Q41! ＋Q4! l s resistance ft44'
, fL45 and a constant current source I46 corresponds to the control signal amplifier 7.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an example of a conventional FM receiver, Fig. 2 is a circuit diagram of the variable gain amplifier shown in Fig. 1, Fig. 3 is a characteristic diagram of the variable gain amplifier shown in Fig. 2, and Fig. 4 is a conventional FM receiver. Characteristic diagram of input signal level versus signal and noise output level of the FM receiver,
5 is a block diagram of an embodiment of the present invention, FIG. 6 is a circuit diagram of a variable gain amplifier including the constant gain amplifier of FIG. 5, FIG. 7 is a characteristic diagram of the variable gain amplifier of FIG. 6, and FIG. 9 is a characteristic diagram showing input signal strength versus signal and noise output according to an embodiment of the present invention, and FIG. 9 is a partial circuit diagram of the specific example of FIG. 5. In the figure, 1...IP input terminal, 2...Output terminal, 3...IP amplifier, 4...Demodulation circuit, 5... Variable gain amplifier, 6... Signal strength detection circuit, 7... Control signal amplifier, 8...
...Constant gain amplifier, 10,51.52...
Reference voltage input terminal, 14... Demodulation signal input terminal, 17... Control signal input terminal, 20, 21'.
・・・-・Power terminal %I46°°°°゛°constant current source s
Q271”24 * Qso tQ4゜+-4a r
Q47-49...Transistor, k y 26
+R31, ft+44.45. R5o--Resistance. It is. Whip 1 @Kohi E- (Mourning is not mine)

Claims (1)

[Claims] a demodulator that performs FMS modulation of the received signal; a signal level detector that detects the input level of the received signal and outputs a gain control signal corresponding to the input level; and when the input level is reduced by the gain control signal. An FM receiver comprising: a variable gain amplifier that suppresses the output level of the demodulator; and a constant gain amplifier connected in parallel with the variable gain amplifier and having a constant gain greater than the minimum amplification of the variable gain amplifier.