JPS602828U - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS602828U JPS602828U JP9460183U JP9460183U JPS602828U JP S602828 U JPS602828 U JP S602828U JP 9460183 U JP9460183 U JP 9460183U JP 9460183 U JP9460183 U JP 9460183U JP S602828 U JPS602828 U JP S602828U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit device
- semiconductor integrated
- transistors
- external appearance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図の従来の半導体集積回路の部分平面図、第２図は
第１図の平面図、第３図は不良部分を示す平面図、第４
図は本考案実施例の部分平面図、である。
なお図において、１０・・・・・・ポリシリコン配線、
２０・・・・・・拡散層、３０・・・・・・不良部分、
４０・・・・・・印、である。
補正 昭５９− ６−１９
− 図面の簡単な説明を次のようｉこ補正する。
明細書第４頁第１４行の「第１図の従来の」を「第１図
は従来の」と補正する。FIG. 1 is a partial plan view of a conventional semiconductor integrated circuit, FIG. 2 is a plan view of FIG. 1, FIG. 3 is a plan view showing a defective part, and FIG.
The figure is a partial plan view of an embodiment of the present invention. In the figure, 10... polysilicon wiring,
20...diffusion layer, 30...defective part,
40... mark. Amendments 1980-6-19 - The brief description of the drawings has been amended as follows. In the 14th line of page 4 of the specification, "the conventional art shown in FIG. 1" is corrected to "the conventional art shown in FIG. 1".
Claims (1)
有する半導体集積回路装置において、基板上の位置を示
す印を外観が同一のトランジスタ等がくり返し配置され
ている所に付加されている事を特徴とする半導体集積回
路装置。In a semiconductor integrated circuit device having a large number of transistors, etc. with the same external appearance on the same semiconductor substrate, a mark indicating the position on the substrate is added to the place where the transistors, etc. with the same external appearance are repeatedly arranged. Semiconductor integrated circuit device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9460183U JPS602828U (en) | 1983-06-20 | 1983-06-20 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9460183U JPS602828U (en) | 1983-06-20 | 1983-06-20 | Semiconductor integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS602828U true JPS602828U (en) | 1985-01-10 |
Family
ID=30226370
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9460183U Pending JPS602828U (en) | 1983-06-20 | 1983-06-20 | Semiconductor integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS602828U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009206190A (en) * | 2008-02-26 | 2009-09-10 | Fujitsu Microelectronics Ltd | Electronic device and method of analyzing the same |
-
1983
- 1983-06-20 JP JP9460183U patent/JPS602828U/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009206190A (en) * | 2008-02-26 | 2009-09-10 | Fujitsu Microelectronics Ltd | Electronic device and method of analyzing the same |
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