JPS60264147A - Dc restoration circuit - Google Patents

Abstract

PURPOSE:To offer a DC restoration circuit suitable for a high speed pulse by using a current switching type differential amplifier circuit and utilizing a difference of maximum values of two collector potentials to control a base voltage of a transistor (TR) of the differential amplifier circuit thereby setting a time constant independently of a signal voltage source and a load. CONSTITUTION:Different complementary symmetrical output voltages are produced in load resistors 10, 11 by a signal input inputted via a coupling capacitor 13 to a base of a TR8. A time constant tau when a diode is cut off in the DC restoration circuit comprising the diode is given as tau=C.RE, where RE is an input resistance of an emitter follower formed by TRs 18, 20 and C is a capacitance of capacitors 15, 17 of a peak detection circuit. Thus, the time constant tau is selected independently of a signal voltage source resistance and a circuit load resistance.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a DC regeneration circuit used in a receiving section of a digital optical communication device.

(Prior Art) Generally, in a receiving section of a digital optical communication device using a binary code, the reception amplifier circuit has a DC cutoff characteristic, so that fluctuations in the transmission code pattern cause DC fluctuations in the received pulse waveform at the input of the identification circuit. This DC fluctuation results in a fluctuation in the discrimination reproduction level relative to the received pulse, and therefore causes deterioration in the error rate characteristics due to the code pattern. Therefore, in such devices, in order to keep the DC level of the received pulse waveform constant regardless of the transmission code pattern, it is common to insert a DC regeneration circuit into the input of the identification circuit.

Conventionally, such a DC regeneration circuit is as shown in Figure 1.
diode clamp circuits have been widely adopted. 1st
In the figure, 1 is a capacitor for DC cutoff, 2 is a diode for DC regeneration, 3 is a reference voltage for DC regeneration, 4 is a load resistance for the circuit, 5 is an input terminal, 6 is a signal voltage source, and 7 is a resistor. It is. A pulse waveform (signal voltage source 6) applied via the input terminal 5 is applied to the load resistor 4 via the DC-blocking capacitor 1.

Here, if the voltage of the given pulse waveform is lower than the reference voltage for DC reproduction, diode 2 is conductive, and if it is higher than the reference voltage, diode 2 is cut off, so the minimum value of the potential of the pulse waveform is The reference voltage is maintained, and the DC component is reproduced without being affected by DC fluctuations in the pulse waveform of the input terminal 5.

Although the configuration of such a DC regeneration circuit is simple, the time constant τ of DC regeneration when the diode is cut off, which is the most important characteristic in a DC regeneration circuit used in the receiving section of a digital optical communication device, is the same as that of capacitor 1. Since the capacitor 01, the resistance value BS of the output resistor 7 of the signal voltage source 6, and the mechanical resistance value RL of the load resistor 4 are approximately given by r=OX(Rs+RL), the time constant τ of the signal voltage source The disadvantage was that it depended on the output resistance and the load resistance. In addition, since the diode 2 for DC regeneration is inserted in parallel with the load on the b side, the input impedance for high-frequency signals decreases due to the effect of the junction capacitance of the diode for high-speed pulse signals, causing deterioration of the pulse waveform. It also had the disadvantage of causing problems.

(Object of the Invention) The object of the present invention is to provide a current switching type transistor in which the emitter of a first transistor whose base serves as a signal input terminal and the emitter of a second transistor whose base serves as a control voltage input terminal are interconnected. A dynamic amplification circuit is formed, and first and second peak detection circuits for detecting the maximum value of the collector potential are connected to the collectors of the first and second transistors, respectively, and the outputs of the first and second peak detection circuits are connected to the collectors of the first and second transistors. A voltage control circuit that outputs a voltage proportional to the difference between the output voltages of each peak detection circuit is connected to.

By connecting the output of the voltage control circuit to the base of the second transistor as the control voltage, the above disadvantages are eliminated, there is no waveform deterioration for high-speed pulse signals, and the time constant of DC regeneration is independent of the signal source and load. An object of the present invention is to provide a DC regeneration circuit configured to be selectable.

(Structure of the Invention) The DC regeneration circuit according to the present invention includes a current switching type differential amplifier circuit, first and second peak detection circuits, a voltage control circuit, and connection means.

The current switching type differential amplifier circuit consists of an ml and a second transistor, the DC component of the signal is removed and only the AC component is applied to the base of the first transistor, and a control voltage is applied to the base of the second transistor. , the first ip and the second
The emitters of the transistors are interconnected, and a constant current source is connected to the emitters.

The first and second peak detection circuits have reference voltages for voltages generated across first and second load resistors connected to the collectors of the first and second transistors of the current switching differential amplifier circuit, respectively. The purpose is to detect the maximum value of deviation from .

The voltage control circuit is for outputting a voltage proportional to the difference between the output voltages of the first and second peak detection circuits as the control voltage.

The connection means is for applying the output of the voltage control circuit to the base of the second transistor as the control voltage.

(Example) Next, an example of the present invention will be described with reference to the drawings. FIG. 2 is a circuit diagram showing an embodiment of the DC regeneration circuit according to the present invention. In Figure 2, 8.9 is the first
and the second Q) transistor, 10.11 are the first
and a load resistance of the second transistor, 12 a constant current source, and 13 a coupling capacitor for cutting off direct current. 14,1
5°18.19 forms the first peak detection circuit, 14
゜18 are transistors, 15 capacitors, 1
9 is a resistor. On the other hand, 16, 17, 20°21
form a second peak detection circuit, 16 and 20 are transistors, 17 is a capacitor, and 21 is a resistor. 22 is a voltage control circuit, and 23 is connection means.

Transistor s t in FIG. 2 9. Load resistance k 10
sll and a constant current source 12, a load resistor 1 is
0.11, respectively different complementary and symmetrical output voltages are produced. Further, the collector of the transistor 8 is connected to the first stage of a peak detection circuit including a transistor 14 and a capacitor 15, and the collector of the transistor 9 is connected to the first stage of a peak detection circuit including a transistor 16 and a capacitor 17. As shown in FIGS. 3(a) and 3(b), the maximum value Vp- of the collector potential of the transistors 8 and 9
and Vp are respectively detected by the peak detection circuit. The maximum values vp- and vp+ are applied to the input terminal of the voltage control circuit 22 through an emitter follower formed by a transistor 18 and a resistor 19, and an emitter follower formed by a transistor 20 and a resistor 21, respectively.

Differential amplification is performed by the voltage control circuit 22, and vp-vp-
A voltage proportional to is obtained at the output terminal of the voltage control circuit 22. The output of the voltage control circuit 22 is connected to the base of the second transistor 90 via the connecting means 23, and the output of the voltage control circuit 22 is connected to the base of the second transistor 90, and
The base potential is controlled so that they are equal to each other. Here, when a DC voltage fluctuation occurs in the input waveform of the transistor 8, a DC level shift occurs in the collector voltage waveform in FIG.
p″″ vary complementary to each other. This fluctuation is differentially amplified by the voltage control circuit 22, and the transistor 9
In order to control the base potential of the load resistors 10 and 11, a constant DC component is always regenerated.

The time constant τ when the diode is cut off in the conventional diode-based DC regeneration circuit Kb is determined by the input resistance RE of the emitter follower formed by the transistors 1s and 20 and the capacitor 15 of the peak detection circuit.
．． Using a capacitance C of 17, it is approximately given as τ=O−RB. Therefore, the time constant τ can be selected independently of the signal voltage source resistance and the circuit load resistance.

Since the junction capacitance of the peak detection circuit is directly connected in parallel with the load, the influence of the junction capacitance can be reduced compared to the conventional DC regeneration circuit. In addition, the main signal circuit section from the signal input terminal to the load resistor in the main circuit is comprised of a current switching differential amplifier circuit, so DC regeneration is possible without waveform deterioration for high-speed pulse signals. Is possible.

(Effects of the Invention) As explained above, in the present invention, the base voltage of one transistor of the differential amplifier circuit is controlled by the difference between the maximum values of the two collector potentials in the current switching type differential amplifier circuit. This allows the time constant to be set independently for the signal voltage source and load, making it possible to provide a DC regeneration circuit suitable for high-speed pulses. There is an effect called.

[Brief explanation of drawings]

FIG. 1 is an example of a circuit diagram of a DC regeneration circuit in the prior art. FIG. 2 is a circuit diagram showing an embodiment of the DC regeneration circuit according to the present invention. FIG. 3 is a waveform diagram showing an example of the collector voltage waveform of the differential transistor in FIG. 2. 1, 13, i5, 1? ...Capacitor 2...
Diode 3...Voltage source 4, 7, 10, 11.19.21...Resistor 6.
...Signal sources 8, 9, 14.16.18.20...Transistors 12...Constant current source 22...Voltage control circuit 5...
・Terminal 23...Innovative means patent applicant NEC Corporation agent Patent attorney Hisashi Inoro Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] consisting of a first and a second transistor;
) removing the direct current component of the signal and applying only the alternating current component to the transistor pace, applying a control voltage to the second transistor pace, and interconnecting the emitters of the first and second transistors; A current switching type differential amplifier circuit formed by connecting a constant current source to the emitter, and first and second transistors respectively connected to the collectors of the first and second transistors of the current switching type differential amplifier circuit. 2
first and second peak detection circuits for detecting the maximum deviation of the voltage generated across the load resistance from the reference voltage; and proportional to the difference in output voltage of the first and second peak detection circuits. a voltage control circuit for outputting a voltage as the control voltage; and a connection means for applying the output of the voltage control circuit as the control voltage to the pace of the second transistor. DC regeneration circuit.