JPS60262472A - Manufacture of transistor - Google Patents
Manufacture of transistorInfo
- Publication number
- JPS60262472A JPS60262472A JP59118164A JP11816484A JPS60262472A JP S60262472 A JPS60262472 A JP S60262472A JP 59118164 A JP59118164 A JP 59118164A JP 11816484 A JP11816484 A JP 11816484A JP S60262472 A JPS60262472 A JP S60262472A
- Authority
- JP
- Japan
- Prior art keywords
- cdte
- layer
- transistor
- concentration
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 229910004613 CdTe Inorganic materials 0.000 claims abstract description 15
- 238000009826 distribution Methods 0.000 claims abstract description 10
- 239000012535 impurity Substances 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 10
- 230000008020 evaporation Effects 0.000 claims description 9
- 238000001704 evaporation Methods 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 claims description 3
- 239000000758 substrate Substances 0.000 abstract description 5
- 230000035945 sensitivity Effects 0.000 abstract description 3
- 239000011521 glass Substances 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 7
- 238000007740 vapor deposition Methods 0.000 description 6
- 229910017629 Sb2Te3 Inorganic materials 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(III) oxide Inorganic materials [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
- H01L31/0264—Inorganic materials
- H01L31/0296—Inorganic materials including, apart from doping material or other impurities, only AIIBVI compounds, e.g. CdS, ZnS, HgCdTe
- H01L31/02963—Inorganic materials including, apart from doping material or other impurities, only AIIBVI compounds, e.g. CdS, ZnS, HgCdTe characterised by the doping material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/11—Devices sensitive to infrared, visible or ultraviolet radiation characterised by two potential barriers, e.g. bipolar phototransistors
- H01L31/1105—Devices sensitive to infrared, visible or ultraviolet radiation characterised by two potential barriers, e.g. bipolar phototransistors the device being a bipolar phototransistor
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、ヘテロ接合ｌ〜ランジスタに関するも１−
のであり、特に高性能で安価な薄膜型ホ１−トランジス
タの製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a heterojunction transistor, and particularly to a method for manufacturing a high-performance and inexpensive thin film transistor.
（従来例の構成とその問題点）
従来、トランジスタはＧｅまたはＳｊ単結晶基板内にエ
ミッタ領域、ベース領域およびコレクタ領域を形成した
のち、各々の領域に電極を設け、それにリード線を接続
して、所定の目的に対して使用されている。使用目的に
応じて、ｎ−ｐ−ｎ型やｐ−ｎ−ｐ型のトランジスタが
作られるが、そのいずれもが原理的にはエミッタ領域か
らベース領域への少数キャリアの注入現象を利用するも
のであって、その少数キャリアが伝導度を変調する主役
をなしている。これらには実用という点から、電力利得
が大きいこと、高周波特性が良いこと、安定で信頼度が
高いこと、雑音や歪が少ないことが要求される。ところ
で、フォトトランジスタは、このような通常のトランジ
スタにおいて、ベース電極を設けていない構造である。(Conventional structure and its problems) Conventionally, a transistor is constructed by forming an emitter region, a base region, and a collector region in a Ge or Sj single crystal substrate, and then providing electrodes in each region and connecting lead wires to them. , used for a given purpose. Depending on the purpose of use, n-p-n type or p-n-p type transistors are made, but both of them, in principle, utilize the phenomenon of minority carrier injection from the emitter region to the base region. The minority carriers play a major role in modulating conductivity. From a practical standpoint, these devices are required to have large power gain, good high frequency characteristics, stability and reliability, and low noise and distortion. Incidentally, a phototransistor has a structure in which a base electrode is not provided in such a normal transistor.
これは、エミッタ電極とコレクタ電極間に電圧を加えて
おき、ベース部に光を照射して使用する。ベースに照射
さ２−
れる光はベースの電位を変えるのに役立つのであって光
によって発生したキャリアそのものが光電流になるので
はない。光はこの電流を制御する作用を有するから、光
リレーに使途があり感度は非常に良い。現在ではＳｉ単
結晶を使用したものが主流をなしているが、単結晶であ
るため高価であり、且つ形状や大きさに制約があるとい
う欠点があった。This is used by applying a voltage between the emitter electrode and the collector electrode and irradiating the base with light. The light irradiated onto the base serves to change the potential of the base, and the carriers generated by the light do not themselves become photocurrent. Since light has the effect of controlling this current, optical relays have many uses and are extremely sensitive. Currently, Si single crystals are the mainstream, but because they are single crystals, they are expensive and have limitations in shape and size.
（発明の目的）
本発明は上記の欠点を除去し、高感度で応答速度の速い
ホトトランジスタの製造方法を提供しようとするもので
ある。(Object of the Invention) The present invention aims to eliminate the above-mentioned drawbacks and provide a method for manufacturing a phototransistor with high sensitivity and fast response speed.
（発明の構成）
本発明の第１の特徴はＣｄ Ｔ ｅまたはこれを含む半
導体をベースとしたトランジスタにおいて、ベース内不
純物を傾斜型濃度分布とした高速応答トランジスタの製
造方法であり、第２の特徴としてＩＩ−Ｖｌ族化合物半
導体の多結晶膜をトランジスタの基体とした製造方法に
関するものである。(Structure of the Invention) The first feature of the present invention is a method for manufacturing a high-speed response transistor in which impurities in the base have a graded concentration distribution in a transistor based on CdTe or a semiconductor containing CdTe. The present invention is characterized in that it relates to a manufacturing method using a polycrystalline film of a II-Vl group compound semiconductor as a substrate of a transistor.
本発明によれば、トランジスタ各層の形成法として、蒸
着法、気相成長法などが採用できるので任意の形状、面
積のものを容易にしかも安価に製造することが出来る。According to the present invention, as the method for forming each transistor layer, a vapor deposition method, a vapor phase growth method, or the like can be adopted, so that a transistor of any shape and area can be manufactured easily and at low cost.
（実施例の説明）
以下本発明の一実施例について、図面を参照しなから説
明する。(Description of Embodiment) An embodiment of the present invention will be described below with reference to the drawings.
〔実施例１〕
第１図は本発明によるホトトランジスタの製造方法を説
明するための一実施例の模式断面図を示すもので、ガラ
ス基板１上に、スパッタ法で、厚さ約５００人のＩｎ２
Ｏ３膜からなる透明電極２を形成させたのち、この上に
順次、蒸着法でｎ−ＣｄＴｅ層３．ｐ−ｃｄＴｅ層４．
ｎ−ｃｄＴｅ層５を形成させ、さらにこの上にＡｌ電極
を蒸着法で形成させる。上記、Ｃｄ Ｔ ｅ層３の形成
時の真空度は１０−’Ｔｏｒｒ、基板温度３５０℃で、
ｎ−ＣｄＴｅ層３゜ｐ−６６１０層４．ｎ−ｃｄＴｅ層
５の各層の不純物および濃度は各々、Ｉｎ２Ｔｅ３１１
Ｉｌｏ１％、 Ｓｂ２Ｔｅ３］０−２層ｍｏ１％、 Ｉ
ｎ２Ｔｅ３１０−３ｍｏ１％であり、同じく各層の厚
さはそれぞれ０．２μｍ、 ０．６μｍ、０．６μｍで
あった。[Example 1] Fig. 1 shows a schematic cross-sectional view of an example for explaining the method of manufacturing a phototransistor according to the present invention. In2
After forming a transparent electrode 2 made of an O3 film, an n-CdTe layer 3. is sequentially deposited thereon by vapor deposition. p-cdTe layer 4.
An n-cdTe layer 5 is formed, and an Al electrode is further formed thereon by vapor deposition. The degree of vacuum during the formation of the Cd Te layer 3 above was 10-'Torr, the substrate temperature was 350°C,
n-CdTe layer 3° p-6610 layer 4. The impurities and concentrations of each layer of the n-cdTe layer 5 are In2Te311
Ilo1%, Sb2Te3]0-2 layer mo1%, I
n2Te310-3mol%, and the thickness of each layer was 0.2 μm, 0.6 μm, and 0.6 μm, respectively.
−３＝
こののち、Ｉｎ２Ｏ３膜２からなる透明電極上とＡ１電
極６上にそれぞれ、リード線７をつける。-3= After this, lead wires 7 are attached on the transparent electrode made of the In2O3 film 2 and on the A1 electrode 6, respectively.
第２図は第１図に示した構造のトランジスタの構成元素
と不純物元素の分布状態を二次イオン質量分析計（ＳＩ
ＭＳ）で解析した結果を示す濃度分布図である。Figure 2 shows the distribution of the constituent elements and impurity elements of the transistor with the structure shown in Figure 1 using a secondary ion mass spectrometer (SI).
FIG. 3 is a concentration distribution diagram showing the results of analysis using MS).
図中に示されるように、Ｃｄ Ｔ ｅは明確に３層に分
離しており、特にｐ−ｃｄＴｅ層内のｓｂ濃度分布はエ
ミッタ側が高濃度に、コレクタ側が低濃度に分布してい
る。ＣｄＴｅ成膜はＣｄＴｅ蒸着源、■ｎ２Ｔｅ３蒸着
源、Ｓｂ２Ｔｅ３蒸着源からなる３個の独立した蒸着源
を使用し、ｎ−ＣｄＴｅ成膜はＣｄ Ｔ ａ蒸着源と■
ｎ２Ｔｅ３蒸着源を同時に使用し、ｐ−ＣｄＴｅ成膜は
ＣｄＴｅ蒸着源とＳｂ２Ｔｅ３蒸着源を同時に加熱して
行う。各々の蒸着速度は第２図に示す各ＣｄＴｅ層の不
純物分布状態になるように制御しである。As shown in the figure, CdTe is clearly separated into three layers, and in particular, the sb concentration distribution in the p-cdTe layer has a high concentration on the emitter side and a low concentration on the collector side. CdTe film formation uses three independent evaporation sources consisting of a CdTe evaporation source, ■n2Te3 evaporation source, and Sb2Te3 evaporation source, and n-CdTe film formation uses a CdTa evaporation source and
The n2Te3 vapor deposition source is used at the same time, and the p-CdTe film is formed by heating the CdTe vapor deposition source and the Sb2Te3 vapor deposition source simultaneously. The deposition rate of each layer was controlled so that the impurity distribution state of each CdTe layer was as shown in FIG.
このようにして得られたホトトランジスタは増幅率６０
０倍、応答速度１０−’ｓｅｅと高性能であった。The phototransistor thus obtained has an amplification factor of 60
It had high performance, with a response speed of 10-'see.
（発明の効果）
５−
４−
以上説明したように、本発明によれば、高速応答性を有
し、且つ高感度の薄膜型ホトトランジスタが得られ、そ
の応用例として、各種高速度読取用光センサとして広い
適用範囲を有するものである。(Effects of the Invention) 5-4- As explained above, according to the present invention, a thin film phototransistor having high-speed response and high sensitivity can be obtained, and as an example of its application, it can be used for various high-speed reading applications. It has a wide range of applications as an optical sensor.
【図面の簡単な説明】
第１図は本発明によるホトトランジスタの製造方法を説
明するための一実施例の模式断面図、第２図はＳＩＭＳ
で解析したトランジスタ構成元素と不純物元素の濃度分
布図である。
１ ・・・ガラス基板、 ２・・・ Ｉｎ２ｏａ膜、３
− ｎ−ｃｄＴｅ層、 ４ − ｐ−ｃｄＴｅ層、５
− ｎ−ｃｄＴｅ層、 ６−Ａｌ電極、 ７・・・
リード線、 ８ ・・・入射光。
特許出願人 松下電器産業株式会社
６−
第１図
第２図
与
水 難[Brief Description of the Drawings] Fig. 1 is a schematic cross-sectional view of an embodiment for explaining the method of manufacturing a phototransistor according to the present invention, and Fig. 2 is a schematic cross-sectional view of an example of a method for manufacturing a phototransistor according to the present invention.
FIG. 2 is a concentration distribution diagram of transistor constituent elements and impurity elements analyzed in FIG. 1... Glass substrate, 2... In2oa film, 3
- n-cdTe layer, 4 - p-cdTe layer, 5
- n-cdTe layer, 6-Al electrode, 7...
Lead wire, 8...Incoming light. Patent applicant Matsushita Electric Industrial Co., Ltd. 6- Figure 1 Figure 2
Claims (3)
たトランジスタにおいて、不純物を傾斜型濃度分布にし
たことを特徴とするトランジスタの製造方法。(1) A method for manufacturing a transistor based on CdTe or a semiconductor containing CdTe, characterized in that impurities have a gradient concentration distribution.
レクタ側を低濃度と傾斜型濃度分布にしたことを特徴と
する特許請求の範囲第（１）項記載のトランジスタの製
造方法。(2) The method for manufacturing a transistor according to claim (1), wherein the impurity in the base layer has a gradient concentration distribution with a high concentration on the emitter side and a low concentration on the collector side.
着源からの蒸着速度の比率を変化させることによりＣｄ
Ｔｅ層内不純物濃度分布を制御することを特徴とする特
許請求の範囲第（１）項記載のトランジスタの製造方法
。(3) By changing the ratio of the evaporation rate from the CdTe evaporation source to the evaporation rate from the impurity evaporation source, Cd
The method for manufacturing a transistor according to claim 1, wherein the impurity concentration distribution in the Te layer is controlled.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59118164A JPS60262472A (en) | 1984-06-11 | 1984-06-11 | Manufacture of transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59118164A JPS60262472A (en) | 1984-06-11 | 1984-06-11 | Manufacture of transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60262472A true JPS60262472A (en) | 1985-12-25 |
Family
ID=14729689
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59118164A Pending JPS60262472A (en) | 1984-06-11 | 1984-06-11 | Manufacture of transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60262472A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5752183A (en) * | 1980-09-16 | 1982-03-27 | Ricoh Co Ltd | Manufacture of thin film transistor |
| JPS5766622A (en) * | 1980-10-13 | 1982-04-22 | Ricoh Co Ltd | Formation of cdte film |
-
1984
- 1984-06-11 JP JP59118164A patent/JPS60262472A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5752183A (en) * | 1980-09-16 | 1982-03-27 | Ricoh Co Ltd | Manufacture of thin film transistor |
| JPS5766622A (en) * | 1980-10-13 | 1982-04-22 | Ricoh Co Ltd | Formation of cdte film |
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