JPS60253310A - Analog frequency divider of microwave - Google Patents
Analog frequency divider of microwaveInfo
- Publication number
- JPS60253310A JPS60253310A JP11016684A JP11016684A JPS60253310A JP S60253310 A JPS60253310 A JP S60253310A JP 11016684 A JP11016684 A JP 11016684A JP 11016684 A JP11016684 A JP 11016684A JP S60253310 A JPS60253310 A JP S60253310A
- Authority
- JP
- Japan
- Prior art keywords
- gate
- dual
- electrode
- fet
- dual gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
- H03B19/06—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes
- H03B19/14—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes by means of a semiconductor device
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明はマイクロ波アナログ分周器に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] This invention relates to a microwave analog frequency divider.
マイクロ波通信装置、レーダ装置、測定装置等において
は周波数″安定度の良い局部発振器が必要でおる。特に
近年直接衛星放送実用化に伴って、この種の安定化発振
器の112が急激に増大している。このため、量産に適
し大構成の安定化発振器の研究開発が各所で活発に行な
われている。モノリシックIC構成によれば量産低価格
化が可能であるが、モノシリツクIC構成で局部発振周
波数を安定させるには、局部発振周波数を分周して安定
な周波数と位相比較した結果とを局部発振器にフィード
バックする方法が最も適していると考えられる。この方
法を実現するに′は局部発振周波数(マイクロ波帯)で
動作する分局器が必要となる。Microwave communication equipment, radar equipment, measurement equipment, etc. require local oscillators with good frequency stability.In particular, with the practical use of direct satellite broadcasting in recent years, the number of stabilizing oscillators of this type has rapidly increased. For this reason, research and development of stabilizing oscillators with large configurations suitable for mass production are being actively conducted in various places. Monolithic IC configurations allow mass production at low cost, but local oscillators with monolithic IC configurations are In order to stabilize the frequency, it is considered that the most suitable method is to divide the local oscillation frequency and feed back the stable frequency and the result of phase comparison to the local oscillator.To realize this method, the local oscillation A branching unit that operates at a frequency (microwave band) is required.
従来は、このためにアナログ分局器が用いられていたが
分局帯域が狭いのが欠点であった。Conventionally, analog branch dividers have been used for this purpose, but their disadvantage is that the branch band is narrow.
第1図は従来用いられているアナログ分局器の構成図で
ある。図において、5は周波数fの被分局信号が入力さ
れる端子、1は′ミキサ、2はf/2以下の信号を通す
フィルタ、3は//2の信号を増幅する増幅器、4はf
/2の分周信号の出力端子、6は帰還回路である。この
構成によれば帰還ループ内にf/2の信号が現われる。FIG. 1 is a block diagram of a conventionally used analog branch divider. In the figure, 5 is a terminal into which a divided signal of frequency f is input, 1 is a mixer, 2 is a filter that passes signals of f/2 or less, 3 is an amplifier that amplifies the signal of /2, and 4 is f
6 is a feedback circuit, which is an output terminal for a frequency-divided signal of /2. With this configuration, a signal of f/2 appears in the feedback loop.
このような従来のアナログ分局器では、帰還ループにf
/2の発振回路が構成されているが、発振が可能となる
ためにはミキサ1、フィルタ2、増幅器3、帰還回路6
を含めた位相遅れがf/2での発振条件を満足していな
ければならない。このため発振条件を満足する周波数範
囲はせまく、比帯域で高々20チ程度にすぎなかった。In such a conventional analog branch divider, f
/2 oscillation circuit is configured, but in order to enable oscillation, mixer 1, filter 2, amplifier 3, and feedback circuit 6 are required.
The phase delay including the phase delay must satisfy the oscillation conditions at f/2. For this reason, the frequency range that satisfies the oscillation conditions is narrow, and the fractional band is only about 20 inches at most.
本発明の目的は分局帯域が狭いという従来のアナログ分
局器の欠点を解消し、帯域の広いマイクロ波アナログ分
周器を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to eliminate the disadvantage of conventional analog dividers in that the division band is narrow, and to provide a microwave analog frequency divider with a wide band.
本発明はソース接地された第1のデュアルグー) FE
Tのドレイン電極に並列抵抗回路を設け、該ドレイン電
極をドレイン接地された第2のデュアルグー) FET
の第2ゲート電極に交流的に接続し、第2のデュアルグ
ー) Fllil’rのソース電極に一端が接地された
直列抵抗回路を設けるとともに、第2のデュアルゲート
F]ivrのソース電極を第1のデュアルグー) FE
Tの第1ゲートに接続して抵抗帰還回路を構成し、第1
のデュアルグー) FETの第2ゲートおよび第2のデ
ュアルグー) FETの第1ゲートに互いに位相の異な
った被分局信号を入力する端子を設けたことを特徴とす
るマイクロ波アナログ分局器である。The present invention is directed to a first dual group whose source is grounded (FE).
A parallel resistance circuit is provided to the drain electrode of the T FET, and the drain electrode is connected to a second dual group (FET) whose drain electrode is grounded.
A series resistor circuit is provided, one end of which is connected to the second gate electrode of the second dual gate F]ivr in an alternating current manner, and one end of which is grounded to the source electrode of the second dual gate F]ivr. 1 dual goo) FE
connect to the first gate of T to configure a resistive feedback circuit;
This is a microwave analog branching device characterized in that the first gate of the FET is provided with a terminal for inputting divided signals having mutually different phases.
以下に本発明の実施例を図によって説明する。 Embodiments of the present invention will be described below with reference to the drawings.
第2図は本発明の一実施例を示すマイクロ波アナログ分
周器の高周波等価回路である。第2図において、ソース
電極13が接地された第1のデュアルグ−) FIET
11のドレイン電極12には並列抵抗17が備えられ
、前記ドレイン電極臣は、ドレイン電極21が埠地され
た第、2のデュアルグー) FET 18の第2ゲート
電極20に接続されている。第2のデュアルグ〜) F
ET 18のソース電極22には直列に他端が接地され
た抵抗23が備えられ、該ソース電極22と、前記第1
のデュアルゲートFET 11の第1ゲート電極14と
の間は抵抗冴で結ばれている。16および郷は位相の異
なった被分局信号を入力する端子で、端子16は第2ゲ
ート電極15に接続され、端子25は第1ゲート電極1
9に接続されている。FIG. 2 is a high frequency equivalent circuit of a microwave analog frequency divider showing an embodiment of the present invention. In FIG. 2, the first dual gate (FIET) whose source electrode 13 is grounded is
The drain electrode 12 of No. 11 is provided with a parallel resistor 17, and the drain electrode 21 is connected to a second gate electrode 20 of a second dual FET 18, in which the drain electrode 21 is connected to a bridge. 2nd Dualg ~) F
The source electrode 22 of the ET 18 is provided with a resistor 23 connected in series with the other end grounded, and the source electrode 22 and the first
It is connected to the first gate electrode 14 of the dual gate FET 11 through a resistor. 16 and Go are terminals for inputting divided signals having different phases, the terminal 16 is connected to the second gate electrode 15, and the terminal 25 is connected to the first gate electrode 1.
9 is connected.
ここで第1のデュアルグー) FET 11の第1ゲー
ト電極14に正相の信号が表われたとすると、ドレイン
電極12には逆相が現われ、第2のデュアルグ−) F
ET 21のソース電極22には同じく逆相が現われ、
この逆相が第1ゲート電極14に帰還される。Here, if a positive phase signal appears on the first gate electrode 14 of the first dual goo FET 11, a negative phase signal appears on the drain electrode 12, and the second dual goo FET 11 receives a positive phase signal.
Similarly, an opposite phase appears at the source electrode 22 of ET 21,
This negative phase is fed back to the first gate electrode 14.
もし帰還回路の利得が1より大きければこの回路は発振
する。ゲート長が1.OItm〜0.511m程度のG
αルデュアルゲー) FETを用いると6 GHz程度
までは、ソース接地回路では、出力側には入力の#t
#?[’逆相の信号が表われ、ドレイン接地回路では出
力側に入力とほぼ同相の信号が表われ、かつ利得もソー
ス接地の場合5dB程度、ドレイン接地の場合0dBQ
度とれるため回路は発振可能となる。このため第2図の
回路はGaAaデュアルゲート眉を用いると低周波〜6
GHz程度までは発、振可能となっている。したがっ
て、ゲート端子16および25を用いてミキシングを行
うと、この回路では/=6GHz〜12 GHzの1オ
クターブに渡って第1図の従来の回路と同等の動作を行
い分周が可能になる。If the gain of the feedback circuit is greater than 1, the circuit will oscillate. The gate length is 1. G of OItm~0.511m
Up to about 6 GHz, if a FET is used, in a source-grounded circuit, the input #t is connected to the output side.
#? ['A signal with the opposite phase appears, and in the drain-grounded circuit, a signal almost in phase with the input appears on the output side, and the gain is about 5 dB when the source is grounded and 0 dBQ when the drain is grounded.
This allows the circuit to oscillate. For this reason, the circuit shown in Figure 2 uses a GaAa dual-gate block, and the circuit has a low frequency of ~6.
It is possible to oscillate and oscillate up to about GHz. Therefore, when mixing is performed using the gate terminals 16 and 25, this circuit performs the same operation as the conventional circuit shown in FIG. 1 over one octave from 6 GHz to 12 GHz, making frequency division possible.
端子16および25に入力される被分局信号は12 G
Hz程度までは巨いに逆相であればよい。ただし前述、
のように完全逆相とせず、適度な位相関係を保てば第2
図の帰還ループの発振可能周波数は6 GHzよりも高
くすることができる。このことは最高分周周波数が12
GHz以上になることを意味する。The divided signals input to terminals 16 and 25 are 12G.
It is sufficient if the phase is significantly reversed up to about Hz. However, as mentioned above,
If the phase relationship is not completely reversed as in
The possible oscillation frequency of the feedback loop in the figure can be higher than 6 GHz. This means that the highest dividing frequency is 12
This means that the frequency is higher than GHz.
以上のように本発明によるときには分局比帯域が高々2
0チ程度であったマイクロ波アナログ分局器の分局帯域
を1オクターブ(比帯域67%)以上に広げることが可
能となり、放送衛星受信用IC等各種のマイクロ波シス
テムなどに広く応用できる効果を有するものである。As described above, according to the present invention, the division ratio band is at most 2.
It is now possible to widen the branching band of a microwave analog splitter, which used to be about 0, to more than 1 octave (67% relative band), and has the effect of being widely applicable to various microwave systems such as ICs for broadcasting satellite reception. It is something.
第1図は従来のマイクロ波アナログ分局器のブロック図
、第2図は本発明の一実施例を示すマイクロ波アナログ
分局器のブロック図である。
11・−・第1のデュアルゲートPET、12・・・ド
レイン電極、13・・・ソース電極、14・・・第1ゲ
ート電極、15・・・第2ゲート電極、16・・・入力
端子、17・・・並列抵抗、18・・・給2のデュアル
ゲー)FET、19・・・第1ゲート電極、20・・・
第2ゲート電極、21・・・ドレイン電極、22・・・
ソース電極、23・・・抵抗、24・・・抵抗、25・
・・入力端子
特許出願人 日本電気株式会社
代理人 弁理士 内 原 貴
簡1図
第2図
4
(FIG. 1 is a block diagram of a conventional microwave analog divider, and FIG. 2 is a block diagram of a microwave analog divider showing an embodiment of the present invention. 11... First dual gate PET, 12... Drain electrode, 13... Source electrode, 14... First gate electrode, 15... Second gate electrode, 16... Input terminal, 17... Parallel resistance, 18... Dual gate (feed 2) FET, 19... First gate electrode, 20...
Second gate electrode, 21...Drain electrode, 22...
source electrode, 23...resistance, 24...resistance, 25.
... Input terminal patent applicant NEC Corporation Representative Patent attorney Takasumi Uchihara Figure 1 Figure 2 Figure 4 (
Claims (1)
のドレイン電極に並列抵抗回路を設け、該ドレイン電極
をドレイン接地され大筒2′のデュアルゲー) FET
の第2ゲート電極に交流的に接続し、第2のデュアルゲ
ート4灯のソース電極に一端が接地された直列抵抗回路
を設けるとともに、第2のデュアルゲートn汀のソース
電極をMlのデュアルゲニ) FETの第1ゲートに接
続して抵抗帰還回路を構成し、第1のデュアルゲー)
FETの第2ゲートおよび第2のデュアルゲー) FE
Tの第1ゲートに互いに位相の異なった被分局信号を入
力する端子を設けたことを特徴とするマイクロ波アナロ
グ分局器。(1) First dual gate FET whose source is grounded
A parallel resistance circuit is provided to the drain electrode of the large-tube 2' dual-gate FET with the drain electrode connected to the drain ground.
A series resistance circuit is provided which is AC-connected to the second gate electrode of the second dual gate, and one end of which is grounded to the source electrode of the second dual gate four lamps, and the source electrode of the second dual gate n is connected to the dual generator of Ml. Connect to the first gate of the FET to configure a resistive feedback circuit, and connect to the first dual gate)
2nd gate of FET and 2nd dual gate) FE
A microwave analog branching device characterized in that the first gate of the T is provided with a terminal for inputting divided signals having mutually different phases.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59110166A JPH0712144B2 (en) | 1984-05-30 | 1984-05-30 | Microwave analog divider |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59110166A JPH0712144B2 (en) | 1984-05-30 | 1984-05-30 | Microwave analog divider |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60253310A true JPS60253310A (en) | 1985-12-14 |
JPH0712144B2 JPH0712144B2 (en) | 1995-02-08 |
Family
ID=14528721
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59110166A Expired - Fee Related JPH0712144B2 (en) | 1984-05-30 | 1984-05-30 | Microwave analog divider |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0712144B2 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62299115A (en) * | 1985-05-13 | 1987-12-26 | プレッシー セミコンダクターズ リミテッド | Frequency demultiplier |
JP2007208589A (en) * | 2006-02-01 | 2007-08-16 | Univ Of Tokyo | Frequency divider |
JP2007528657A (en) * | 2004-03-11 | 2007-10-11 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Divider |
JP2009055548A (en) * | 2007-08-29 | 2009-03-12 | Nippon Telegr & Teleph Corp <Ntt> | Receiver and transceiver |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55135423A (en) * | 1979-04-09 | 1980-10-22 | Nec Corp | Driving method for semiconductor logic device |
JPS567527A (en) * | 1979-07-02 | 1981-01-26 | Matsushita Electric Ind Co Ltd | High speed frequency division circuit |
-
1984
- 1984-05-30 JP JP59110166A patent/JPH0712144B2/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55135423A (en) * | 1979-04-09 | 1980-10-22 | Nec Corp | Driving method for semiconductor logic device |
JPS567527A (en) * | 1979-07-02 | 1981-01-26 | Matsushita Electric Ind Co Ltd | High speed frequency division circuit |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62299115A (en) * | 1985-05-13 | 1987-12-26 | プレッシー セミコンダクターズ リミテッド | Frequency demultiplier |
JP2007528657A (en) * | 2004-03-11 | 2007-10-11 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Divider |
JP4734510B2 (en) * | 2004-03-11 | 2011-07-27 | エスティー‐エリクソン、ソシエテ、アノニム | Divider |
JP2007208589A (en) * | 2006-02-01 | 2007-08-16 | Univ Of Tokyo | Frequency divider |
JP2009055548A (en) * | 2007-08-29 | 2009-03-12 | Nippon Telegr & Teleph Corp <Ntt> | Receiver and transceiver |
Also Published As
Publication number | Publication date |
---|---|
JPH0712144B2 (en) | 1995-02-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |