JPS62299115A - Frequency demultiplier - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION 3. DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to frequency dividers, particularly for use in frequency modulation (FM) receivers.

BACKGROUND OF THE INVENTION Before detection of an FM signal carried by an input radio frequency (RF) carrier is performed, an RM double signal frequency converter;
For example, the radio frequency (RF
) signals are known to be converted to intermediate frequency (IF) signals. IF low signal, F~1 carried by carrier wave
It is sent to an FM detector which provides a voltage output proportional to the modulation signal.

Other frequency translation devices known to the applicant include the use of frequency dividers that include logic circuit elements operative to divide the frequency by an RF low signal integer N.

<Problems to be Solved by the Invention> The frequency divider described above has the disadvantage that it is not suitable for use in an FM detector intended for peripheral frequency modulation reception areas or space communications.

It is an object of the present invention to provide a frequency dividing device which is capable of operating at improved speeds to frequency divide relatively high frequency signals and which, when connected to an FM detector, can improve the noise threshold of the FM detector. It is to be.

Means and Effects for Solving Problems> According to the present invention, in a frequency division device, an injection-locked divider (1njecNon-1locked divider) is configured to receive an input signal and provide a frequency-divided signal in response to the received input signal. )
and a frequency divider connected to the injection-locked divider, the frequency divider including logic circuitry for providing a further divided frequency signal in response to the frequency-divided signal provided by the injection-locked divider. A splitting device is provided.

A frequency division device is included in a frequency modulation (FM) receiver that receives an RF wireless signal and generates a signal indicative of the information content of a modulated wave of the wireless signal. In this case, the further frequency divided signal provided by the frequency divider is sent to an FM detector.

An FM receiver including a frequency division device according to the invention has advantages such as being able to receive relatively high frequency RF low signals and having an improved M-tone threshold.

Such a receiver is therefore clearly suitable for use in satellite broadcasting where FM receivers are often required to operate near a threshold where frequency modulated signals can be detected from background noise.

The FM detector includes a phase sensitive detector adapted to receive further frequency divided three signals from a first path and a second path, the second path having a phase shifting device therein. The phase shifting device applies the second path to the further frequency divided signal from the first path depending on its frequency to energize the phase sensitive detector to provide an output signal corresponding to the modulation carried by the input signal. operates to shift the phase of the further frequency-divided signal from.

The frequency divider operates to frequency-divide the frequency-divided signal provided by the injection-locked divider by two.

In this case, the frequency divider may be in the form of a D-type bistable circuit.

Coupling the injection-locked divider to the FM detector via a frequency divider has the additional advantage of avoiding mutual coupling between the resonant circuits of the injection-locked divider and the FM detector.

Preferably, the injection-locked divider includes a nonlinear amplification device and a tuned circuit including a DC blocking device, an AC coupling device, and a resonant circuit, and the nonlinear amplification device performs nonlinear amplification through the DC blocking device and the AC coupling device. The resonant circuit is arranged to provide a frequency-divided signal through the DC blocking device in response to the frequency-divided signal sent to a second input of the device and the input signal, the resonant circuit connecting a point between the DC blocking device and the AC coupling device. Earth bond.

The DC blocking device and the AC coupling device each include a capacitor.

The resonant circuit includes an inductor connected in series with a capacitor.

Said point is also coupled to virtual ground via a resistive device.

The injection lock divider (ILD) has an improved injection lock area, has a relatively more symmetrical injection area, and is advantageous in that the component values of the ILD are easier to manufacture.

The injection-locked divider can also frequency divide the input signal by a unit value by changing the frequency of the tuned circuit to match the frequency of the input signal. In this case, the pour-lock divider acts as a pour-lock excavator.

The invention will be explained in more detail below by way of example embodiments with reference to the accompanying drawings.

Embodiment Referring to FIG. 1, an FM detector 1 suitable for use in an FM receiver is illustrated. The FM detector 1 has at its front stage a frequency division device embodying the invention, including an injection-locked frequency divider 2 connected to a frequency divider 2 . In this arrangement, the injection-locked frequency divider has a coupling capacitor C1
It is connected to the frequency divider 3 via. In Figure 1,
Frequency modulation Radio Frequency (RF) containing information carried out in modulation
) A terminal 6 provided for receiving the signal FIN is shown. The signal FIN is sent to the first input of the east gate unit 8 of the injection-locked frequency divider 2, where it is multiplied by the signal F 2 received at the second input of the multiplier 8.

00 injection-locked frequency divider includes a direct current (D, C,') blocking device in the form of capacitor C2 and a capacitor C
It also includes a tuned circuit 10 comprising an alternating current (A, C,) coupling device of the type 3 and a resonant circuit comprising a series connected inductance L and a capacitor C4 in parallel with R1.

The injection-locked frequency divider operates to divide the signal FIN by two in frequency to provide a frequency-divided signal F UT . A detailed explanation of the structure of the injection-locked oscillator can be found in Part 3.
Given below with reference to the figures.

The frequency-divided signal F is frequency-divided via the coupling capacitor C1! ! ! i3, and in this embodiment, this frequency divider 3 converts the frequency divided signal F into a frequency Ou! It operates so as to give the signal F which has been divided into several 2 and further frequency-divided to the terminal UT 12. Frequency divider 3 will be explained in detail below with reference to FIG.

The frequency dividing device divides the input signal FIN into four frequencies, but it can be arranged to divide by a larger or smaller number as required. For example, if the frequency of the tuned circuit 1° is set to the signal FI
It is also possible to modify it to match the frequency of N, in which case the injection-locked frequency divider operates as an injection-locked oscillator with an effective division ratio of unity.

A further frequency signal F i is output from terminal 12 to the FM detector U.
T is sent to output unit 1 and modulated. Signal F'' is the 1st U
It is sent via a T path 14 to a phase sensitive detector 13 and via a second path 15 to a phase sensitive detector.

A phase shift device is placed in the second path 15 and is connected to the capacitor C.
5. It includes a phase quadrature device consisting of a capacitor C6 connected in parallel with a coil L2. Capacitor C6 and coil L2 connect second path 15 to ground and thus impose a frequency-dependent frequency lag on signal F 2 . The roller capacitor C5 receives the signal F'' sent by the second path 15.
imposes a 90° phase shift on . The phase sensitive detector 13 thus receives a further frequency divided signal from the two paths such that the signal of one path changes in phase with respect to the other path in response to the modulation of the input signal FIN. Phase sensitive detector 13 provides an output signal F, which indicates the frequency modulation content of input FIN.

1g Referring to Figure 2, the frequency containing the logic circuit element that operates to divide the signal into two frequencies! , lI A detailed t=example of the device 3 is illustrated. Frequency divider 3 is a D-type bistable circuit and includes a pair of latches L1 and L2. Latch L
1 includes a pair of transistors T1 and T, and a latch L2
includes a pair of transistors T and T. The current is passed through the latch L. by a long tail pair including a pair of transistors T' and T- and a current capacitor. Supplied to L2. Input frequency v1 signal F
is sent to the transistor T5 via the terminal Ou■■1o. A reference voltage ref is applied to the base of the transistor T6.

Sensing gates T, T and T, Tlo are each connected to a latch L
and [2, and is operative to sense the state of the associated latch. That is, the sensing gates T and T sense the state of the latch L1 and output the latch L1.
The sensing gate T9 and TIO are latched and sense the state of (this state is latched, which is the inverse of the state of) and set the state of latch L2 to latch L1. It works like that. Sensing gate T
, T. and T. Each Tlo is supplied with current from a pair of transistors T 1 , T 2 and a current source C8.

The divider 3 receives the signal F which is further frequency-divided from the terminal 12.
It works to give.

The injection lock divider 2 will now be described in detail with reference to FIG.

The injection-locked divider includes a direct current providing device, in this case consisting of a constant current source 22 and a capacitor C1o, and a current injection device including a transistor "20."

The base electrode of the transistor T2o receives the input signal FIN, and the current injector supplies a direct current to the emitter electrode of the nonlinear amplifier, namely the multiplier, in response to the input signal F.

The nonlinear amplifier device includes a long tail pair of transistors "23 and"24 connected as shown in FIG.

In this embodiment, transistors "23 and"24 are connected to resistors R
, R , R , R and lf pressure L/-/L,
V.C. ! = biased with a voltage determined by a potential divider consisting of a capacitor C, connected between it and the earth rail E.

A direct current blocking device comprising a capacitor C2, to which the signal F is fed, is connected to the collector electrode of the transistor "23, and an AC coupling device comprising a capacitor C8 is connected between the base of the transistor T24 and the resonant circuit. Frequency division The signal F is sent via the capacitor C3 to the second input of the multiplier 8, thereby providing the signal F.Ul.

A direct current (D.C.) biasing device in the form of resistor R6 is provided to bias the collector of transistor "23. The biasing device may also be in the form of a choke.

The resonant circuit is an inductor as described above, and includes a capacitor C4 and a resistor R1. As can be understood from Figure 3,
The resonant circuit grounds the point between capacitors C2 and 08,
This ground may be a virtual ground.

When included in an injection-locked split S (ILD) as described above, the resonant circuit and capacitors C, C, the ILD has an improved injection-lock area and a more symmetrical injection area, and the component values can be reduced more easily. , which particularly offers the advantage of being manufactured in integrated circuit form.

When implementing the dividing device according to the invention, the injection-locked divider 2 can be used in the form of an interface circuit (not shown) to provide the correct DC level and output swing.
It is necessary to interface to S3. A similar circuit is required to interface the frequency divider 3 and the FM detector 1. The construction of such an interface circuit is well known to those skilled in the art of FM receivers.

[Brief explanation of drawings]

1 is a schematic diagram of a frequency divider embodying the invention shown coupled to an FM detector; FIG. 2 is a circuit diagram of the frequency divider of the frequency divider of FIG. 1; FIG. is the first
FIG. 2 is a circuit diagram of an injection-locked frequency divider of the frequency division device shown in FIG. 1...FM detector, 2...Injection lock type frequency divider, 3...
... Frequency divider, 8 ... Multiplier, 1o ... Tuning circuit, 13 ... Phase sensitive detector.

Claims (8)

[Claims] (1) In a frequency division device, an injection-locked divider receives an input signal and provides a frequency-divided signal in response to the input signal, and a frequency divider coupled to the injection-locked divider, the injection-locked the frequency divider including logic circuitry for providing further frequency divided signals in response to the frequency divided signal provided by the divider, the injection locked divider comprising a DC blocking device, an AC coupling device and a resonant circuit. a tuned circuit and a nonlinear amplifier;
The nonlinear amplifier is adapted to provide a frequency-divided signal via the DC blocking device in response to the frequency-divided signal and the input signal sent to a second input of the nonlinear amplifier via the DC blocking device and the AC coupling device. The resonant circuit is also a frequency dividing device that grounds the point between the DC blocking device and the AC coupling device. (2) The frequency dividing device according to claim 1, wherein each of the DC blocking device and the AC coupling device includes a capacitor. (3) A frequency dividing device according to claim 1 or 2, wherein the resonant circuit includes an inductor connected in series with a capacitor. (4) A frequency dividing device according to any one of claims 1 to 3, wherein the point is connected to a virtual ground via a resonator. (5) A frequency division device according to any one of claims 1 to 4, wherein the frequency divider operates to divide the signal provided by the injection-locked divider into two frequencies. (6) A frequency dividing device according to claims 1 to 5, wherein the frequency divider is in the form of a D-type bistable circuit. (7) In a frequency modulation (FM) receiver that receives an RF radio signal and generates a signal indicating the information content of a modulated wave of the radio signal, the frequency divider according to claims 1 to 6 a frequency modulation receiver, the further frequency divided signals provided by the frequency divider being provided to an FM detector; (8) A frequency modulation receiver according to claim 7, wherein the FM detector includes a phase sensitive detector arranged to receive further frequency-divided signals from the first path and the second path; The second path is equipped with a phase shift device,
The phase shifting device is configured to shift the further frequency divided signal from the first path according to its frequency to energize the phase sensitive detector to provide an output signal corresponding to the modulation carried by the input signal. A frequency modulation receiver that operates to shift the phase of the further frequency divided signals from the two paths.